Minkyu Kang | ae6f0c6 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 1 | /* |
Steve Sakoman | 1ad2158 | 2010-06-08 13:07:46 -0700 | [diff] [blame] | 2 | * Board specific setup info |
| 3 | * |
| 4 | * (C) Copyright 2010 |
| 5 | * Texas Instruments, <www.ti.com> |
| 6 | * |
| 7 | * Author : |
| 8 | * Aneesh V <aneesh@ti.com> |
Minkyu Kang | ae6f0c6 | 2009-07-20 11:40:01 +0900 | [diff] [blame] | 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
Tom Rini | 8eb48ff | 2013-03-14 11:15:25 +0000 | [diff] [blame] | 29 | #include <config.h> |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 30 | #include <asm/arch/omap.h> |
Joel A Fernandes | b55759e | 2012-09-18 04:30:51 +0000 | [diff] [blame] | 31 | #include <asm/arch/spl.h> |
Aneesh V | fd8798b | 2012-03-08 07:20:18 +0000 | [diff] [blame] | 32 | #include <linux/linkage.h> |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 33 | |
Aneesh V | fd8798b | 2012-03-08 07:20:18 +0000 | [diff] [blame] | 34 | ENTRY(save_boot_params) |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 35 | /* |
| 36 | * See if the rom code passed pointer is valid: |
| 37 | * It is not valid if it is not in non-secure SRAM |
| 38 | * This may happen if you are booting with the help of |
| 39 | * debugger |
| 40 | */ |
| 41 | ldr r2, =NON_SECURE_SRAM_START |
| 42 | cmp r2, r0 |
| 43 | bgt 1f |
| 44 | ldr r2, =NON_SECURE_SRAM_END |
| 45 | cmp r2, r0 |
| 46 | blt 1f |
| 47 | |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 48 | /* |
| 49 | * store the boot params passed from rom code or saved |
| 50 | * and passed by SPL |
| 51 | */ |
| 52 | cmp r0, #0 |
| 53 | beq 1f |
| 54 | ldr r1, =boot_params |
| 55 | str r0, [r1] |
| 56 | #ifdef CONFIG_SPL_BUILD |
Tom Rini | 0be93ff | 2012-08-13 12:53:23 -0700 | [diff] [blame] | 57 | /* Store the boot device in spl_boot_device */ |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 58 | ldrb r2, [r0, #BOOT_DEVICE_OFFSET] @ r1 <- value of boot device |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 59 | and r2, #BOOT_DEVICE_MASK |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 60 | ldr r3, =boot_params |
Tom Rini | 0be93ff | 2012-08-13 12:53:23 -0700 | [diff] [blame] | 61 | strb r2, [r3, #BOOT_DEVICE_OFFSET] @ spl_boot_device <- r1 |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 62 | |
Tom Rini | 4652684 | 2013-04-05 06:21:44 +0000 | [diff] [blame] | 63 | /* |
| 64 | * boot mode is only valid for device that can be raw or FAT booted. |
| 65 | * in other cases it may be fatal to look. While platforms differ |
| 66 | * in the values used for each MMC slot, they are contiguous. |
| 67 | */ |
| 68 | cmp r2, #MMC_BOOT_DEVICES_START |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 69 | blt 2f |
Tom Rini | 4652684 | 2013-04-05 06:21:44 +0000 | [diff] [blame] | 70 | cmp r2, #MMC_BOOT_DEVICES_END |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 71 | bgt 2f |
Tom Rini | 69fa444 | 2012-08-14 09:20:06 -0700 | [diff] [blame] | 72 | /* Store the boot mode (raw/FAT) in omap_bootmode */ |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 73 | ldr r2, [r0, #DEV_DESC_PTR_OFFSET] @ get the device descriptor ptr |
| 74 | ldr r2, [r2, #DEV_DATA_PTR_OFFSET] @ get the pDeviceData ptr |
| 75 | ldr r2, [r2, #BOOT_MODE_OFFSET] @ get the boot mode |
Sricharan | 9310ff7 | 2011-11-15 09:49:55 -0500 | [diff] [blame] | 76 | ldr r3, =omap_bootmode |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 77 | str r2, [r3] |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 78 | #endif |
| 79 | 2: |
| 80 | ldrb r2, [r0, #CH_FLAGS_OFFSET] |
| 81 | ldr r3, =boot_params |
| 82 | strb r2, [r3, #CH_FLAGS_OFFSET] |
Aneesh V | 13a74c1 | 2011-07-21 09:10:27 -0400 | [diff] [blame] | 83 | 1: |
| 84 | bx lr |
Aneesh V | fd8798b | 2012-03-08 07:20:18 +0000 | [diff] [blame] | 85 | ENDPROC(save_boot_params) |
Sricharan | 308fe92 | 2011-11-15 09:50:03 -0500 | [diff] [blame] | 86 | |
Aneesh V | fd8798b | 2012-03-08 07:20:18 +0000 | [diff] [blame] | 87 | ENTRY(set_pl310_ctrl_reg) |
Aneesh V | e3405bd | 2011-06-16 23:30:52 +0000 | [diff] [blame] | 88 | PUSH {r4-r11, lr} @ save registers - ROM code may pollute |
| 89 | @ our registers |
| 90 | LDR r12, =0x102 @ Set PL310 control register - value in R0 |
| 91 | .word 0xe1600070 @ SMC #0 - hand assembled because -march=armv5 |
| 92 | @ call ROM Code API to set control register |
| 93 | POP {r4-r11, pc} |
Aneesh V | fd8798b | 2012-03-08 07:20:18 +0000 | [diff] [blame] | 94 | ENDPROC(set_pl310_ctrl_reg) |