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git01.mediatek.com / filogic / uboot / 1333f5e328c61eba5ff039429ac538c113d9d90e / . / test / dm / reset.c
blob: c61daed49032b64ebbd0ebaf8a36400dc4ed9f44 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]2/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]4 */
5
6#include <common.h>
7#include <dm.h>
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]8#include <reset.h>
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]9#include <dm/test.h>
10#include <asm/reset.h>
11#include <test/ut.h>
12
13/* This must match the specifier for mbox-names="test" in the DT node */
14#define TEST_RESET_ID 2
15
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]16/* This is the other reset phandle specifier handled by bulk */
17#define OTHER_RESET_ID 2
18
Jagan Tekidcd48c32019-02-28 00:26:56 +0530[diff] [blame]19/* Base test of the reset uclass */
20static int dm_test_reset_base(struct unit_test_state *uts)
21{
22 struct udevice *dev;
23 struct reset_ctl reset_method1;
24 struct reset_ctl reset_method2;
25
26 /* Get the device using the reset device */
27 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
28 &dev));
29
30 /* Get the same reset port in 2 different ways and compare */
31 ut_assertok(reset_get_by_index(dev, 1, &reset_method1));
32 ut_assertok(reset_get_by_index_nodev(dev_ofnode(dev), 1,
33 &reset_method2));
34 ut_asserteq(reset_method1.id, reset_method2.id);
35
36 return 0;
37}
38
39DM_TEST(dm_test_reset_base, DM_TESTF_SCAN_FDT);
40
Stephen Warren6488e642016-06-17 09:43:59 -0600[diff] [blame]41static int dm_test_reset(struct unit_test_state *uts)
42{
43 struct udevice *dev_reset;
44 struct udevice *dev_test;
45
46 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
47 &dev_reset));
48 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
49
50 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
51 &dev_test));
52 ut_assertok(sandbox_reset_test_get(dev_test));
53
54 ut_assertok(sandbox_reset_test_assert(dev_test));
55 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
56
57 ut_assertok(sandbox_reset_test_deassert(dev_test));
58 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
59
60 ut_assertok(sandbox_reset_test_free(dev_test));
61
62 return 0;
63}
64DM_TEST(dm_test_reset, DM_TESTF_SCAN_FDT);
Neil Armstrong20c633d2018-04-03 11:40:51 +0200[diff] [blame]65
66static int dm_test_reset_bulk(struct unit_test_state *uts)
67{
68 struct udevice *dev_reset;
69 struct udevice *dev_test;
70
71 ut_assertok(uclass_get_device_by_name(UCLASS_RESET, "reset-ctl",
72 &dev_reset));
73 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
74 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
75
76 ut_assertok(uclass_get_device_by_name(UCLASS_MISC, "reset-ctl-test",
77 &dev_test));
78 ut_assertok(sandbox_reset_test_get_bulk(dev_test));
79
80 ut_assertok(sandbox_reset_test_assert_bulk(dev_test));
81 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
82 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
83
84 ut_assertok(sandbox_reset_test_deassert_bulk(dev_test));
85 ut_asserteq(0, sandbox_reset_query(dev_reset, TEST_RESET_ID));
86 ut_asserteq(0, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
87
88 ut_assertok(sandbox_reset_test_release_bulk(dev_test));
89 ut_asserteq(1, sandbox_reset_query(dev_reset, TEST_RESET_ID));
90 ut_asserteq(1, sandbox_reset_query(dev_reset, OTHER_RESET_ID));
91
92 return 0;
93}
94DM_TEST(dm_test_reset_bulk, DM_TESTF_SCAN_FDT);