blob: 2924325e2990fbd0108c17bd8e15690370e50e25 [file] [log] [blame]
Tom Warrena3e280b2011-01-27 10:58:07 +00001/*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#ifndef __TEGRA2_COMMON_H
25#define __TEGRA2_COMMON_H
26#include <asm/sizes.h>
27
28/*
29 * High Level Configuration Options
30 */
31#define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
32#define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
33#define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
34#define CONFIG_L2_OFF /* No L2 cache */
35
Tom Warren112a1882011-04-14 12:18:06 +000036#define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */
37
Tom Warrena3e280b2011-01-27 10:58:07 +000038#include <asm/arch/tegra2.h> /* get chip and board defs */
39
40/*
41 * Display CPU and Board information
42 */
43#define CONFIG_DISPLAY_CPUINFO
44#define CONFIG_DISPLAY_BOARDINFO
45
46#define CONFIG_SKIP_RELOCATE_UBOOT
47#define CONFIG_SKIP_LOWLEVEL_INIT
48
49#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
50
51/* Environment */
52#define CONFIG_ENV_IS_NOWHERE
53#define CONFIG_ENV_SIZE 0x20000 /* Total Size Environment */
54
55/*
56 * Size of malloc() pool
57 */
58#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
59
60/*
61 * PllX Configuration
62 */
63#define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
64
65/*
66 * NS16550 Configuration
67 */
68#define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
69
70#define CONFIG_SYS_NS16550
71#define CONFIG_SYS_NS16550_SERIAL
72#define CONFIG_SYS_NS16550_REG_SIZE (-4)
73#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
74
75/*
76 * select serial console configuration
77 */
78#define CONFIG_CONS_INDEX 1
79
80/* allow to overwrite serial and ethaddr */
81#define CONFIG_ENV_OVERWRITE
82#define CONFIG_BAUDRATE 115200
83#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
84 115200}
85
86/* include default commands */
87#include <config_cmd_default.h>
88
89/* remove unused commands */
90#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
91#undef CONFIG_CMD_FPGA /* FPGA configuration support */
92#undef CONFIG_CMD_IMI
93#undef CONFIG_CMD_IMLS
94#undef CONFIG_CMD_NFS /* NFS support */
95#undef CONFIG_CMD_NET /* network support */
96
97/* turn on command-line edit/hist/auto */
98#define CONFIG_CMDLINE_EDITING
99#define CONFIG_COMMAND_HISTORY
100#define CONFIG_AUTOCOMPLETE
101
102#define CONFIG_SYS_NO_FLASH
103
104/* Environment information */
105#define CONFIG_EXTRA_ENV_SETTINGS \
106 "console=ttyS0,115200n8\0" \
107 "mem=" TEGRA2_SYSMEM "\0" \
108 "smpflag=smp\0" \
109
110#define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
111#define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
112
113/*
114 * Miscellaneous configurable options
115 */
116#define CONFIG_SYS_LONGHELP /* undef to save memory */
117#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
118#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
119#define CONFIG_SYS_PROMPT V_PROMPT
120/*
121 * Increasing the size of the IO buffer as default nfsargs size is more
122 * than 256 and so it is not possible to edit it
123 */
124#define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
125/* Print Buffer Size */
126#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
127 sizeof(CONFIG_SYS_PROMPT) + 16)
128#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
129/* Boot Argument Buffer Size */
130#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
131
132#define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
133#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
134
135#define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
136#define CONFIG_SYS_HZ 1000
137
138/*-----------------------------------------------------------------------
139 * Stack sizes
140 *
141 * The stack sizes are set up in start.S using the settings below
142 */
143#define CONFIG_STACKBASE 0x2800000 /* 40MB */
144#define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/
145
146/*-----------------------------------------------------------------------
147 * Physical Memory Map
148 */
149#define CONFIG_NR_DRAM_BANKS 1
150#define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
151#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
152
153#define CONFIG_SYS_TEXT_BASE 0x00E08000
154#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
155
156#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
157#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
158#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
159 CONFIG_SYS_INIT_RAM_SIZE - \
160 GENERATED_GBL_DATA_SIZE)
161
162#endif /* __TEGRA2_COMMON_H */