blob: 3a12fe1551497ea899810e0a8746c0f51a717c05 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peng Fanf7765d72017-02-22 16:21:56 +08002/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
Peng Fanf7765d72017-02-22 16:21:56 +08004 */
5
6#include <common.h>
7#include <asm/io.h>
8#include <asm/arch/sys_proto.h>
9#include <asm/arch/mx7ulp-pins.h>
10#include <asm/arch/iomux.h>
11
12DECLARE_GLOBAL_DATA_PTR;
13
14#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
15
16int dram_init(void)
17{
18 gd->ram_size = PHYS_SDRAM_SIZE;
19
20 return 0;
21}
22
23static iomux_cfg_t const lpuart4_pads[] = {
24 MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
25 MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
26};
27
28static void setup_iomux_uart(void)
29{
30 mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
31 ARRAY_SIZE(lpuart4_pads));
32}
33
34int board_early_init_f(void)
35{
36 setup_iomux_uart();
37
38 return 0;
39}
40
41int board_init(void)
42{
43 /* address of boot parameters */
44 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
45
46 return 0;
47}