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Dirk Behme7b84a7b2009-01-28 21:39:58 +01001/*
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -05002 * (C) Copyright 2008-2010
3 * GraÅžvydas Ignotas <notasas@gmail.com>
Dirk Behme7b84a7b2009-01-28 21:39:58 +01004 *
5 * Configuration settings for the OMAP3 Pandora.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#ifndef __CONFIG_H
24#define __CONFIG_H
Dirk Behme7b84a7b2009-01-28 21:39:58 +010025
26/*
27 * High Level Configuration Options
28 */
Dirk Behme7b84a7b2009-01-28 21:39:58 +010029#define CONFIG_OMAP 1 /* in a TI OMAP core */
30#define CONFIG_OMAP34XX 1 /* which is a 34XX */
Dirk Behme7b84a7b2009-01-28 21:39:58 +010031#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
Marek Vasutaede1882012-07-21 05:02:23 +000032#define CONFIG_OMAP_GPIO
Dirk Behme7b84a7b2009-01-28 21:39:58 +010033
Vaibhav Hiremath558d23d2010-06-07 15:20:34 -040034#define CONFIG_SDRC /* The chip has SDRC controller */
35
Dirk Behme7b84a7b2009-01-28 21:39:58 +010036#include <asm/arch/cpu.h> /* get chip and board defs */
37#include <asm/arch/omap3.h>
38
Sanjeev Premie32ef2e2009-04-27 21:27:27 +053039/*
40 * Display CPU and Board information
41 */
42#define CONFIG_DISPLAY_CPUINFO 1
43#define CONFIG_DISPLAY_BOARDINFO 1
44
Dirk Behme7b84a7b2009-01-28 21:39:58 +010045/* Clock Defines */
46#define V_OSCK 26000000 /* Clock output from T2 */
47#define V_SCLK (V_OSCK >> 1)
48
Dirk Behme7b84a7b2009-01-28 21:39:58 +010049#define CONFIG_MISC_INIT_R
50
51#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
52#define CONFIG_SETUP_MEMORY_TAGS 1
53#define CONFIG_INITRD_TAG 1
54#define CONFIG_REVISION_TAG 1
55
Grant Likely100b8492011-03-28 09:59:07 +000056#define CONFIG_OF_LIBFDT 1
57
Dirk Behme7b84a7b2009-01-28 21:39:58 +010058/*
59 * Size of malloc() pool
60 */
Sandeep Paulraj6a87b3f2009-09-09 11:50:40 -040061#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -050062#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
Dirk Behme7b84a7b2009-01-28 21:39:58 +010063
64/*
65 * Hardware drivers
66 */
67
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -050068#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
69#define CONFIG_SYS_DEVICE_NULLDEV 1
70
71/* USB */
72#define CONFIG_MUSB_UDC 1
73#define CONFIG_USB_OMAP3 1
74#define CONFIG_TWL4030_USB 1
75
76/* USB device configuration */
77#define CONFIG_USB_DEVICE 1
78#define CONFIG_USB_TTY 1
79
Dirk Behme7b84a7b2009-01-28 21:39:58 +010080/*
81 * NS16550 Configuration
82 */
83#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
84
85#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
87#define CONFIG_SYS_NS16550_REG_SIZE (-4)
88#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
89
90/*
91 * select serial console configuration
92 */
93#define CONFIG_CONS_INDEX 3
94#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
95#define CONFIG_SERIAL3 3
96
97/* allow to overwrite serial and ethaddr */
98#define CONFIG_ENV_OVERWRITE
99#define CONFIG_BAUDRATE 115200
100#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
101 115200}
Tom Rini83922512011-09-03 21:51:25 -0400102#define CONFIG_GENERIC_MMC 1
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100103#define CONFIG_MMC 1
Tom Rini83922512011-09-03 21:51:25 -0400104#define CONFIG_OMAP_HSMMC 1
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100105#define CONFIG_DOS_PARTITION 1
106
107/* commands to include */
108#include <config_cmd_default.h>
109
110#define CONFIG_CMD_EXT2 /* EXT2 Support */
111#define CONFIG_CMD_FAT /* FAT support */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100112
113#define CONFIG_CMD_I2C /* I2C serial bus support */
114#define CONFIG_CMD_MMC /* MMC support */
115#define CONFIG_CMD_NAND /* NAND support */
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500116#define CONFIG_CMD_CACHE /* Cache control */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100117
118#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
119#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
120#undef CONFIG_CMD_IMI /* iminfo */
121#undef CONFIG_CMD_IMLS /* List all found images */
122#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
123#undef CONFIG_CMD_NFS /* NFS support */
124
125#define CONFIG_SYS_NO_FLASH
Tom Rixd77b6812009-09-29 10:19:49 -0400126#define CONFIG_HARD_I2C 1
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100127#define CONFIG_SYS_I2C_SPEED 100000
128#define CONFIG_SYS_I2C_SLAVE 1
129#define CONFIG_SYS_I2C_BUS 0
130#define CONFIG_SYS_I2C_BUS_SELECT 1
131#define CONFIG_DRIVER_OMAP34XX_I2C 1
132
133/*
Tom Rix0f2a8042009-06-28 12:52:30 -0500134 * TWL4030
135 */
136#define CONFIG_TWL4030_POWER 1
137#define CONFIG_TWL4030_LED 1
138
139/*
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100140 * Board NAND Info.
141 */
142#define CONFIG_NAND_OMAP_GPMC
143#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
144 /* to access nand */
145#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
146 /* to access nand */
147 /* at CS0 */
148#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
149
150#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
151 /* devices */
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500152
153#ifdef CONFIG_CMD_NAND
154#define CONFIG_CMD_MTDPARTS
155#define CONFIG_MTD_PARTITIONS
156#define CONFIG_MTD_DEVICE
157#define CONFIG_CMD_UBI
158#define CONFIG_CMD_UBIFS
159#define CONFIG_RBTREE
160#define CONFIG_LZO
161
162#define MTDIDS_DEFAULT "nand0=nand"
163#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
164 "1920k(uboot),128k(uboot-env),"\
165 "10m(boot),-(rootfs)"
166#else
167#define MTDPARTS_DEFAULT
168#endif
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100169
170/* Environment information */
171#define CONFIG_BOOTDELAY 1
172
173#define CONFIG_EXTRA_ENV_SETTINGS \
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500174 "usbtty=cdc_acm\0" \
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100175 "loadaddr=0x82000000\0" \
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500176 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
Grazvydas Ignotas0c8345b2012-03-22 13:49:23 +0000177 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500178 "mtdparts=" MTDPARTS_DEFAULT "\0" \
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100179
180#define CONFIG_BOOTCOMMAND \
Tom Rini83922512011-09-03 21:51:25 -0400181 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr || " \
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500182 "ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
183 "source ${loadaddr}; " \
184 "fi; " \
185 "ubi part boot && ubifsmount boot && ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100186
187#define CONFIG_AUTO_COMPLETE 1
188/*
189 * Miscellaneous configurable options
190 */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100191#define CONFIG_SYS_LONGHELP /* undef to save memory */
192#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Robert P. J. Day23f5a2d2009-12-12 12:10:33 -0500193#define CONFIG_SYS_PROMPT "Pandora # "
Vaibhav Hiremathe1832902011-09-03 21:24:19 -0400194#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100195/* Print Buffer Size */
196#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
197 sizeof(CONFIG_SYS_PROMPT) + 16)
198#define CONFIG_SYS_MAXARGS 16 /* max number of command */
199 /* args */
200/* Boot Argument Buffer Size */
201#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
202/* memtest works on */
203#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
204#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
205 0x01F00000) /* 31MB */
206
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100207#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
208 /* address */
209
210/*
Manikandan Pillaie8b16962009-04-21 17:29:05 +0200211 * OMAP3 has 12 GP timers, they can be driven by the system clock
212 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
213 * This rate is divided by a local divisor.
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100214 */
Manikandan Pillaie8b16962009-04-21 17:29:05 +0200215#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
216#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
217#define CONFIG_SYS_HZ 1000
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100218
219/*-----------------------------------------------------------------------
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100220 * Physical Memory Map
221 */
222#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
223#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Sandeep Paulraj6a87b3f2009-09-09 11:50:40 -0400224#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100225#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
226
Grazvydas Ignotasa3e22f62010-11-19 11:25:31 -0500227#define CONFIG_SYS_TEXT_BASE 0x80008000
228#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
229#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
230#define CONFIG_SYS_INIT_RAM_SIZE 0x800
231#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
232 CONFIG_SYS_INIT_RAM_SIZE - \
233 GENERATED_GBL_DATA_SIZE)
234
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100235/*-----------------------------------------------------------------------
236 * FLASH and environment organization
237 */
238
239/* **** PISMO SUPPORT *** */
240
241/* Configure the PISMO */
242#define PISMO1_NAND_SIZE GPMC_SIZE_128M
243#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
244
Sandeep Paulraj6a87b3f2009-09-09 11:50:40 -0400245#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100246
Luca Ceresoli9783a2c2011-04-20 11:02:05 -0400247#if defined(CONFIG_CMD_NAND)
248#define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
249#endif
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100250
251/* Monitor at start of flash */
252#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100253
254#define CONFIG_ENV_IS_IN_NAND 1
Grazvydas Ignotas9f4de642010-11-19 11:25:36 -0500255#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100256
Luca Ceresoli9783a2c2011-04-20 11:02:05 -0400257#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
258#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100259#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
260
Aneesh Vfa5c07a2011-11-21 23:38:59 +0000261#define CONFIG_SYS_CACHELINE_SIZE 64
262
Dirk Behme7b84a7b2009-01-28 21:39:58 +0100263#endif /* __CONFIG_H */