Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 3 | * Stelian Pop <stelian@popies.net> |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * |
| 6 | * Configuation settings for the AT91SAM9RLEK board. |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 14 | #include <asm/hardware.h> |
| 15 | |
| 16 | #define CONFIG_SYS_TEXT_BASE 0x21F00000 |
Jens Scharsig | 128ecd0 | 2010-02-03 22:45:42 +0100 | [diff] [blame] | 17 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 18 | /* ARM asynchronous clock */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 19 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 20 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 21 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 22 | #define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */ |
| 23 | |
Jean-Christophe PLAGNIOL-VILLARD | 23164f1 | 2009-04-16 21:30:44 +0200 | [diff] [blame] | 24 | #define CONFIG_ARCH_CPU_INIT |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 25 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 26 | #define CONFIG_BOARD_EARLY_INIT_F |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 27 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 28 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 29 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 30 | #define CONFIG_INITRD_TAG 1 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 31 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 32 | #define CONFIG_DISPLAY_CPUINFO |
| 33 | |
Nicolas Ferre | e4f3623 | 2013-02-20 00:16:24 +0000 | [diff] [blame] | 34 | #define CONFIG_CMD_BOOTZ |
Nicolas Ferre | 6ddbdb1 | 2013-02-20 00:16:23 +0000 | [diff] [blame] | 35 | #define CONFIG_OF_LIBFDT |
| 36 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 37 | #define CONFIG_ATMEL_LEGACY |
| 38 | #define CONFIG_AT91_GPIO 1 |
| 39 | #define CONFIG_AT91_GPIO_PULLUP 1 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 40 | |
| 41 | /* |
| 42 | * Hardware drivers |
| 43 | */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 44 | |
| 45 | /* serial console */ |
| 46 | #define CONFIG_ATMEL_USART |
| 47 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 48 | #define CONFIG_USART_ID ATMEL_ID_SYS |
| 49 | #define CONFIG_BAUDRATE 115200 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 50 | |
Stelian Pop | cea5c53 | 2008-05-08 14:52:32 +0200 | [diff] [blame] | 51 | /* LCD */ |
| 52 | #define CONFIG_LCD 1 |
| 53 | #define LCD_BPP LCD_COLOR8 |
| 54 | #define CONFIG_LCD_LOGO 1 |
| 55 | #undef LCD_TEST_PATTERN |
| 56 | #define CONFIG_LCD_INFO 1 |
| 57 | #define CONFIG_LCD_INFO_BELOW_LOGO 1 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 58 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
Stelian Pop | cea5c53 | 2008-05-08 14:52:32 +0200 | [diff] [blame] | 59 | #define CONFIG_ATMEL_LCD 1 |
| 60 | #define CONFIG_ATMEL_LCD_RGB565 1 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 61 | /* Let board_init_f handle the framebuffer allocation */ |
| 62 | #undef CONFIG_FB_ADDR |
| 63 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 64 | |
Stelian Pop | cea5c53 | 2008-05-08 14:52:32 +0200 | [diff] [blame] | 65 | |
Jean-Christophe PLAGNIOL-VILLARD | 476d10e | 2009-03-21 21:08:00 +0100 | [diff] [blame] | 66 | /* LED */ |
| 67 | #define CONFIG_AT91_LED |
| 68 | #define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */ |
| 69 | #define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ |
| 70 | #define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ |
| 71 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 72 | #define CONFIG_BOOTDELAY 3 |
| 73 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 74 | /* |
| 75 | * Command line configuration. |
| 76 | */ |
| 77 | #include <config_cmd_default.h> |
| 78 | #undef CONFIG_CMD_BDI |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 79 | #undef CONFIG_CMD_FPGA |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 80 | #undef CONFIG_CMD_IMI |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 81 | #undef CONFIG_CMD_IMLS |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 82 | #undef CONFIG_CMD_LOADS |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 83 | #undef CONFIG_CMD_NET |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 84 | #undef CONFIG_CMD_NFS |
Wolfgang Denk | 85c25df | 2009-04-01 23:34:12 +0200 | [diff] [blame] | 85 | #undef CONFIG_CMD_SOURCE |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 86 | #undef CONFIG_CMD_USB |
| 87 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 88 | #define CONFIG_CMD_NAND 1 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 89 | |
| 90 | /* SDRAM */ |
| 91 | #define CONFIG_NR_DRAM_BANKS 1 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 92 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
| 93 | #define CONFIG_SYS_SDRAM_SIZE 0x04000000 |
| 94 | |
| 95 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 96 | (ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 97 | |
| 98 | /* DataFlash */ |
Jean-Christophe PLAGNIOL-VILLARD | e5437ac | 2009-03-27 23:26:44 +0100 | [diff] [blame] | 99 | #define CONFIG_ATMEL_DATAFLASH_SPI |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 100 | #define CONFIG_HAS_DATAFLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 101 | #define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) |
| 102 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 103 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 104 | #define AT91_SPI_CLK 15000000 |
| 105 | #define DATAFLASH_TCSS (0x1a << 16) |
| 106 | #define DATAFLASH_TCHS (0x1 << 24) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 107 | |
| 108 | /* NOR flash - not present */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_NO_FLASH 1 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 110 | |
| 111 | /* NAND flash */ |
Jean-Christophe PLAGNIOL-VILLARD | c9539ba | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 112 | #ifdef CONFIG_CMD_NAND |
| 113 | #define CONFIG_NAND_ATMEL |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 114 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 115 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 116 | #define CONFIG_SYS_NAND_DBW_8 1 |
Jean-Christophe PLAGNIOL-VILLARD | c9539ba | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 117 | /* our ALE is AD21 */ |
| 118 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 119 | /* our CLE is AD22 */ |
| 120 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 121 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 |
| 122 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 |
Wolfgang Denk | 1f79774 | 2009-07-18 21:52:24 +0200 | [diff] [blame] | 123 | |
Jean-Christophe PLAGNIOL-VILLARD | c9539ba | 2009-03-22 10:22:34 +0100 | [diff] [blame] | 124 | #endif |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 125 | |
| 126 | /* Ethernet - not present */ |
| 127 | |
| 128 | /* USB - not supported */ |
| 129 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 130 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 131 | |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 132 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 134 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 135 | #ifdef CONFIG_SYS_USE_DATAFLASH |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 136 | |
| 137 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Jean-Christophe PLAGNIOL-VILLARD | 2b14d2b | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 138 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 140 | #define CONFIG_ENV_OFFSET 0x4200 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 142 | #define CONFIG_ENV_SIZE 0x4200 |
Alexandre Belloni | 9ef19ba | 2012-07-02 04:26:58 +0000 | [diff] [blame] | 143 | #define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm" |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 144 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 145 | "root=/dev/mtdblock0 " \ |
Albin Tonnerre | eaa6db2 | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 146 | "mtdparts=atmel_nand:-(root) "\ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 147 | "rw rootfstype=jffs2" |
| 148 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 149 | #else /* CONFIG_SYS_USE_NANDFLASH */ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 150 | |
| 151 | /* bootstrap + u-boot + env + linux in nandflash */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 152 | #define CONFIG_ENV_IS_IN_NAND 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 153 | #define CONFIG_ENV_OFFSET 0x60000 |
| 154 | #define CONFIG_ENV_OFFSET_REDUND 0x80000 |
| 155 | #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 156 | #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm" |
| 157 | #define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
| 158 | "root=/dev/mtdblock5 " \ |
Albin Tonnerre | eaa6db2 | 2009-07-22 18:30:03 +0200 | [diff] [blame] | 159 | "mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \ |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 160 | "rw rootfstype=jffs2" |
| 161 | |
| 162 | #endif |
| 163 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | #define CONFIG_SYS_PROMPT "U-Boot> " |
| 165 | #define CONFIG_SYS_CBSIZE 256 |
| 166 | #define CONFIG_SYS_MAXARGS 16 |
| 167 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 168 | #define CONFIG_SYS_LONGHELP 1 |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 169 | #define CONFIG_CMDLINE_EDITING 1 |
Alexandre Belloni | 9ef19ba | 2012-07-02 04:26:58 +0000 | [diff] [blame] | 170 | #define CONFIG_AUTO_COMPLETE |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 171 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 172 | /* |
| 173 | * Size of malloc() pool |
| 174 | */ |
Xu, Hong | 0c0fb21 | 2011-08-01 03:56:53 +0000 | [diff] [blame] | 175 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 176 | |
Stelian Pop | 0bf5cad | 2008-05-08 18:52:25 +0200 | [diff] [blame] | 177 | #endif |