Simon Glass | 4a56f10 | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 1 | CONFIG_X86=y |
Bin Meng | 03b341b | 2015-04-27 23:22:24 +0800 | [diff] [blame] | 2 | CONFIG_VENDOR_INTEL=y |
Simon Glass | 4a56f10 | 2015-01-27 22:13:47 -0700 | [diff] [blame] | 3 | CONFIG_DEFAULT_DEVICE_TREE="minnowmax" |
Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 4 | CONFIG_TARGET_MINNOWMAX=y |
5 | CONFIG_HAVE_INTEL_ME=y | ||||
Bin Meng | 9582ad5 | 2015-10-11 21:37:44 -0700 | [diff] [blame] | 6 | CONFIG_ENABLE_MRC_CACHE=y |
Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 7 | CONFIG_SMP=y |
Bin Meng | 519dee0 | 2015-07-09 18:37:40 +0800 | [diff] [blame] | 8 | CONFIG_HAVE_VGA_BIOS=y |
Simon Glass | 7133c39 | 2015-08-13 10:36:16 -0600 | [diff] [blame] | 9 | CONFIG_GENERATE_PIRQ_TABLE=y |
10 | CONFIG_GENERATE_MP_TABLE=y | ||||
Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 11 | CONFIG_FIT=y |
12 | CONFIG_FIT_SIGNATURE=y | ||||
Simon Glass | c08ebf6 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 13 | CONFIG_BOOTSTAGE=y |
14 | CONFIG_BOOTSTAGE_REPORT=y | ||||
Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 15 | CONFIG_HUSH_PARSER=y |
Simon Glass | 1eaaf6c | 2015-04-29 22:26:03 -0600 | [diff] [blame] | 16 | CONFIG_CMD_CPU=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 17 | # CONFIG_CMD_IMLS is not set |
18 | # CONFIG_CMD_FLASH is not set | ||||
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame^] | 19 | CONFIG_CMD_SF=y |
20 | CONFIG_CMD_SPI=y | ||||
21 | CONFIG_CMD_USB=y | ||||
Thomas Chou | 3a077cd | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 22 | CONFIG_CMD_GPIO=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 23 | # CONFIG_CMD_SETEXPR is not set |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame^] | 24 | CONFIG_CMD_DHCP=y |
Joe Hershberger | 5a9d7f1 | 2015-06-22 16:15:30 -0500 | [diff] [blame] | 25 | # CONFIG_CMD_NFS is not set |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame^] | 26 | CONFIG_CMD_PING=y |
27 | CONFIG_CMD_TIME=y | ||||
Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 28 | CONFIG_CMD_BOOTSTAGE=y |
Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 29 | CONFIG_OF_CONTROL=y |
Simon Glass | fb8757b | 2016-03-11 22:07:14 -0700 | [diff] [blame] | 30 | CONFIG_REGMAP=y |
31 | CONFIG_SYSCON=y | ||||
Joe Hershberger | a274ded | 2015-05-12 14:46:24 -0500 | [diff] [blame] | 32 | CONFIG_CPU=y |
Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 33 | CONFIG_SPI_FLASH=y |
Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 34 | CONFIG_SPI_FLASH_GIGADEVICE=y |
35 | CONFIG_SPI_FLASH_MACRONIX=y | ||||
36 | CONFIG_SPI_FLASH_STMICRO=y | ||||
37 | CONFIG_SPI_FLASH_WINBOND=y | ||||
Simon Glass | 31238dd | 2015-08-10 22:02:53 -0600 | [diff] [blame] | 38 | CONFIG_DM_ETH=y |
Bin Meng | 2997122 | 2016-03-21 06:47:42 -0700 | [diff] [blame] | 39 | CONFIG_RTL8169=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 40 | CONFIG_DM_PCI=y |
41 | CONFIG_DM_RTC=y | ||||
Simon Glass | ecab8fa | 2015-08-10 22:02:52 -0600 | [diff] [blame] | 42 | CONFIG_DEBUG_UART=y |
43 | CONFIG_DEBUG_UART_BASE=0x3f8 | ||||
44 | CONFIG_DEBUG_UART_CLOCK=1843200 | ||||
Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 45 | CONFIG_SYS_NS16550=y |
Bin Meng | 72a049d | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 46 | CONFIG_ICH_SPI=y |
Bin Meng | 38de020 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 47 | CONFIG_TIMER=y |
Bin Meng | 63c1098 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 48 | CONFIG_USB=y |
49 | CONFIG_DM_USB=y | ||||
Joe Hershberger | 17491a8 | 2015-06-22 16:15:29 -0500 | [diff] [blame] | 50 | CONFIG_VIDEO_VESA=y |
51 | CONFIG_FRAMEBUFFER_SET_VESA_MODE=y | ||||
52 | CONFIG_FRAMEBUFFER_VESA_MODE_11A=y | ||||
53 | CONFIG_USE_PRIVATE_LIBGCC=y |