blob: 4211eea3a4d678a16cff389caf62d0d314501343 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +08002/*
3 * Faraday USB 2.0 OTG Controller
4 *
5 * (C) Copyright 2010 Faraday Technology
6 * Dante Su <dantesu@faraday-tech.com>
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +08007 */
8
9#include <common.h>
10#include <command.h>
11#include <config.h>
Simon Glass63334482019-11-14 12:57:39 -070012#include <cpu_func.h>
Simon Glass0f2af882020-05-10 11:40:05 -060013#include <log.h>
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +080014#include <net.h>
15#include <malloc.h>
16#include <asm/io.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090017#include <linux/errno.h>
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +080018#include <linux/types.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21
22#include <usb/fotg210.h>
23
24#define CFG_NUM_ENDPOINTS 4
25#define CFG_EP0_MAX_PACKET_SIZE 64
26#define CFG_EPX_MAX_PACKET_SIZE 512
27
28#define CFG_CMD_TIMEOUT (CONFIG_SYS_HZ >> 2) /* 250 ms */
29
30struct fotg210_chip;
31
32struct fotg210_ep {
33 struct usb_ep ep;
34
35 uint maxpacket;
36 uint id;
37 uint stopped;
38
39 struct list_head queue;
40 struct fotg210_chip *chip;
41 const struct usb_endpoint_descriptor *desc;
42};
43
44struct fotg210_request {
45 struct usb_request req;
46 struct list_head queue;
47 struct fotg210_ep *ep;
48};
49
50struct fotg210_chip {
51 struct usb_gadget gadget;
52 struct usb_gadget_driver *driver;
53 struct fotg210_regs *regs;
54 uint8_t irq;
55 uint16_t addr;
56 int pullup;
57 enum usb_device_state state;
58 struct fotg210_ep ep[1 + CFG_NUM_ENDPOINTS];
59};
60
61static struct usb_endpoint_descriptor ep0_desc = {
62 .bLength = sizeof(struct usb_endpoint_descriptor),
63 .bDescriptorType = USB_DT_ENDPOINT,
64 .bEndpointAddress = USB_DIR_IN,
65 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
66};
67
68static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in)
69{
70 return (id < 0) ? 0 : ((id & 0x03) + 1);
71}
72
73static inline int ep_to_fifo(struct fotg210_chip *chip, int id)
74{
75 return (id <= 0) ? -1 : ((id - 1) & 0x03);
76}
77
78static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr)
79{
80 int ep = ep_addr & USB_ENDPOINT_NUMBER_MASK;
81 struct fotg210_regs *regs = chip->regs;
82
83 if (ep_addr & USB_DIR_IN) {
84 /* reset endpoint */
85 setbits_le32(&regs->iep[ep - 1], IEP_RESET);
86 mdelay(1);
87 clrbits_le32(&regs->iep[ep - 1], IEP_RESET);
88 /* clear endpoint stall */
89 clrbits_le32(&regs->iep[ep - 1], IEP_STALL);
90 } else {
91 /* reset endpoint */
92 setbits_le32(&regs->oep[ep - 1], OEP_RESET);
93 mdelay(1);
94 clrbits_le32(&regs->oep[ep - 1], OEP_RESET);
95 /* clear endpoint stall */
96 clrbits_le32(&regs->oep[ep - 1], OEP_STALL);
97 }
98
99 return 0;
100}
101
102static int fotg210_reset(struct fotg210_chip *chip)
103{
104 struct fotg210_regs *regs = chip->regs;
105 uint32_t i;
106
107 chip->state = USB_STATE_POWERED;
108
109 /* chip enable */
110 writel(DEVCTRL_EN, &regs->dev_ctrl);
111
112 /* device address reset */
113 chip->addr = 0;
114 writel(0, &regs->dev_addr);
115
116 /* set idle counter to 7ms */
117 writel(7, &regs->idle);
118
119 /* disable all interrupts */
120 writel(IMR_MASK, &regs->imr);
121 writel(GIMR_MASK, &regs->gimr);
122 writel(GIMR0_MASK, &regs->gimr0);
123 writel(GIMR1_MASK, &regs->gimr1);
124 writel(GIMR2_MASK, &regs->gimr2);
125
126 /* clear interrupts */
127 writel(ISR_MASK, &regs->isr);
128 writel(0, &regs->gisr);
129 writel(0, &regs->gisr0);
130 writel(0, &regs->gisr1);
131 writel(0, &regs->gisr2);
132
133 /* chip reset */
134 setbits_le32(&regs->dev_ctrl, DEVCTRL_RESET);
135 mdelay(10);
136 if (readl(&regs->dev_ctrl) & DEVCTRL_RESET) {
137 printf("fotg210: chip reset failed\n");
138 return -1;
139 }
140
141 /* CX FIFO reset */
142 setbits_le32(&regs->cxfifo, CXFIFO_CXFIFOCLR);
143 mdelay(10);
144 if (readl(&regs->cxfifo) & CXFIFO_CXFIFOCLR) {
145 printf("fotg210: ep0 fifo reset failed\n");
146 return -1;
147 }
148
149 /* create static ep-fifo map (EP1 <-> FIFO0, EP2 <-> FIFO1 ...) */
150 writel(EPMAP14_DEFAULT, &regs->epmap14);
151 writel(EPMAP58_DEFAULT, &regs->epmap58);
152 writel(FIFOMAP_DEFAULT, &regs->fifomap);
153 writel(0, &regs->fifocfg);
154 for (i = 0; i < 8; ++i) {
155 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->iep[i]);
156 writel(CFG_EPX_MAX_PACKET_SIZE, &regs->oep[i]);
157 }
158
159 /* FIFO reset */
160 for (i = 0; i < 4; ++i) {
161 writel(FIFOCSR_RESET, &regs->fifocsr[i]);
162 mdelay(10);
163 if (readl(&regs->fifocsr[i]) & FIFOCSR_RESET) {
164 printf("fotg210: fifo%d reset failed\n", i);
165 return -1;
166 }
167 }
168
169 /* enable only device interrupt and triggered at level-high */
170 writel(IMR_IRQLH | IMR_HOST | IMR_OTG, &regs->imr);
171 writel(ISR_MASK, &regs->isr);
172 /* disable EP0 IN/OUT interrupt */
173 writel(GIMR0_CXOUT | GIMR0_CXIN, &regs->gimr0);
174 /* disable EPX IN+SPK+OUT interrupts */
175 writel(GIMR1_MASK, &regs->gimr1);
176 /* disable wakeup+idle+dma+zlp interrupts */
177 writel(GIMR2_WAKEUP | GIMR2_IDLE | GIMR2_DMAERR | GIMR2_DMAFIN
178 | GIMR2_ZLPRX | GIMR2_ZLPTX, &regs->gimr2);
179 /* enable all group interrupt */
180 writel(0, &regs->gimr);
181
182 /* suspend delay = 3 ms */
183 writel(3, &regs->idle);
184
185 /* turn-on device interrupts */
186 setbits_le32(&regs->dev_ctrl, DEVCTRL_GIRQ_EN);
187
188 return 0;
189}
190
191static inline int fotg210_cxwait(struct fotg210_chip *chip, uint32_t mask)
192{
193 struct fotg210_regs *regs = chip->regs;
194 int ret = -1;
195 ulong ts;
196
197 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
198 if ((readl(&regs->cxfifo) & mask) != mask)
199 continue;
200 ret = 0;
201 break;
202 }
203
204 if (ret)
205 printf("fotg210: cx/ep0 timeout\n");
206
207 return ret;
208}
209
210static int fotg210_dma(struct fotg210_ep *ep, struct fotg210_request *req)
211{
212 struct fotg210_chip *chip = ep->chip;
213 struct fotg210_regs *regs = chip->regs;
214 uint32_t tmp, ts;
215 uint8_t *buf = req->req.buf + req->req.actual;
216 uint32_t len = req->req.length - req->req.actual;
217 int fifo = ep_to_fifo(chip, ep->id);
218 int ret = -EBUSY;
219
220 /* 1. init dma buffer */
221 if (len > ep->maxpacket)
222 len = ep->maxpacket;
223
224 /* 2. wait for dma ready (hardware) */
225 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
226 if (!(readl(&regs->dma_ctrl) & DMACTRL_START)) {
227 ret = 0;
228 break;
229 }
230 }
231 if (ret) {
232 printf("fotg210: dma busy\n");
233 req->req.status = ret;
234 return ret;
235 }
236
237 /* 3. DMA target setup */
238 if (ep->desc->bEndpointAddress & USB_DIR_IN)
239 flush_dcache_range((ulong)buf, (ulong)buf + len);
240 else
241 invalidate_dcache_range((ulong)buf, (ulong)buf + len);
242
243 writel(virt_to_phys(buf), &regs->dma_addr);
244
245 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
246 if (ep->id == 0) {
247 /* Wait until cx/ep0 fifo empty */
248 fotg210_cxwait(chip, CXFIFO_CXFIFOE);
Kuo-Jung Sud07da072013-12-20 12:33:00 +0800249 udelay(1);
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +0800250 writel(DMAFIFO_CX, &regs->dma_fifo);
251 } else {
252 /* Wait until epx fifo empty */
253 fotg210_cxwait(chip, CXFIFO_FIFOE(fifo));
254 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
255 }
256 writel(DMACTRL_LEN(len) | DMACTRL_MEM2FIFO, &regs->dma_ctrl);
257 } else {
258 uint32_t blen;
259
260 if (ep->id == 0) {
261 writel(DMAFIFO_CX, &regs->dma_fifo);
262 do {
263 blen = CXFIFO_BYTES(readl(&regs->cxfifo));
264 } while (blen < len);
265 } else {
266 writel(DMAFIFO_FIFO(fifo), &regs->dma_fifo);
267 blen = FIFOCSR_BYTES(readl(&regs->fifocsr[fifo]));
268 }
269 len = (len < blen) ? len : blen;
270 writel(DMACTRL_LEN(len) | DMACTRL_FIFO2MEM, &regs->dma_ctrl);
271 }
272
273 /* 4. DMA start */
274 setbits_le32(&regs->dma_ctrl, DMACTRL_START);
275
276 /* 5. DMA wait */
277 ret = -EBUSY;
278 for (ts = get_timer(0); get_timer(ts) < CFG_CMD_TIMEOUT; ) {
279 tmp = readl(&regs->gisr2);
280 /* DMA complete */
281 if (tmp & GISR2_DMAFIN) {
282 ret = 0;
283 break;
284 }
285 /* DMA error */
286 if (tmp & GISR2_DMAERR) {
287 printf("fotg210: dma error\n");
288 break;
289 }
290 /* resume, suspend, reset */
291 if (tmp & (GISR2_RESUME | GISR2_SUSPEND | GISR2_RESET)) {
292 printf("fotg210: dma reset by host\n");
293 break;
294 }
295 }
296
297 /* 7. DMA target reset */
298 if (ret)
299 writel(DMACTRL_ABORT | DMACTRL_CLRFF, &regs->dma_ctrl);
300
301 writel(0, &regs->gisr2);
302 writel(0, &regs->dma_fifo);
303
304 req->req.status = ret;
305 if (!ret)
306 req->req.actual += len;
307 else
308 printf("fotg210: ep%d dma error(code=%d)\n", ep->id, ret);
309
310 return len;
311}
312
313/*
314 * result of setup packet
315 */
316#define CX_IDLE 0
317#define CX_FINISH 1
318#define CX_STALL 2
319
320static void fotg210_setup(struct fotg210_chip *chip)
321{
322 int id, ret = CX_IDLE;
323 uint32_t tmp[2];
324 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)tmp;
325 struct fotg210_regs *regs = chip->regs;
326
327 /*
328 * If this is the first Cx 8 byte command,
329 * we can now query USB mode (high/full speed; USB 2.0/USB 1.0)
330 */
331 if (chip->state == USB_STATE_POWERED) {
332 chip->state = USB_STATE_DEFAULT;
333 if (readl(&regs->otgcsr) & OTGCSR_DEV_B) {
334 /* Mini-B */
335 if (readl(&regs->dev_ctrl) & DEVCTRL_HS) {
336 puts("fotg210: HS\n");
337 chip->gadget.speed = USB_SPEED_HIGH;
338 /* SOF mask timer = 1100 ticks */
339 writel(SOFMTR_TMR(1100), &regs->sof_mtr);
340 } else {
341 puts("fotg210: FS\n");
342 chip->gadget.speed = USB_SPEED_FULL;
343 /* SOF mask timer = 10000 ticks */
344 writel(SOFMTR_TMR(10000), &regs->sof_mtr);
345 }
346 } else {
347 printf("fotg210: mini-A?\n");
348 }
349 }
350
351 /* switch data port to ep0 */
352 writel(DMAFIFO_CX, &regs->dma_fifo);
353 /* fetch 8 bytes setup packet */
354 tmp[0] = readl(&regs->ep0_data);
355 tmp[1] = readl(&regs->ep0_data);
356 /* release data port */
357 writel(0, &regs->dma_fifo);
358
359 if (req->bRequestType & USB_DIR_IN)
360 ep0_desc.bEndpointAddress = USB_DIR_IN;
361 else
362 ep0_desc.bEndpointAddress = USB_DIR_OUT;
363
364 ret = CX_IDLE;
365
366 if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
367 switch (req->bRequest) {
368 case USB_REQ_SET_CONFIGURATION:
369 debug("fotg210: set_cfg(%d)\n", req->wValue & 0x00FF);
370 if (!(req->wValue & 0x00FF)) {
371 chip->state = USB_STATE_ADDRESS;
372 writel(chip->addr, &regs->dev_addr);
373 } else {
374 chip->state = USB_STATE_CONFIGURED;
375 writel(chip->addr | DEVADDR_CONF,
376 &regs->dev_addr);
377 }
378 ret = CX_IDLE;
379 break;
380
381 case USB_REQ_SET_ADDRESS:
382 debug("fotg210: set_addr(0x%04X)\n", req->wValue);
383 chip->state = USB_STATE_ADDRESS;
384 chip->addr = req->wValue & DEVADDR_ADDR_MASK;
385 ret = CX_FINISH;
386 writel(chip->addr, &regs->dev_addr);
387 break;
388
389 case USB_REQ_CLEAR_FEATURE:
390 debug("fotg210: clr_feature(%d, %d)\n",
391 req->bRequestType & 0x03, req->wValue);
392 switch (req->wValue) {
393 case 0: /* [Endpoint] halt */
394 ep_reset(chip, req->wIndex);
395 ret = CX_FINISH;
396 break;
397 case 1: /* [Device] remote wake-up */
398 case 2: /* [Device] test mode */
399 default:
400 ret = CX_STALL;
401 break;
402 }
403 break;
404
405 case USB_REQ_SET_FEATURE:
406 debug("fotg210: set_feature(%d, %d)\n",
407 req->wValue, req->wIndex & 0xf);
408 switch (req->wValue) {
409 case 0: /* Endpoint Halt */
410 id = req->wIndex & 0xf;
411 setbits_le32(&regs->iep[id - 1], IEP_STALL);
412 setbits_le32(&regs->oep[id - 1], OEP_STALL);
413 ret = CX_FINISH;
414 break;
415 case 1: /* Remote Wakeup */
416 case 2: /* Test Mode */
417 default:
418 ret = CX_STALL;
419 break;
420 }
421 break;
422
423 case USB_REQ_GET_STATUS:
424 debug("fotg210: get_status\n");
425 ret = CX_STALL;
426 break;
427
428 case USB_REQ_SET_DESCRIPTOR:
429 debug("fotg210: set_descriptor\n");
430 ret = CX_STALL;
431 break;
432
433 case USB_REQ_SYNCH_FRAME:
434 debug("fotg210: sync frame\n");
435 ret = CX_STALL;
436 break;
437 }
438 } /* if ((req->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) */
439
440 if (ret == CX_IDLE && chip->driver->setup) {
441 if (chip->driver->setup(&chip->gadget, req) < 0)
442 ret = CX_STALL;
443 else
444 ret = CX_FINISH;
445 }
446
447 switch (ret) {
448 case CX_FINISH:
449 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
450 break;
451
452 case CX_STALL:
453 setbits_le32(&regs->cxfifo, CXFIFO_CXSTALL | CXFIFO_CXFIN);
454 printf("fotg210: cx_stall!\n");
455 break;
456
457 case CX_IDLE:
458 debug("fotg210: cx_idle?\n");
459 default:
460 break;
461 }
462}
463
464/*
465 * fifo - FIFO id
466 * zlp - zero length packet
467 */
468static void fotg210_recv(struct fotg210_chip *chip, int ep_id)
469{
470 struct fotg210_regs *regs = chip->regs;
471 struct fotg210_ep *ep = chip->ep + ep_id;
472 struct fotg210_request *req;
473 int len;
474
475 if (ep->stopped || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
476 printf("fotg210: ep%d recv, invalid!\n", ep->id);
477 return;
478 }
479
480 if (list_empty(&ep->queue)) {
481 printf("fotg210: ep%d recv, drop!\n", ep->id);
482 return;
483 }
484
485 req = list_first_entry(&ep->queue, struct fotg210_request, queue);
486 len = fotg210_dma(ep, req);
487 if (len < ep->ep.maxpacket || req->req.length <= req->req.actual) {
488 list_del_init(&req->queue);
489 if (req->req.complete)
490 req->req.complete(&ep->ep, &req->req);
491 }
492
493 if (ep->id > 0 && list_empty(&ep->queue)) {
494 setbits_le32(&regs->gimr1,
495 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
496 }
497}
498
499/*
500 * USB Gadget Layer
501 */
502static int fotg210_ep_enable(
503 struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
504{
505 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
506 struct fotg210_chip *chip = ep->chip;
507 struct fotg210_regs *regs = chip->regs;
508 int id = ep_to_fifo(chip, ep->id);
509 int in = (desc->bEndpointAddress & USB_DIR_IN) ? 1 : 0;
510
511 if (!_ep || !desc
512 || desc->bDescriptorType != USB_DT_ENDPOINT
513 || le16_to_cpu(desc->wMaxPacketSize) == 0) {
514 printf("fotg210: bad ep or descriptor\n");
515 return -EINVAL;
516 }
517
518 ep->desc = desc;
519 ep->stopped = 0;
520
521 if (in)
522 setbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_IN));
523
524 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
525 case USB_ENDPOINT_XFER_CONTROL:
526 return -EINVAL;
527
528 case USB_ENDPOINT_XFER_ISOC:
529 setbits_le32(&regs->fifocfg,
530 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_ISOC));
531 break;
532
533 case USB_ENDPOINT_XFER_BULK:
534 setbits_le32(&regs->fifocfg,
535 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_BULK));
536 break;
537
538 case USB_ENDPOINT_XFER_INT:
539 setbits_le32(&regs->fifocfg,
540 FIFOCFG(id, FIFOCFG_EN | FIFOCFG_INTR));
541 break;
542 }
543
544 return 0;
545}
546
547static int fotg210_ep_disable(struct usb_ep *_ep)
548{
549 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
550 struct fotg210_chip *chip = ep->chip;
551 struct fotg210_regs *regs = chip->regs;
552 int id = ep_to_fifo(chip, ep->id);
553
554 ep->desc = NULL;
555 ep->stopped = 1;
556
557 clrbits_le32(&regs->fifocfg, FIFOCFG(id, FIFOCFG_CFG_MASK));
558 clrbits_le32(&regs->fifomap, FIFOMAP(id, FIFOMAP_DIR_MASK));
559
560 return 0;
561}
562
563static struct usb_request *fotg210_ep_alloc_request(
564 struct usb_ep *_ep, gfp_t gfp_flags)
565{
566 struct fotg210_request *req = malloc(sizeof(*req));
567
568 if (req) {
569 memset(req, 0, sizeof(*req));
570 INIT_LIST_HEAD(&req->queue);
571 }
572 return &req->req;
573}
574
575static void fotg210_ep_free_request(
576 struct usb_ep *_ep, struct usb_request *_req)
577{
578 struct fotg210_request *req;
579
580 req = container_of(_req, struct fotg210_request, req);
581 free(req);
582}
583
584static int fotg210_ep_queue(
585 struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
586{
587 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
588 struct fotg210_chip *chip = ep->chip;
589 struct fotg210_regs *regs = chip->regs;
590 struct fotg210_request *req;
591
592 req = container_of(_req, struct fotg210_request, req);
593 if (!_req || !_req->complete || !_req->buf
594 || !list_empty(&req->queue)) {
595 printf("fotg210: invalid request to ep%d\n", ep->id);
596 return -EINVAL;
597 }
598
599 if (!chip || chip->state == USB_STATE_SUSPENDED) {
600 printf("fotg210: request while chip suspended\n");
601 return -EINVAL;
602 }
603
604 req->req.actual = 0;
605 req->req.status = -EINPROGRESS;
606
607 if (req->req.length == 0) {
608 req->req.status = 0;
609 if (req->req.complete)
610 req->req.complete(&ep->ep, &req->req);
611 return 0;
612 }
613
614 if (ep->id == 0) {
615 do {
616 int len = fotg210_dma(ep, req);
617 if (len < ep->ep.maxpacket)
618 break;
619 if (ep->desc->bEndpointAddress & USB_DIR_IN)
620 udelay(100);
621 } while (req->req.length > req->req.actual);
622 } else {
623 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
624 do {
625 int len = fotg210_dma(ep, req);
626 if (len < ep->ep.maxpacket)
627 break;
628 } while (req->req.length > req->req.actual);
629 } else {
630 list_add_tail(&req->queue, &ep->queue);
631 clrbits_le32(&regs->gimr1,
632 GIMR1_FIFO_RX(ep_to_fifo(chip, ep->id)));
633 }
634 }
635
636 if (ep->id == 0 || (ep->desc->bEndpointAddress & USB_DIR_IN)) {
637 if (req->req.complete)
638 req->req.complete(&ep->ep, &req->req);
639 }
640
641 return 0;
642}
643
644static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
645{
646 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
647 struct fotg210_request *req;
648
649 /* make sure it's actually queued on this endpoint */
650 list_for_each_entry(req, &ep->queue, queue) {
651 if (&req->req == _req)
652 break;
653 }
654 if (&req->req != _req)
655 return -EINVAL;
656
657 /* remove the request */
658 list_del_init(&req->queue);
659
660 /* update status & invoke complete callback */
661 if (req->req.status == -EINPROGRESS) {
662 req->req.status = -ECONNRESET;
663 if (req->req.complete)
664 req->req.complete(_ep, &req->req);
665 }
666
667 return 0;
668}
669
670static int fotg210_ep_halt(struct usb_ep *_ep, int halt)
671{
672 struct fotg210_ep *ep = container_of(_ep, struct fotg210_ep, ep);
673 struct fotg210_chip *chip = ep->chip;
674 struct fotg210_regs *regs = chip->regs;
675 int ret = -1;
676
677 debug("fotg210: ep%d halt=%d\n", ep->id, halt);
678
679 /* Endpoint STALL */
680 if (ep->id > 0 && ep->id <= CFG_NUM_ENDPOINTS) {
681 if (halt) {
682 /* wait until all ep fifo empty */
683 fotg210_cxwait(chip, 0xf00);
684 /* stall */
685 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
686 setbits_le32(&regs->iep[ep->id - 1],
687 IEP_STALL);
688 } else {
689 setbits_le32(&regs->oep[ep->id - 1],
690 OEP_STALL);
691 }
692 } else {
693 if (ep->desc->bEndpointAddress & USB_DIR_IN) {
694 clrbits_le32(&regs->iep[ep->id - 1],
695 IEP_STALL);
696 } else {
697 clrbits_le32(&regs->oep[ep->id - 1],
698 OEP_STALL);
699 }
700 }
701 ret = 0;
702 }
703
704 return ret;
705}
706
707/*
708 * activate/deactivate link with host.
709 */
710static void pullup(struct fotg210_chip *chip, int is_on)
711{
712 struct fotg210_regs *regs = chip->regs;
713
714 if (is_on) {
715 if (!chip->pullup) {
716 chip->state = USB_STATE_POWERED;
717 chip->pullup = 1;
718 /* enable the chip */
719 setbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
720 /* clear unplug bit (BIT0) */
721 clrbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
722 }
723 } else {
724 chip->state = USB_STATE_NOTATTACHED;
725 chip->pullup = 0;
726 chip->addr = 0;
727 writel(chip->addr, &regs->dev_addr);
728 /* set unplug bit (BIT0) */
729 setbits_le32(&regs->phy_tmsr, PHYTMSR_UNPLUG);
730 /* disable the chip */
731 clrbits_le32(&regs->dev_ctrl, DEVCTRL_EN);
732 }
733}
734
735static int fotg210_pullup(struct usb_gadget *_gadget, int is_on)
736{
737 struct fotg210_chip *chip;
738
739 chip = container_of(_gadget, struct fotg210_chip, gadget);
740
741 debug("fotg210: pullup=%d\n", is_on);
742
743 pullup(chip, is_on);
744
745 return 0;
746}
747
748static int fotg210_get_frame(struct usb_gadget *_gadget)
749{
750 struct fotg210_chip *chip;
751 struct fotg210_regs *regs;
752
753 chip = container_of(_gadget, struct fotg210_chip, gadget);
754 regs = chip->regs;
755
756 return SOFFNR_FNR(readl(&regs->sof_fnr));
757}
758
759static struct usb_gadget_ops fotg210_gadget_ops = {
760 .get_frame = fotg210_get_frame,
761 .pullup = fotg210_pullup,
762};
763
764static struct usb_ep_ops fotg210_ep_ops = {
765 .enable = fotg210_ep_enable,
766 .disable = fotg210_ep_disable,
767 .queue = fotg210_ep_queue,
768 .dequeue = fotg210_ep_dequeue,
769 .set_halt = fotg210_ep_halt,
770 .alloc_request = fotg210_ep_alloc_request,
771 .free_request = fotg210_ep_free_request,
772};
773
774static struct fotg210_chip controller = {
775 .regs = (void __iomem *)CONFIG_FOTG210_BASE,
776 .gadget = {
777 .name = "fotg210_udc",
778 .ops = &fotg210_gadget_ops,
779 .ep0 = &controller.ep[0].ep,
780 .speed = USB_SPEED_UNKNOWN,
781 .is_dualspeed = 1,
782 .is_otg = 0,
783 .is_a_peripheral = 0,
784 .b_hnp_enable = 0,
785 .a_hnp_support = 0,
786 .a_alt_hnp_support = 0,
787 },
788 .ep[0] = {
789 .id = 0,
790 .ep = {
791 .name = "ep0",
792 .ops = &fotg210_ep_ops,
793 },
794 .desc = &ep0_desc,
795 .chip = &controller,
796 .maxpacket = CFG_EP0_MAX_PACKET_SIZE,
797 },
798 .ep[1] = {
799 .id = 1,
800 .ep = {
801 .name = "ep1",
802 .ops = &fotg210_ep_ops,
803 },
804 .chip = &controller,
805 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
806 },
807 .ep[2] = {
808 .id = 2,
809 .ep = {
810 .name = "ep2",
811 .ops = &fotg210_ep_ops,
812 },
813 .chip = &controller,
814 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
815 },
816 .ep[3] = {
817 .id = 3,
818 .ep = {
819 .name = "ep3",
820 .ops = &fotg210_ep_ops,
821 },
822 .chip = &controller,
823 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
824 },
825 .ep[4] = {
826 .id = 4,
827 .ep = {
828 .name = "ep4",
829 .ops = &fotg210_ep_ops,
830 },
831 .chip = &controller,
832 .maxpacket = CFG_EPX_MAX_PACKET_SIZE,
833 },
834};
835
Kishon Vijay Abraham I4763e162015-02-23 18:40:23 +0530836int usb_gadget_handle_interrupts(int index)
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +0800837{
838 struct fotg210_chip *chip = &controller;
839 struct fotg210_regs *regs = chip->regs;
840 uint32_t id, st, isr, gisr;
841
842 isr = readl(&regs->isr) & (~readl(&regs->imr));
843 gisr = readl(&regs->gisr) & (~readl(&regs->gimr));
844 if (!(isr & ISR_DEV) || !gisr)
845 return 0;
846
847 writel(ISR_DEV, &regs->isr);
848
849 /* CX interrupts */
850 if (gisr & GISR_GRP0) {
851 st = readl(&regs->gisr0);
Kuo-Jung Sue8acd192013-12-20 12:32:59 +0800852 /*
853 * Write 1 and then 0 works for both W1C & RW.
854 *
855 * HW v1.11.0+: It's a W1C register (write 1 clear)
856 * HW v1.10.0-: It's a R/W register (write 0 clear)
857 */
858 writel(st & GISR0_CXABORT, &regs->gisr0);
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +0800859 writel(0, &regs->gisr0);
860
861 if (st & GISR0_CXERR)
862 printf("fotg210: cmd error\n");
863
864 if (st & GISR0_CXABORT)
865 printf("fotg210: cmd abort\n");
866
867 if (st & GISR0_CXSETUP) /* setup */
868 fotg210_setup(chip);
869 else if (st & GISR0_CXEND) /* command finish */
870 setbits_le32(&regs->cxfifo, CXFIFO_CXFIN);
871 }
872
873 /* FIFO interrupts */
874 if (gisr & GISR_GRP1) {
875 st = readl(&regs->gisr1);
876 for (id = 0; id < 4; ++id) {
877 if (st & GISR1_RX_FIFO(id))
878 fotg210_recv(chip, fifo_to_ep(chip, id, 0));
879 }
880 }
881
882 /* Device Status Interrupts */
883 if (gisr & GISR_GRP2) {
884 st = readl(&regs->gisr2);
Kuo-Jung Sue8acd192013-12-20 12:32:59 +0800885 /*
886 * Write 1 and then 0 works for both W1C & RW.
887 *
888 * HW v1.11.0+: It's a W1C register (write 1 clear)
889 * HW v1.10.0-: It's a R/W register (write 0 clear)
890 */
891 writel(st, &regs->gisr2);
Kuo-Jung Su78ba07d2013-05-15 15:29:24 +0800892 writel(0, &regs->gisr2);
893
894 if (st & GISR2_RESET)
895 printf("fotg210: reset by host\n");
896 else if (st & GISR2_SUSPEND)
897 printf("fotg210: suspend/removed\n");
898 else if (st & GISR2_RESUME)
899 printf("fotg210: resume\n");
900
901 /* Errors */
902 if (st & GISR2_ISOCERR)
903 printf("fotg210: iso error\n");
904 if (st & GISR2_ISOCABT)
905 printf("fotg210: iso abort\n");
906 if (st & GISR2_DMAERR)
907 printf("fotg210: dma error\n");
908 }
909
910 return 0;
911}
912
913int usb_gadget_register_driver(struct usb_gadget_driver *driver)
914{
915 int i, ret = 0;
916 struct fotg210_chip *chip = &controller;
917
918 if (!driver || !driver->bind || !driver->setup) {
919 puts("fotg210: bad parameter.\n");
920 return -EINVAL;
921 }
922
923 INIT_LIST_HEAD(&chip->gadget.ep_list);
924 for (i = 0; i < CFG_NUM_ENDPOINTS + 1; ++i) {
925 struct fotg210_ep *ep = chip->ep + i;
926
927 ep->ep.maxpacket = ep->maxpacket;
928 INIT_LIST_HEAD(&ep->queue);
929
930 if (ep->id == 0) {
931 ep->stopped = 0;
932 } else {
933 ep->stopped = 1;
934 list_add_tail(&ep->ep.ep_list, &chip->gadget.ep_list);
935 }
936 }
937
938 if (fotg210_reset(chip)) {
939 puts("fotg210: reset failed.\n");
940 return -EINVAL;
941 }
942
943 ret = driver->bind(&chip->gadget);
944 if (ret) {
945 debug("fotg210: driver->bind() returned %d\n", ret);
946 return ret;
947 }
948 chip->driver = driver;
949
950 return ret;
951}
952
953int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
954{
955 struct fotg210_chip *chip = &controller;
956
957 driver->unbind(&chip->gadget);
958 chip->driver = NULL;
959
960 pullup(chip, 0);
961
962 return 0;
963}