blob: 1f77f84990ba9545a00f16c95363e2b44bcb3555 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07002/*
3 * Copyright (C) 2014 Freescale Semiconductor
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07004 */
5
Simon Glass0f2af882020-05-10 11:40:05 -06006#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -07007#include <malloc.h>
Simon Glass243182c2017-05-17 08:23:06 -06008#include <asm/arch/clock.h>
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07009#include "qbman_portal.h"
10
11/* QBMan portal management command codes */
12#define QBMAN_MC_ACQUIRE 0x30
13#define QBMAN_WQCHAN_CONFIGURE 0x46
14
15/* CINH register offsets */
16#define QBMAN_CINH_SWP_EQAR 0x8c0
17#define QBMAN_CINH_SWP_DCAP 0xac0
18#define QBMAN_CINH_SWP_SDQCR 0xb00
19#define QBMAN_CINH_SWP_RAR 0xcc0
20
21/* CENA register offsets */
22#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
23#define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
24#define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6))
25#define QBMAN_CENA_SWP_CR 0x600
26#define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
27#define QBMAN_CENA_SWP_VDQCR 0x780
28
29/* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
Priyanka Jain9de71602016-12-07 12:04:05 +053030#define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070031
32/*******************************/
33/* Pre-defined attribute codes */
34/*******************************/
35
36struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
37struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
38
39/*************************/
40/* SDQCR attribute codes */
41/*************************/
42
43/* we put these here because at least some of them are required by
44 * qbman_swp_init() */
45struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
46struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
47struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
48#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
49enum qbman_sdqcr_dct {
50 qbman_sdqcr_dct_null = 0,
51 qbman_sdqcr_dct_prio_ics,
52 qbman_sdqcr_dct_active_ics,
53 qbman_sdqcr_dct_active
54};
55enum qbman_sdqcr_fc {
56 qbman_sdqcr_fc_one = 0,
57 qbman_sdqcr_fc_up_to_3 = 1
58};
59
60/*********************************/
61/* Portal constructor/destructor */
62/*********************************/
63
64/* Software portals should always be in the power-on state when we initialise,
65 * due to the CCSR-based portal reset functionality that MC has. */
66struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
67{
68 int ret;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053069 struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
Priyanka Jain9de71602016-12-07 12:04:05 +053070 u32 major = 0, minor = 0;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070071
72 if (!p)
73 return NULL;
74 p->desc = d;
75#ifdef QBMAN_CHECKING
76 p->mc.check = swp_mc_can_start;
77#endif
78 p->mc.valid_bit = QB_VALID_BIT;
79 p->sdq = 0;
80 qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
81 qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
82 qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053083 atomic_set(&p->vdq.busy, 1);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070084 p->vdq.valid_bit = QB_VALID_BIT;
85 p->dqrr.next_idx = 0;
Priyanka Jain9de71602016-12-07 12:04:05 +053086
87 qbman_version(&major, &minor);
88 if (!major) {
89 printf("invalid qbman version\n");
90 return NULL;
91 }
92
93 if (major >= 4 && minor >= 1)
94 p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
95 else
96 p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
97
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070098 p->dqrr.valid_bit = QB_VALID_BIT;
Priyanka Jain9de71602016-12-07 12:04:05 +053099 ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700100 if (ret) {
101 free(p);
102 printf("qbman_swp_sys_init() failed %d\n", ret);
103 return NULL;
104 }
105 qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
106 return p;
107}
108
109/***********************/
110/* Management commands */
111/***********************/
112
113/*
114 * Internal code common to all types of management commands.
115 */
116
117void *qbman_swp_mc_start(struct qbman_swp *p)
118{
119 void *ret;
Pratiyush Mohan Srivastavad2d567d2015-12-22 16:50:19 +0530120 int *return_val;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700121#ifdef QBMAN_CHECKING
122 BUG_ON(p->mc.check != swp_mc_can_start);
123#endif
124 ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
125#ifdef QBMAN_CHECKING
Pratiyush Mohan Srivastavad2d567d2015-12-22 16:50:19 +0530126 return_val = (int *)ret;
127 if (!(*return_val))
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700128 p->mc.check = swp_mc_can_submit;
129#endif
130 return ret;
131}
132
133void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
134{
135 uint32_t *v = cmd;
136#ifdef QBMAN_CHECKING
Tom Rinifd6fb772015-11-28 08:04:42 -0500137 BUG_ON(p->mc.check != swp_mc_can_submit);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700138#endif
139 lwsync();
140 /* TBD: "|=" is going to hurt performance. Need to move as many fields
141 * out of word zero, and for those that remain, the "OR" needs to occur
142 * at the caller side. This debug check helps to catch cases where the
143 * caller wants to OR but has forgotten to do so. */
144 BUG_ON((*v & cmd_verb) != *v);
145 *v = cmd_verb | p->mc.valid_bit;
146 qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
147 /* TODO: add prefetch support for GPP */
148#ifdef QBMAN_CHECKING
149 p->mc.check = swp_mc_can_poll;
150#endif
151}
152
153void *qbman_swp_mc_result(struct qbman_swp *p)
154{
155 uint32_t *ret, verb;
156#ifdef QBMAN_CHECKING
157 BUG_ON(p->mc.check != swp_mc_can_poll);
158#endif
159 ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
160 /* Remove the valid-bit - command completed iff the rest is non-zero */
161 verb = ret[0] & ~QB_VALID_BIT;
162 if (!verb)
163 return NULL;
164#ifdef QBMAN_CHECKING
165 p->mc.check = swp_mc_can_start;
166#endif
167 p->mc.valid_bit ^= QB_VALID_BIT;
168 return ret;
169}
170
171/***********/
172/* Enqueue */
173/***********/
174
175/* These should be const, eventually */
176static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
177static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
178static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
179/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
180static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
181static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
182static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
183static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
184static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700185
186enum qbman_eq_cmd_e {
187 /* No enqueue, primarily for plugging ORP gaps for dropped frames */
188 qbman_eq_cmd_empty,
189 /* DMA an enqueue response once complete */
190 qbman_eq_cmd_respond,
191 /* DMA an enqueue response only if the enqueue fails */
192 qbman_eq_cmd_respond_reject
193};
194
195void qbman_eq_desc_clear(struct qbman_eq_desc *d)
196{
197 memset(d, 0, sizeof(*d));
198}
199
200void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
201{
202 uint32_t *cl = qb_cl(d);
203
204 qb_attr_code_encode(&code_eq_orp_en, cl, 0);
205 qb_attr_code_encode(&code_eq_cmd, cl,
206 respond_success ? qbman_eq_cmd_respond :
207 qbman_eq_cmd_respond_reject);
208}
209
210void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
211 dma_addr_t storage_phys,
212 int stash)
213{
214 uint32_t *cl = qb_cl(d);
215
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530216 qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700217 qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
218}
219
220
221void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
222 uint32_t qd_bin, uint32_t qd_prio)
223{
224 uint32_t *cl = qb_cl(d);
225
226 qb_attr_code_encode(&code_eq_qd_en, cl, 1);
227 qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
228 qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
229 qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
230}
231
232#define EQAR_IDX(eqar) ((eqar) & 0x7)
233#define EQAR_VB(eqar) ((eqar) & 0x80)
234#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
235
236int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
237 const struct qbman_fd *fd)
238{
239 uint32_t *p;
240 const uint32_t *cl = qb_cl(d);
241 uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
242 debug("EQAR=%08x\n", eqar);
243 if (!EQAR_SUCCESS(eqar))
244 return -EBUSY;
245 p = qbman_cena_write_start(&s->sys,
246 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
247 word_copy(&p[1], &cl[1], 7);
248 word_copy(&p[8], fd, sizeof(*fd) >> 2);
249 lwsync();
250 /* Set the verb byte, have to substitute in the valid-bit */
251 p[0] = cl[0] | EQAR_VB(eqar);
252 qbman_cena_write_complete(&s->sys,
253 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
254 p);
255 return 0;
256}
257
258/***************************/
259/* Volatile (pull) dequeue */
260/***************************/
261
262/* These should be const, eventually */
263static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
264static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
265static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
266static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
267static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
268static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
269static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
270static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700271
272enum qb_pull_dt_e {
273 qb_pull_dt_channel,
274 qb_pull_dt_workqueue,
275 qb_pull_dt_framequeue
276};
277
278void qbman_pull_desc_clear(struct qbman_pull_desc *d)
279{
280 memset(d, 0, sizeof(*d));
281}
282
283void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
284 struct ldpaa_dq *storage,
285 dma_addr_t storage_phys,
286 int stash)
287{
288 uint32_t *cl = qb_cl(d);
289
290 /* Squiggle the pointer 'storage' into the extra 2 words of the
291 * descriptor (which aren't copied to the hw command) */
292 *(void **)&cl[4] = storage;
293 if (!storage) {
294 qb_attr_code_encode(&code_pull_rls, cl, 0);
295 return;
296 }
297 qb_attr_code_encode(&code_pull_rls, cl, 1);
298 qb_attr_code_encode(&code_pull_stash, cl, !!stash);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530299 qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700300}
301
302void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
303{
304 uint32_t *cl = qb_cl(d);
305
306 BUG_ON(!numframes || (numframes > 16));
307 qb_attr_code_encode(&code_pull_numframes, cl,
308 (uint32_t)(numframes - 1));
309}
310
311void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
312{
313 uint32_t *cl = qb_cl(d);
314
315 qb_attr_code_encode(&code_pull_token, cl, token);
316}
317
318void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
319{
320 uint32_t *cl = qb_cl(d);
321
322 qb_attr_code_encode(&code_pull_dct, cl, 1);
323 qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
324 qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
325}
326
327int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
328{
329 uint32_t *p;
330 uint32_t *cl = qb_cl(d);
331
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530332 if (!atomic_dec_and_test(&s->vdq.busy)) {
333 atomic_inc(&s->vdq.busy);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700334 return -EBUSY;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530335 }
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700336 s->vdq.storage = *(void **)&cl[4];
337 s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
338 p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
339 word_copy(&p[1], &cl[1], 3);
340 lwsync();
341 /* Set the verb byte, have to substitute in the valid-bit */
342 p[0] = cl[0] | s->vdq.valid_bit;
343 s->vdq.valid_bit ^= QB_VALID_BIT;
344 qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
345 return 0;
346}
347
348/****************/
349/* Polling DQRR */
350/****************/
351
352static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
353static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
354static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
355
356#define QBMAN_DQRR_RESPONSE_DQ 0x60
357#define QBMAN_DQRR_RESPONSE_FQRN 0x21
358#define QBMAN_DQRR_RESPONSE_FQRNI 0x22
359#define QBMAN_DQRR_RESPONSE_FQPN 0x24
360#define QBMAN_DQRR_RESPONSE_FQDAN 0x25
361#define QBMAN_DQRR_RESPONSE_CDAN 0x26
362#define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27
363#define QBMAN_DQRR_RESPONSE_CGCU 0x28
364#define QBMAN_DQRR_RESPONSE_BPSCN 0x29
365#define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a
366
367
368/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
369 * only once, so repeated calls can return a sequence of DQRR entries, without
370 * requiring they be consumed immediately or in any particular order. */
371const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
372{
373 uint32_t verb;
374 uint32_t response_verb;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530375 uint32_t flags;
376 const struct ldpaa_dq *dq;
377 const uint32_t *p;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700378
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530379 dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
380 p = qb_cl(dq);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700381 verb = qb_attr_code_decode(&code_dqrr_verb, p);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530382
383 /* If the valid-bit isn't of the expected polarity, nothing there. Note,
384 * in the DQRR reset bug workaround, we shouldn't need to skip these
385 * check, because we've already determined that a new entry is available
386 * and we've invalidated the cacheline before reading it, so the
387 * valid-bit behaviour is repaired and should tell us what we already
388 * knew from reading PI.
389 */
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700390 if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
391 qbman_cena_invalidate_prefetch(&s->sys,
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530392 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700393 return NULL;
394 }
395 /* There's something there. Move "next_idx" attention to the next ring
396 * entry (and prefetch it) before returning what we found. */
397 s->dqrr.next_idx++;
Priyanka Jain9de71602016-12-07 12:04:05 +0530398 s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700399 /* TODO: it's possible to do all this without conditionals, optimise it
400 * later. */
401 if (!s->dqrr.next_idx)
402 s->dqrr.valid_bit ^= QB_VALID_BIT;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700403
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530404 /* If this is the final response to a volatile dequeue command
405 indicate that the vdq is no longer busy */
406 flags = ldpaa_dq_flags(dq);
407 response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
408 if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
409 (flags & LDPAA_DQ_STAT_VOLATILE) &&
410 (flags & LDPAA_DQ_STAT_EXPIRED))
411 atomic_inc(&s->vdq.busy);
412
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700413 qbman_cena_invalidate_prefetch(&s->sys,
414 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
415 return dq;
416}
417
418/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
419void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
420{
421 qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
422}
423
424/*********************************/
425/* Polling user-provided storage */
426/*********************************/
427
428void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
429 unsigned int num_entries,
430 uint8_t oldtoken)
431{
432 memset(dq, oldtoken, num_entries * sizeof(*dq));
433}
434
435int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
436 const struct ldpaa_dq *dq,
437 uint8_t newtoken)
438{
439 /* To avoid converting the little-endian DQ entry to host-endian prior
440 * to us knowing whether there is a valid entry or not (and run the
441 * risk of corrupting the incoming hardware LE write), we detect in
442 * hardware endianness rather than host. This means we need a different
443 * "code" depending on whether we are BE or LE in software, which is
444 * where DQRR_TOK_OFFSET comes in... */
445 static struct qb_attr_code code_dqrr_tok_detect =
446 QB_CODE(0, DQRR_TOK_OFFSET, 8);
447 /* The user trying to poll for a result treats "dq" as const. It is
448 * however the same address that was provided to us non-const in the
449 * first place, for directing hardware DMA to. So we can cast away the
450 * const because it is mutable from our perspective. */
451 uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
452 uint32_t token;
453
454 token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
455 if (token != newtoken)
456 return 0;
457
458 /* Only now do we convert from hardware to host endianness. Also, as we
459 * are returning success, the user has promised not to call us again, so
460 * there's no risk of us converting the endianness twice... */
461 make_le32_n(p, 16);
462
463 /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
464 * fact "VDQCR" shows busy doesn't mean that the result we're looking at
465 * is from the same command. Eg. we may be looking at our 10th dequeue
466 * result from our first VDQCR command, yet the second dequeue command
467 * could have been kicked off already, after seeing the 1st result. Ie.
468 * the result we're looking at is not necessarily proof that we can
469 * reset "busy". We instead base the decision on whether the current
470 * result is sitting at the first 'storage' location of the busy
471 * command. */
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530472 if (s->vdq.storage == dq) {
473 s->vdq.storage = NULL;
474 atomic_inc(&s->vdq.busy);
475 }
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700476 return 1;
477}
478
479/********************************/
480/* Categorising dequeue entries */
481/********************************/
482
483static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
484{
485 const uint32_t *p = qb_cl(dq);
486 uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
487
488 return response_verb == x;
489}
490
491int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
492{
493 return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
494}
495
496/*********************************/
497/* Parsing frame dequeue results */
498/*********************************/
499
500/* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
501
502uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
503{
504 const uint32_t *p = qb_cl(dq);
505
506 return qb_attr_code_decode(&code_dqrr_stat, p);
507}
508
509const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
510{
511 const uint32_t *p = qb_cl(dq);
512
513 return (const struct dpaa_fd *)&p[8];
514}
515
516/******************/
517/* Buffer release */
518/******************/
519
520/* These should be const, eventually */
521/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
522static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
523static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
524
525void qbman_release_desc_clear(struct qbman_release_desc *d)
526{
527 uint32_t *cl;
528
529 memset(d, 0, sizeof(*d));
530 cl = qb_cl(d);
531 qb_attr_code_encode(&code_release_set_me, cl, 1);
532}
533
534void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
535{
536 uint32_t *cl = qb_cl(d);
537
538 qb_attr_code_encode(&code_release_bpid, cl, bpid);
539}
540
541#define RAR_IDX(rar) ((rar) & 0x7)
542#define RAR_VB(rar) ((rar) & 0x80)
543#define RAR_SUCCESS(rar) ((rar) & 0x100)
544
545int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
546 const uint64_t *buffers, unsigned int num_buffers)
547{
548 uint32_t *p;
549 const uint32_t *cl = qb_cl(d);
550 uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
551 debug("RAR=%08x\n", rar);
552 if (!RAR_SUCCESS(rar))
553 return -EBUSY;
554 BUG_ON(!num_buffers || (num_buffers > 7));
555 /* Start the release command */
556 p = qbman_cena_write_start(&s->sys,
557 QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
558 /* Copy the caller's buffer pointers to the command */
559 u64_to_le32_copy(&p[2], buffers, num_buffers);
560 lwsync();
561 /* Set the verb byte, have to substitute in the valid-bit and the number
562 * of buffers. */
563 p[0] = cl[0] | RAR_VB(rar) | num_buffers;
564 qbman_cena_write_complete(&s->sys,
565 QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
566 p);
567 return 0;
568}
569
570/*******************/
571/* Buffer acquires */
572/*******************/
573
574/* These should be const, eventually */
575static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
576static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
577static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
578
579int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
580 unsigned int num_buffers)
581{
582 uint32_t *p;
583 uint32_t verb, rslt, num;
584
585 BUG_ON(!num_buffers || (num_buffers > 7));
586
587 /* Start the management command */
588 p = qbman_swp_mc_start(s);
589
590 if (!p)
591 return -EBUSY;
592
593 /* Encode the caller-provided attributes */
594 qb_attr_code_encode(&code_acquire_bpid, p, bpid);
595 qb_attr_code_encode(&code_acquire_num, p, num_buffers);
596
597 /* Complete the management command */
598 p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
599
600 /* Decode the outcome */
601 verb = qb_attr_code_decode(&code_generic_verb, p);
602 rslt = qb_attr_code_decode(&code_generic_rslt, p);
603 num = qb_attr_code_decode(&code_acquire_r_num, p);
604 BUG_ON(verb != QBMAN_MC_ACQUIRE);
605
606 /* Determine success or failure */
607 if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
608 printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
609 bpid, rslt);
610 return -EIO;
611 }
612 BUG_ON(num > num_buffers);
613 /* Copy the acquired buffers to the caller's array */
614 u64_from_le32_copy(buffers, &p[2], num);
615 return (int)num;
616}