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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07002/*
3 * Copyright (C) 2014 Freescale Semiconductor
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07004 */
5
Simon Glass9bc15642020-02-03 07:36:16 -07006#include <malloc.h>
Simon Glass243182c2017-05-17 08:23:06 -06007#include <asm/arch/clock.h>
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -07008#include "qbman_portal.h"
9
10/* QBMan portal management command codes */
11#define QBMAN_MC_ACQUIRE 0x30
12#define QBMAN_WQCHAN_CONFIGURE 0x46
13
14/* CINH register offsets */
15#define QBMAN_CINH_SWP_EQAR 0x8c0
16#define QBMAN_CINH_SWP_DCAP 0xac0
17#define QBMAN_CINH_SWP_SDQCR 0xb00
18#define QBMAN_CINH_SWP_RAR 0xcc0
19
20/* CENA register offsets */
21#define QBMAN_CENA_SWP_EQCR(n) (0x000 + ((uint32_t)(n) << 6))
22#define QBMAN_CENA_SWP_DQRR(n) (0x200 + ((uint32_t)(n) << 6))
23#define QBMAN_CENA_SWP_RCR(n) (0x400 + ((uint32_t)(n) << 6))
24#define QBMAN_CENA_SWP_CR 0x600
25#define QBMAN_CENA_SWP_RR(vb) (0x700 + ((uint32_t)(vb) >> 1))
26#define QBMAN_CENA_SWP_VDQCR 0x780
27
28/* Reverse mapping of QBMAN_CENA_SWP_DQRR() */
Priyanka Jain9de71602016-12-07 12:04:05 +053029#define QBMAN_IDX_FROM_DQRR(p) (((unsigned long)p & 0x1ff) >> 6)
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070030
31/*******************************/
32/* Pre-defined attribute codes */
33/*******************************/
34
35struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
36struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
37
38/*************************/
39/* SDQCR attribute codes */
40/*************************/
41
42/* we put these here because at least some of them are required by
43 * qbman_swp_init() */
44struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
45struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
46struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
47#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
48enum qbman_sdqcr_dct {
49 qbman_sdqcr_dct_null = 0,
50 qbman_sdqcr_dct_prio_ics,
51 qbman_sdqcr_dct_active_ics,
52 qbman_sdqcr_dct_active
53};
54enum qbman_sdqcr_fc {
55 qbman_sdqcr_fc_one = 0,
56 qbman_sdqcr_fc_up_to_3 = 1
57};
58
59/*********************************/
60/* Portal constructor/destructor */
61/*********************************/
62
63/* Software portals should always be in the power-on state when we initialise,
64 * due to the CCSR-based portal reset functionality that MC has. */
65struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
66{
67 int ret;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053068 struct qbman_swp *p = malloc(sizeof(struct qbman_swp));
Priyanka Jain9de71602016-12-07 12:04:05 +053069 u32 major = 0, minor = 0;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070070
71 if (!p)
72 return NULL;
73 p->desc = d;
74#ifdef QBMAN_CHECKING
75 p->mc.check = swp_mc_can_start;
76#endif
77 p->mc.valid_bit = QB_VALID_BIT;
78 p->sdq = 0;
79 qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
80 qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
81 qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +053082 atomic_set(&p->vdq.busy, 1);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070083 p->vdq.valid_bit = QB_VALID_BIT;
84 p->dqrr.next_idx = 0;
Priyanka Jain9de71602016-12-07 12:04:05 +053085
86 qbman_version(&major, &minor);
87 if (!major) {
88 printf("invalid qbman version\n");
89 return NULL;
90 }
91
92 if (major >= 4 && minor >= 1)
93 p->dqrr.dqrr_size = QBMAN_VER_4_1_DQRR_SIZE;
94 else
95 p->dqrr.dqrr_size = QBMAN_VER_4_0_DQRR_SIZE;
96
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070097 p->dqrr.valid_bit = QB_VALID_BIT;
Priyanka Jain9de71602016-12-07 12:04:05 +053098 ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -070099 if (ret) {
100 free(p);
101 printf("qbman_swp_sys_init() failed %d\n", ret);
102 return NULL;
103 }
104 qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, p->sdq);
105 return p;
106}
107
108/***********************/
109/* Management commands */
110/***********************/
111
112/*
113 * Internal code common to all types of management commands.
114 */
115
116void *qbman_swp_mc_start(struct qbman_swp *p)
117{
118 void *ret;
Pratiyush Mohan Srivastavad2d567d2015-12-22 16:50:19 +0530119 int *return_val;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700120#ifdef QBMAN_CHECKING
121 BUG_ON(p->mc.check != swp_mc_can_start);
122#endif
123 ret = qbman_cena_write_start(&p->sys, QBMAN_CENA_SWP_CR);
124#ifdef QBMAN_CHECKING
Pratiyush Mohan Srivastavad2d567d2015-12-22 16:50:19 +0530125 return_val = (int *)ret;
126 if (!(*return_val))
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700127 p->mc.check = swp_mc_can_submit;
128#endif
129 return ret;
130}
131
132void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
133{
134 uint32_t *v = cmd;
135#ifdef QBMAN_CHECKING
Tom Rinifd6fb772015-11-28 08:04:42 -0500136 BUG_ON(p->mc.check != swp_mc_can_submit);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700137#endif
138 lwsync();
139 /* TBD: "|=" is going to hurt performance. Need to move as many fields
140 * out of word zero, and for those that remain, the "OR" needs to occur
141 * at the caller side. This debug check helps to catch cases where the
142 * caller wants to OR but has forgotten to do so. */
143 BUG_ON((*v & cmd_verb) != *v);
144 *v = cmd_verb | p->mc.valid_bit;
145 qbman_cena_write_complete(&p->sys, QBMAN_CENA_SWP_CR, cmd);
146 /* TODO: add prefetch support for GPP */
147#ifdef QBMAN_CHECKING
148 p->mc.check = swp_mc_can_poll;
149#endif
150}
151
152void *qbman_swp_mc_result(struct qbman_swp *p)
153{
154 uint32_t *ret, verb;
155#ifdef QBMAN_CHECKING
156 BUG_ON(p->mc.check != swp_mc_can_poll);
157#endif
158 ret = qbman_cena_read(&p->sys, QBMAN_CENA_SWP_RR(p->mc.valid_bit));
159 /* Remove the valid-bit - command completed iff the rest is non-zero */
160 verb = ret[0] & ~QB_VALID_BIT;
161 if (!verb)
162 return NULL;
163#ifdef QBMAN_CHECKING
164 p->mc.check = swp_mc_can_start;
165#endif
166 p->mc.valid_bit ^= QB_VALID_BIT;
167 return ret;
168}
169
170/***********/
171/* Enqueue */
172/***********/
173
174/* These should be const, eventually */
175static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
176static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
177static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
178/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
179static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
180static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
181static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
182static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
183static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700184
185enum qbman_eq_cmd_e {
186 /* No enqueue, primarily for plugging ORP gaps for dropped frames */
187 qbman_eq_cmd_empty,
188 /* DMA an enqueue response once complete */
189 qbman_eq_cmd_respond,
190 /* DMA an enqueue response only if the enqueue fails */
191 qbman_eq_cmd_respond_reject
192};
193
194void qbman_eq_desc_clear(struct qbman_eq_desc *d)
195{
196 memset(d, 0, sizeof(*d));
197}
198
199void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
200{
201 uint32_t *cl = qb_cl(d);
202
203 qb_attr_code_encode(&code_eq_orp_en, cl, 0);
204 qb_attr_code_encode(&code_eq_cmd, cl,
205 respond_success ? qbman_eq_cmd_respond :
206 qbman_eq_cmd_respond_reject);
207}
208
209void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
210 dma_addr_t storage_phys,
211 int stash)
212{
213 uint32_t *cl = qb_cl(d);
214
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530215 qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700216 qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
217}
218
219
220void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
221 uint32_t qd_bin, uint32_t qd_prio)
222{
223 uint32_t *cl = qb_cl(d);
224
225 qb_attr_code_encode(&code_eq_qd_en, cl, 1);
226 qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
227 qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
228 qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
229}
230
231#define EQAR_IDX(eqar) ((eqar) & 0x7)
232#define EQAR_VB(eqar) ((eqar) & 0x80)
233#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
234
235int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
236 const struct qbman_fd *fd)
237{
238 uint32_t *p;
239 const uint32_t *cl = qb_cl(d);
240 uint32_t eqar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_EQAR);
241 debug("EQAR=%08x\n", eqar);
242 if (!EQAR_SUCCESS(eqar))
243 return -EBUSY;
244 p = qbman_cena_write_start(&s->sys,
245 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
246 word_copy(&p[1], &cl[1], 7);
247 word_copy(&p[8], fd, sizeof(*fd) >> 2);
248 lwsync();
249 /* Set the verb byte, have to substitute in the valid-bit */
250 p[0] = cl[0] | EQAR_VB(eqar);
251 qbman_cena_write_complete(&s->sys,
252 QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)),
253 p);
254 return 0;
255}
256
257/***************************/
258/* Volatile (pull) dequeue */
259/***************************/
260
261/* These should be const, eventually */
262static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
263static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
264static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
265static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
266static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
267static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
268static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
269static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700270
271enum qb_pull_dt_e {
272 qb_pull_dt_channel,
273 qb_pull_dt_workqueue,
274 qb_pull_dt_framequeue
275};
276
277void qbman_pull_desc_clear(struct qbman_pull_desc *d)
278{
279 memset(d, 0, sizeof(*d));
280}
281
282void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
283 struct ldpaa_dq *storage,
284 dma_addr_t storage_phys,
285 int stash)
286{
287 uint32_t *cl = qb_cl(d);
288
289 /* Squiggle the pointer 'storage' into the extra 2 words of the
290 * descriptor (which aren't copied to the hw command) */
291 *(void **)&cl[4] = storage;
292 if (!storage) {
293 qb_attr_code_encode(&code_pull_rls, cl, 0);
294 return;
295 }
296 qb_attr_code_encode(&code_pull_rls, cl, 1);
297 qb_attr_code_encode(&code_pull_stash, cl, !!stash);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530298 qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700299}
300
301void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
302{
303 uint32_t *cl = qb_cl(d);
304
305 BUG_ON(!numframes || (numframes > 16));
306 qb_attr_code_encode(&code_pull_numframes, cl,
307 (uint32_t)(numframes - 1));
308}
309
310void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
311{
312 uint32_t *cl = qb_cl(d);
313
314 qb_attr_code_encode(&code_pull_token, cl, token);
315}
316
317void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
318{
319 uint32_t *cl = qb_cl(d);
320
321 qb_attr_code_encode(&code_pull_dct, cl, 1);
322 qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
323 qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
324}
325
326int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
327{
328 uint32_t *p;
329 uint32_t *cl = qb_cl(d);
330
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530331 if (!atomic_dec_and_test(&s->vdq.busy)) {
332 atomic_inc(&s->vdq.busy);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700333 return -EBUSY;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530334 }
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700335 s->vdq.storage = *(void **)&cl[4];
336 s->vdq.token = qb_attr_code_decode(&code_pull_token, cl);
337 p = qbman_cena_write_start(&s->sys, QBMAN_CENA_SWP_VDQCR);
338 word_copy(&p[1], &cl[1], 3);
339 lwsync();
340 /* Set the verb byte, have to substitute in the valid-bit */
341 p[0] = cl[0] | s->vdq.valid_bit;
342 s->vdq.valid_bit ^= QB_VALID_BIT;
343 qbman_cena_write_complete(&s->sys, QBMAN_CENA_SWP_VDQCR, p);
344 return 0;
345}
346
347/****************/
348/* Polling DQRR */
349/****************/
350
351static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
352static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
353static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
354
355#define QBMAN_DQRR_RESPONSE_DQ 0x60
356#define QBMAN_DQRR_RESPONSE_FQRN 0x21
357#define QBMAN_DQRR_RESPONSE_FQRNI 0x22
358#define QBMAN_DQRR_RESPONSE_FQPN 0x24
359#define QBMAN_DQRR_RESPONSE_FQDAN 0x25
360#define QBMAN_DQRR_RESPONSE_CDAN 0x26
361#define QBMAN_DQRR_RESPONSE_CSCN_MEM 0x27
362#define QBMAN_DQRR_RESPONSE_CGCU 0x28
363#define QBMAN_DQRR_RESPONSE_BPSCN 0x29
364#define QBMAN_DQRR_RESPONSE_CSCN_WQ 0x2a
365
366
367/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
368 * only once, so repeated calls can return a sequence of DQRR entries, without
369 * requiring they be consumed immediately or in any particular order. */
370const struct ldpaa_dq *qbman_swp_dqrr_next(struct qbman_swp *s)
371{
372 uint32_t verb;
373 uint32_t response_verb;
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530374 uint32_t flags;
375 const struct ldpaa_dq *dq;
376 const uint32_t *p;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700377
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530378 dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
379 p = qb_cl(dq);
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700380 verb = qb_attr_code_decode(&code_dqrr_verb, p);
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530381
382 /* If the valid-bit isn't of the expected polarity, nothing there. Note,
383 * in the DQRR reset bug workaround, we shouldn't need to skip these
384 * check, because we've already determined that a new entry is available
385 * and we've invalidated the cacheline before reading it, so the
386 * valid-bit behaviour is repaired and should tell us what we already
387 * knew from reading PI.
388 */
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700389 if ((verb & QB_VALID_BIT) != s->dqrr.valid_bit) {
390 qbman_cena_invalidate_prefetch(&s->sys,
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530391 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700392 return NULL;
393 }
394 /* There's something there. Move "next_idx" attention to the next ring
395 * entry (and prefetch it) before returning what we found. */
396 s->dqrr.next_idx++;
Priyanka Jain9de71602016-12-07 12:04:05 +0530397 s->dqrr.next_idx &= s->dqrr.dqrr_size - 1;/* Wrap around at dqrr_size */
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700398 /* TODO: it's possible to do all this without conditionals, optimise it
399 * later. */
400 if (!s->dqrr.next_idx)
401 s->dqrr.valid_bit ^= QB_VALID_BIT;
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700402
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530403 /* If this is the final response to a volatile dequeue command
404 indicate that the vdq is no longer busy */
405 flags = ldpaa_dq_flags(dq);
406 response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
407 if ((response_verb == QBMAN_DQRR_RESPONSE_DQ) &&
408 (flags & LDPAA_DQ_STAT_VOLATILE) &&
409 (flags & LDPAA_DQ_STAT_EXPIRED))
410 atomic_inc(&s->vdq.busy);
411
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700412 qbman_cena_invalidate_prefetch(&s->sys,
413 QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
414 return dq;
415}
416
417/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
418void qbman_swp_dqrr_consume(struct qbman_swp *s, const struct ldpaa_dq *dq)
419{
420 qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_DCAP, QBMAN_IDX_FROM_DQRR(dq));
421}
422
423/*********************************/
424/* Polling user-provided storage */
425/*********************************/
426
427void qbman_dq_entry_set_oldtoken(struct ldpaa_dq *dq,
428 unsigned int num_entries,
429 uint8_t oldtoken)
430{
431 memset(dq, oldtoken, num_entries * sizeof(*dq));
432}
433
434int qbman_dq_entry_has_newtoken(struct qbman_swp *s,
435 const struct ldpaa_dq *dq,
436 uint8_t newtoken)
437{
438 /* To avoid converting the little-endian DQ entry to host-endian prior
439 * to us knowing whether there is a valid entry or not (and run the
440 * risk of corrupting the incoming hardware LE write), we detect in
441 * hardware endianness rather than host. This means we need a different
442 * "code" depending on whether we are BE or LE in software, which is
443 * where DQRR_TOK_OFFSET comes in... */
444 static struct qb_attr_code code_dqrr_tok_detect =
445 QB_CODE(0, DQRR_TOK_OFFSET, 8);
446 /* The user trying to poll for a result treats "dq" as const. It is
447 * however the same address that was provided to us non-const in the
448 * first place, for directing hardware DMA to. So we can cast away the
449 * const because it is mutable from our perspective. */
450 uint32_t *p = qb_cl((struct ldpaa_dq *)dq);
451 uint32_t token;
452
453 token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
454 if (token != newtoken)
455 return 0;
456
457 /* Only now do we convert from hardware to host endianness. Also, as we
458 * are returning success, the user has promised not to call us again, so
459 * there's no risk of us converting the endianness twice... */
460 make_le32_n(p, 16);
461
462 /* VDQCR "no longer busy" hook - not quite the same as DQRR, because the
463 * fact "VDQCR" shows busy doesn't mean that the result we're looking at
464 * is from the same command. Eg. we may be looking at our 10th dequeue
465 * result from our first VDQCR command, yet the second dequeue command
466 * could have been kicked off already, after seeing the 1st result. Ie.
467 * the result we're looking at is not necessarily proof that we can
468 * reset "busy". We instead base the decision on whether the current
469 * result is sitting at the first 'storage' location of the busy
470 * command. */
Prabhakar Kushwaha93694a62015-07-02 11:29:00 +0530471 if (s->vdq.storage == dq) {
472 s->vdq.storage = NULL;
473 atomic_inc(&s->vdq.busy);
474 }
Prabhakar Kushwahacfd9fbf2015-03-19 09:20:45 -0700475 return 1;
476}
477
478/********************************/
479/* Categorising dequeue entries */
480/********************************/
481
482static inline int __qbman_dq_entry_is_x(const struct ldpaa_dq *dq, uint32_t x)
483{
484 const uint32_t *p = qb_cl(dq);
485 uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
486
487 return response_verb == x;
488}
489
490int qbman_dq_entry_is_DQ(const struct ldpaa_dq *dq)
491{
492 return __qbman_dq_entry_is_x(dq, QBMAN_DQRR_RESPONSE_DQ);
493}
494
495/*********************************/
496/* Parsing frame dequeue results */
497/*********************************/
498
499/* These APIs assume qbman_dq_entry_is_DQ() is TRUE */
500
501uint32_t ldpaa_dq_flags(const struct ldpaa_dq *dq)
502{
503 const uint32_t *p = qb_cl(dq);
504
505 return qb_attr_code_decode(&code_dqrr_stat, p);
506}
507
508const struct dpaa_fd *ldpaa_dq_fd(const struct ldpaa_dq *dq)
509{
510 const uint32_t *p = qb_cl(dq);
511
512 return (const struct dpaa_fd *)&p[8];
513}
514
515/******************/
516/* Buffer release */
517/******************/
518
519/* These should be const, eventually */
520/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
521static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
522static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
523
524void qbman_release_desc_clear(struct qbman_release_desc *d)
525{
526 uint32_t *cl;
527
528 memset(d, 0, sizeof(*d));
529 cl = qb_cl(d);
530 qb_attr_code_encode(&code_release_set_me, cl, 1);
531}
532
533void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
534{
535 uint32_t *cl = qb_cl(d);
536
537 qb_attr_code_encode(&code_release_bpid, cl, bpid);
538}
539
540#define RAR_IDX(rar) ((rar) & 0x7)
541#define RAR_VB(rar) ((rar) & 0x80)
542#define RAR_SUCCESS(rar) ((rar) & 0x100)
543
544int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
545 const uint64_t *buffers, unsigned int num_buffers)
546{
547 uint32_t *p;
548 const uint32_t *cl = qb_cl(d);
549 uint32_t rar = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_RAR);
550 debug("RAR=%08x\n", rar);
551 if (!RAR_SUCCESS(rar))
552 return -EBUSY;
553 BUG_ON(!num_buffers || (num_buffers > 7));
554 /* Start the release command */
555 p = qbman_cena_write_start(&s->sys,
556 QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
557 /* Copy the caller's buffer pointers to the command */
558 u64_to_le32_copy(&p[2], buffers, num_buffers);
559 lwsync();
560 /* Set the verb byte, have to substitute in the valid-bit and the number
561 * of buffers. */
562 p[0] = cl[0] | RAR_VB(rar) | num_buffers;
563 qbman_cena_write_complete(&s->sys,
564 QBMAN_CENA_SWP_RCR(RAR_IDX(rar)),
565 p);
566 return 0;
567}
568
569/*******************/
570/* Buffer acquires */
571/*******************/
572
573/* These should be const, eventually */
574static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
575static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
576static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
577
578int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
579 unsigned int num_buffers)
580{
581 uint32_t *p;
582 uint32_t verb, rslt, num;
583
584 BUG_ON(!num_buffers || (num_buffers > 7));
585
586 /* Start the management command */
587 p = qbman_swp_mc_start(s);
588
589 if (!p)
590 return -EBUSY;
591
592 /* Encode the caller-provided attributes */
593 qb_attr_code_encode(&code_acquire_bpid, p, bpid);
594 qb_attr_code_encode(&code_acquire_num, p, num_buffers);
595
596 /* Complete the management command */
597 p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
598
599 /* Decode the outcome */
600 verb = qb_attr_code_decode(&code_generic_verb, p);
601 rslt = qb_attr_code_decode(&code_generic_rslt, p);
602 num = qb_attr_code_decode(&code_acquire_r_num, p);
603 BUG_ON(verb != QBMAN_MC_ACQUIRE);
604
605 /* Determine success or failure */
606 if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
607 printf("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
608 bpid, rslt);
609 return -EIO;
610 }
611 BUG_ON(num > num_buffers);
612 /* Copy the acquired buffers to the caller's array */
613 u64_from_le32_copy(buffers, &p[2], num);
614 return (int)num;
615}