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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Dirk Behmea1aa39c2008-12-14 09:47:12 +01002/*
3 * (C) Copyright 2004-2008
4 * Texas Instruments, <www.ti.com>
5 * Richard Woodruff <r-woodruff2@ti.com>
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 */
Dirk Behmea1aa39c2008-12-14 09:47:12 +01007#ifndef _SYS_PROTO_H_
8#define _SYS_PROTO_H_
pekon gupta5bbb0992013-11-22 16:53:29 +05309#include <linux/mtd/omap_gpmc.h>
Nishanth Menon739b98f2014-03-28 11:00:06 -050010#include <asm/omap_common.h>
Dirk Behmea1aa39c2008-12-14 09:47:12 +010011
12typedef struct {
Dirk Behmea1aa39c2008-12-14 09:47:12 +010013 u32 mtype;
Dirk Behmea1aa39c2008-12-14 09:47:12 +010014 char *board_string;
15 char *nand_string;
16} omap3_sysinfo;
17
Aneesh Vd16dd012011-06-16 23:30:53 +000018struct emu_hal_params {
19 u32 num_params;
20 u32 param1;
21};
22
Peter Baradaedb5c2f2012-11-13 07:40:28 +000023/* Board SDRC timing values */
24struct board_sdrc_timings {
Albert ARIBAUD \(3ADEV\)70988eb2015-01-16 09:09:48 +010025 u32 sharing;
Peter Baradaedb5c2f2012-11-13 07:40:28 +000026 u32 mcfg;
27 u32 ctrla;
28 u32 ctrlb;
29 u32 rfr_ctrl;
30 u32 mr;
31};
32
Dirk Behmea1aa39c2008-12-14 09:47:12 +010033void prcm_init(void);
34void per_clocks_enable(void);
Govindraj.R3968a6a2012-02-06 03:55:35 +000035void ehci_clocks_enable(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010036
37void memif_init(void);
38void sdrc_init(void);
39void do_sdrc_init(u32, u32);
Peter Baradaedb5c2f2012-11-13 07:40:28 +000040
41void get_board_mem_timings(struct board_sdrc_timings *timings);
Ladislav Michl4852b352016-07-12 20:28:15 +020042int identify_nand_chip(int *mfr, int *id);
Vaibhav Hiremath598f7022010-06-07 15:20:53 -040043void emif4_init(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010044void gpmc_init(void);
Ladislav Michld5b1c272016-07-12 20:28:16 +020045void enable_gpmc_cs_config(const u32 *gpmc_config, const struct gpmc_cs *cs,
46 u32 base, u32 size);
Ladislav Michl446e94a2016-07-12 20:28:17 +020047void set_gpmc_cs0(int flash_type);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010048
49void watchdog_init(void);
50void set_muxconf_regs(void);
51
Steve Sakomanad74ace2010-08-17 14:39:34 -070052u32 get_cpu_family(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010053u32 get_cpu_rev(void);
Steve Sakomanad74ace2010-08-17 14:39:34 -070054u32 get_sku_id(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010055u32 is_gpmc_muxed(void);
56u32 get_gpmc0_type(void);
57u32 get_gpmc0_width(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010058u32 is_running_in_sdram(void);
59u32 is_running_in_sram(void);
60u32 is_running_in_flash(void);
61u32 get_device_type(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010062u32 get_boot_type(void);
Tom Rix096b9c22009-09-10 15:27:57 -040063void invalidate_dcache(u32);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010064u32 wait_on_value(u32, u32, void *, u32);
Jeroen Hofstee2b562202014-10-08 22:57:57 +020065void cancel_out(u32 *num, u32 *den, u32 den_limit);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010066void sdelay(unsigned long);
67void make_cs1_contiguous(void);
Ladislav Michld3bc9852017-03-06 13:54:30 +010068int omap_nand_switch_ecc(uint32_t, uint32_t);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010069void power_init_r(void);
Aneesh Vd16dd012011-06-16 23:30:53 +000070void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
Nishanth Menon53fee1e2015-03-09 17:12:09 -050071void omap3_set_aux_cr_secure(u32 acr);
Lokesh Vutlae89f1542012-05-29 19:26:41 +000072u32 warm_reset(void);
Paul Kocialkowskid5b76242015-07-15 16:02:19 +020073
74void save_omap_boot_params(void);
Dirk Behmea1aa39c2008-12-14 09:47:12 +010075#endif