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Heiko Schocher60301192010-02-22 16:43:02 +05301/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
Holger Brunck2ef42952012-07-05 05:37:46 +00009 * (C) Copyright 2011-2012
10 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Holger Brunck1f974e92011-06-16 18:11:15 +053012 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020013 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocher60301192010-02-22 16:43:02 +053014 */
15
16/*
17 * for linking errors see
18 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
19 */
20
Holger Brunck1f974e92011-06-16 18:11:15 +053021#ifndef _CONFIG_KM_KIRKWOOD_H
22#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher60301192010-02-22 16:43:02 +053023
Holger Brunckb693ce82012-07-05 05:05:06 +000024/* KM_KIRKWOOD */
Holger Brunck9f03a382012-05-25 01:57:13 +000025#if defined(CONFIG_KM_KIRKWOOD)
Holger Brunck2ef42952012-07-05 05:37:46 +000026#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
Holger Brunckf065ce02012-07-05 05:05:02 +000027#define CONFIG_HOSTNAME km_kirkwood
Holger Brunckb693ce82012-07-05 05:05:06 +000028#define CONFIG_KM_DISABLE_PCIE
Heiko Schocher8cfad362012-10-25 11:07:00 +020029#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckb693ce82012-07-05 05:05:06 +000030
31/* KM_KIRKWOOD_PCI */
Holger Brunck9f03a382012-05-25 01:57:13 +000032#elif defined(CONFIG_KM_KIRKWOOD_PCI)
Holger Brunck2ef42952012-07-05 05:37:46 +000033#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
Holger Brunckf065ce02012-07-05 05:05:02 +000034#define CONFIG_HOSTNAME km_kirkwood_pci
Heiko Schocher8cfad362012-10-25 11:07:00 +020035#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckb693ce82012-07-05 05:05:06 +000036#define CONFIG_KM_FPGA_CONFIG
37
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020038/* KM_KIRKWOOD_128M16 */
39#elif defined(CONFIG_KM_KIRKWOOD_128M16)
40#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16"
41#define CONFIG_HOSTNAME km_kirkwood_128m16
42#undef CONFIG_SYS_KWD_CONFIG
43#define CONFIG_SYS_KWD_CONFIG \
44 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
45#define CONFIG_KM_DISABLE_PCIE
Holger Brunck7d8f2dc2013-10-07 15:10:03 +020046#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020047
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010048/* KM_NUSA / KM_SUGP1 */
49#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
Heiko Schocher8cfad362012-10-25 11:07:00 +020050#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010051
52# if defined(CONFIG_KM_NUSA)
Holger Brunck2ef42952012-07-05 05:37:46 +000053#define CONFIG_IDENT_STRING "\nKeymile NUSA"
Holger Brunckf065ce02012-07-05 05:05:02 +000054#define CONFIG_HOSTNAME kmnusa
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010055# elif defined(CONFIG_KM_SUGP1)
56#define CONFIG_IDENT_STRING "\nKeymile SUGP1"
57#define CONFIG_HOSTNAME kmsugp1
58#define KM_PCIE_RESET_MPP7
59#endif
60
Holger Brunck2ef42952012-07-05 05:37:46 +000061#undef CONFIG_SYS_KWD_CONFIG
62#define CONFIG_SYS_KWD_CONFIG \
63 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
64#define CONFIG_KM_ENV_IS_IN_SPI_NOR
65#define CONFIG_KM_FPGA_CONFIG
66#define CONFIG_KM_PIGGY4_88E6352
Valentin Longchamp88874812012-08-16 01:25:20 +000067#define CONFIG_MV88E6352_SWITCH
68#define CONFIG_KM_MVEXTSW_ADDR 0x10
Holger Brunck2ef42952012-07-05 05:37:46 +000069
Holger Brunckd896d0d2012-07-05 05:05:03 +000070/* KM_MGCOGE3UN */
71#elif defined(CONFIG_KM_MGCOGE3UN)
72#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
73#define CONFIG_HOSTNAME mgcoge3un
Heiko Schocher8cfad362012-10-25 11:07:00 +020074#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckd896d0d2012-07-05 05:05:03 +000075#undef CONFIG_SYS_KWD_CONFIG
76#define CONFIG_SYS_KWD_CONFIG \
77 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
78#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
79#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
80#define CONFIG_KM_DISABLE_PCIE
81#define CONFIG_KM_PIGGY4_88E6061
82
83/* KMCOGE5UN */
Holger Brunckf065ce02012-07-05 05:05:02 +000084#elif defined(CONFIG_KM_COGE5UN)
85#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
Heiko Schocher8cfad362012-10-25 11:07:00 +020086#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckf065ce02012-07-05 05:05:02 +000087#undef CONFIG_SYS_KWD_CONFIG
88#define CONFIG_SYS_KWD_CONFIG \
89 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
90#define CONFIG_KM_ENV_IS_IN_SPI_NOR
91#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
92#define CONFIG_HOSTNAME kmcoge5un
93#define CONFIG_KM_DISABLE_PCIE
94#define CONFIG_KM_PIGGY4_88E6352
Holger Brunckc9caa7f2012-07-05 05:05:04 +000095
96/* KM_PORTL2 */
97#elif defined(CONFIG_KM_PORTL2)
98#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
99#define CONFIG_HOSTNAME portl2
Heiko Schocher8cfad362012-10-25 11:07:00 +0200100#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckc9caa7f2012-07-05 05:05:04 +0000101#define CONFIG_KM_PIGGY4_88E6061
102
Holger Brunckac552d52013-01-15 22:51:22 +0000103/* KM_SUV31 */
104#elif defined(CONFIG_KM_SUV31)
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100105#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckac552d52013-01-15 22:51:22 +0000106#define CONFIG_IDENT_STRING "\nKeymile SUV31"
107#define CONFIG_HOSTNAME kmsuv31
Holger Brunck7bffb3f2014-01-27 16:58:24 +0100108#undef CONFIG_SYS_KWD_CONFIG
109#define CONFIG_SYS_KWD_CONFIG \
110 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunckac552d52013-01-15 22:51:22 +0000111#define CONFIG_KM_ENV_IS_IN_SPI_NOR
112#define CONFIG_KM_FPGA_CONFIG
113
Holger Brunck2ef42952012-07-05 05:37:46 +0000114#else
115#error ("Board unsupported")
Holger Brunck1f974e92011-06-16 18:11:15 +0530116#endif
Heiko Schocher60301192010-02-22 16:43:02 +0530117
Holger Brunck2ef42952012-07-05 05:37:46 +0000118/* include common defines/options for all arm based Keymile boards */
119#include "km/km_arm.h"
120
Holger Brunck2ef42952012-07-05 05:37:46 +0000121#ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100122#define KM_ENV_BUS 5 /* I2C2 (Mux-Port 5)*/
Holger Brunck2ef42952012-07-05 05:37:46 +0000123#endif
124
125#if defined(CONFIG_KM_PIGGY4_88E6352)
126/*
127 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
128 * an Marvell 88E6352 simple switch.
129 * In this case we have to change the default settings for the etherent mac.
130 * There is NO ethernet phy. The ARM and Switch are conencted directly over
131 * RGMII in MAC-MAC mode
132 * In this case 1GBit full duplex and autoneg off
133 */
134#define PORT_SERIAL_CONTROL_VALUE ( \
135 MVGBE_FORCE_LINK_PASS | \
136 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
137 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
138 MVGBE_ADV_NO_FLOW_CTRL | \
139 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
140 MVGBE_FORCE_BP_MODE_NO_JAM | \
141 (1 << 9) /* Reserved bit has to be 1 */ | \
142 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
143 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
144 MVGBE_DTE_ADV_0 | \
145 MVGBE_MIIPHY_MAC_MODE | \
146 MVGBE_AUTO_NEG_NO_CHANGE | \
147 MVGBE_MAX_RX_PACKET_1552BYTE | \
148 MVGBE_CLR_EXT_LOOPBACK | \
149 MVGBE_SET_FULL_DUPLEX_MODE | \
150 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
151 MVGBE_SET_GMII_SPEED_TO_1000 |\
152 MVGBE_SET_MII_SPEED_TO_100)
153
154#endif
Heiko Schochere4533af2011-03-08 10:53:51 +0100155
Holger Brunckd896d0d2012-07-05 05:05:03 +0000156#ifdef CONFIG_KM_PIGGY4_88E6061
157/*
158 * Some keymile boards like mgcoge3un have their PIGGY4 connected via
159 * an Marvell 88E6061 simple switch.
160 * In this case we have to change the default settings for the
161 * ethernet phy connected to the kirkwood.
162 * In this case 100MB full duplex and autoneg off
163 */
164#define PORT_SERIAL_CONTROL_VALUE ( \
165 MVGBE_FORCE_LINK_PASS | \
166 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
167 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
168 MVGBE_ADV_NO_FLOW_CTRL | \
169 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
170 MVGBE_FORCE_BP_MODE_NO_JAM | \
171 (1 << 9) /* Reserved bit has to be 1 */ | \
172 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
173 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
174 MVGBE_DTE_ADV_0 | \
175 MVGBE_MIIPHY_MAC_MODE | \
176 MVGBE_AUTO_NEG_NO_CHANGE | \
177 MVGBE_MAX_RX_PACKET_1552BYTE | \
178 MVGBE_CLR_EXT_LOOPBACK | \
179 MVGBE_SET_FULL_DUPLEX_MODE | \
180 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
181 MVGBE_SET_GMII_SPEED_TO_10_100 |\
182 MVGBE_SET_MII_SPEED_TO_100)
183#endif
184
Holger Brunckd896d0d2012-07-05 05:05:03 +0000185#ifdef CONFIG_KM_DISABLE_PCI
186#undef CONFIG_KIRKWOOD_PCIE_INIT
187#endif
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000188
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000189
Holger Brunck1f974e92011-06-16 18:11:15 +0530190#endif /* _CONFIG_KM_KIRKWOOD */