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git01.mediatek.com / filogic / uboot / 8cfad3622451537adc9e9e35d0e14b2c9bf74e08 / . / include / configs / km_kirkwood.h
blob: 5f3e4449baaf7e2c09581fd22cccb3d07376a9b8 [file] [log] [blame]
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]1/*
2 * (C) Copyright 2009
3 * Marvell Semiconductor <www.marvell.com>
4 * Prafulla Wadaskar <prafulla@marvell.com>
5 *
6 * (C) Copyright 2009
7 * Stefan Roese, DENX Software Engineering, sr@denx.de.
8 *
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]9 * (C) Copyright 2011-2012
10 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]12 *
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
29 * MA 02110-1301 USA
30 */
31
32/*
33 * for linking errors see
34 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
35 */
36
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]37#ifndef _CONFIG_KM_KIRKWOOD_H
38#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]39
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]40/* KM_KIRKWOOD */
Holger Brunck9f03a382012-05-25 01:57:13 +0000[diff] [blame]41#if defined(CONFIG_KM_KIRKWOOD)
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]42#define CONFIG_IDENT_STRING "\nKeymile Kirkwood"
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]43#define CONFIG_HOSTNAME km_kirkwood
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]44#define CONFIG_KM_DISABLE_PCIE
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]45#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]46
47/* KM_KIRKWOOD_PCI */
Holger Brunck9f03a382012-05-25 01:57:13 +0000[diff] [blame]48#elif defined(CONFIG_KM_KIRKWOOD_PCI)
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]49#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI"
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]50#define CONFIG_HOSTNAME km_kirkwood_pci
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]51#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]52#define CONFIG_KM_FPGA_CONFIG
53
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]54/* KM_NUSA */
55#elif defined(CONFIG_KM_NUSA)
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]56#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]57#define CONFIG_IDENT_STRING "\nKeymile NUSA"
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]58#define CONFIG_HOSTNAME kmnusa
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]59#undef CONFIG_SYS_KWD_CONFIG
60#define CONFIG_SYS_KWD_CONFIG \
61 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
62#define CONFIG_KM_ENV_IS_IN_SPI_NOR
63#define CONFIG_KM_FPGA_CONFIG
64#define CONFIG_KM_PIGGY4_88E6352
Valentin Longchamp88874812012-08-16 01:25:20 +0000[diff] [blame]65#define CONFIG_MV88E6352_SWITCH
66#define CONFIG_KM_MVEXTSW_ADDR 0x10
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]67
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]68/* KM_MGCOGE3UN */
69#elif defined(CONFIG_KM_MGCOGE3UN)
70#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
71#define CONFIG_HOSTNAME mgcoge3un
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]72#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]73#undef CONFIG_SYS_KWD_CONFIG
74#define CONFIG_SYS_KWD_CONFIG \
75 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
76#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
77#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
78#define CONFIG_KM_DISABLE_PCIE
79#define CONFIG_KM_PIGGY4_88E6061
80
81/* KMCOGE5UN */
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]82#elif defined(CONFIG_KM_COGE5UN)
83#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]84#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]85#undef CONFIG_SYS_KWD_CONFIG
86#define CONFIG_SYS_KWD_CONFIG \
87 $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
88#define CONFIG_KM_ENV_IS_IN_SPI_NOR
89#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
90#define CONFIG_HOSTNAME kmcoge5un
91#define CONFIG_KM_DISABLE_PCIE
92#define CONFIG_KM_PIGGY4_88E6352
Holger Brunckc9caa7f2012-07-05 05:05:04 +0000[diff] [blame]93
94/* KM_PORTL2 */
95#elif defined(CONFIG_KM_PORTL2)
96#define CONFIG_IDENT_STRING "\nKeymile Port-L2"
97#define CONFIG_HOSTNAME portl2
Heiko Schocher8cfad362012-10-25 11:07:00 +0200[diff] [blame^]98#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckc9caa7f2012-07-05 05:05:04 +0000[diff] [blame]99#define CONFIG_KM_PIGGY4_88E6061
100
Holger Brunckac552d52013-01-15 22:51:22 +0000[diff] [blame]101/* KM_SUV31 */
102#elif defined(CONFIG_KM_SUV31)
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100[diff] [blame]103#define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/
Holger Brunckac552d52013-01-15 22:51:22 +0000[diff] [blame]104#define CONFIG_IDENT_STRING "\nKeymile SUV31"
105#define CONFIG_HOSTNAME kmsuv31
106#define CONFIG_KM_ENV_IS_IN_SPI_NOR
107#define CONFIG_KM_FPGA_CONFIG
108
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]109#else
110#error ("Board unsupported")
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]111#endif
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]112
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]113/* include common defines/options for all arm based Keymile boards */
114#include "km/km_arm.h"
115
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]116#ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100[diff] [blame]117#define KM_ENV_BUS 5 /* I2C2 (Mux-Port 5)*/
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]118#endif
119
120#if defined(CONFIG_KM_PIGGY4_88E6352)
121/*
122 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
123 * an Marvell 88E6352 simple switch.
124 * In this case we have to change the default settings for the etherent mac.
125 * There is NO ethernet phy. The ARM and Switch are conencted directly over
126 * RGMII in MAC-MAC mode
127 * In this case 1GBit full duplex and autoneg off
128 */
129#define PORT_SERIAL_CONTROL_VALUE ( \
130 MVGBE_FORCE_LINK_PASS | \
131 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
132 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
133 MVGBE_ADV_NO_FLOW_CTRL | \
134 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
135 MVGBE_FORCE_BP_MODE_NO_JAM | \
136 (1 << 9) /* Reserved bit has to be 1 */ | \
137 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
138 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
139 MVGBE_DTE_ADV_0 | \
140 MVGBE_MIIPHY_MAC_MODE | \
141 MVGBE_AUTO_NEG_NO_CHANGE | \
142 MVGBE_MAX_RX_PACKET_1552BYTE | \
143 MVGBE_CLR_EXT_LOOPBACK | \
144 MVGBE_SET_FULL_DUPLEX_MODE | \
145 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
146 MVGBE_SET_GMII_SPEED_TO_1000 |\
147 MVGBE_SET_MII_SPEED_TO_100)
148
149#endif
Heiko Schochere4533af2011-03-08 10:53:51 +0100[diff] [blame]150
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]151#ifdef CONFIG_KM_PIGGY4_88E6061
152/*
153 * Some keymile boards like mgcoge3un have their PIGGY4 connected via
154 * an Marvell 88E6061 simple switch.
155 * In this case we have to change the default settings for the
156 * ethernet phy connected to the kirkwood.
157 * In this case 100MB full duplex and autoneg off
158 */
159#define PORT_SERIAL_CONTROL_VALUE ( \
160 MVGBE_FORCE_LINK_PASS | \
161 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
162 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
163 MVGBE_ADV_NO_FLOW_CTRL | \
164 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
165 MVGBE_FORCE_BP_MODE_NO_JAM | \
166 (1 << 9) /* Reserved bit has to be 1 */ | \
167 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
168 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
169 MVGBE_DTE_ADV_0 | \
170 MVGBE_MIIPHY_MAC_MODE | \
171 MVGBE_AUTO_NEG_NO_CHANGE | \
172 MVGBE_MAX_RX_PACKET_1552BYTE | \
173 MVGBE_CLR_EXT_LOOPBACK | \
174 MVGBE_SET_FULL_DUPLEX_MODE | \
175 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
176 MVGBE_SET_GMII_SPEED_TO_10_100 |\
177 MVGBE_SET_MII_SPEED_TO_100)
178#endif
179
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]180#ifdef CONFIG_KM_DISABLE_PCI
181#undef CONFIG_KIRKWOOD_PCIE_INIT
182#endif
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000[diff] [blame]183
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000[diff] [blame]184
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]185#endif /* _CONFIG_KM_KIRKWOOD */