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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefano Babica521a772010-01-20 18:19:32 +01002/*
3 * (C) Copyright 2007
4 * Sascha Hauer, Pengutronix
5 *
6 * (C) Copyright 2009 Freescale Semiconductor, Inc.
Stefano Babica521a772010-01-20 18:19:32 +01007 */
8
9#include <common.h>
Simon Glass1d91ba72019-11-14 12:57:37 -070010#include <cpu_func.h>
Stefano Babica521a772010-01-20 18:19:32 +010011#include <asm/arch/imx-regs.h>
Stefano Babicac41d4d2010-03-05 17:54:37 +010012#include <asm/arch/clock.h>
Fabio Estevamf231efb2011-10-13 05:34:59 +000013#include <asm/arch/sys_proto.h>
Simon Glass274e0b02020-05-10 11:39:56 -060014#include <asm/cache.h>
Fabio Estevamf231efb2011-10-13 05:34:59 +000015
Masahiro Yamada56a931c2016-09-21 11:28:55 +090016#include <linux/errno.h>
Stefano Babica521a772010-01-20 18:19:32 +010017#include <asm/io.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020018#include <asm/mach-imx/boot_mode.h>
Stefano Babica521a772010-01-20 18:19:32 +010019
Liu Hui-R64343baa2d782011-01-03 22:27:35 +000020#if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
Jason Liue7a7ed22010-10-18 11:09:26 +080021#error "CPU_TYPE not defined"
22#endif
23
Stefano Babica521a772010-01-20 18:19:32 +010024u32 get_cpu_rev(void)
25{
Liu Hui-R64343baa2d782011-01-03 22:27:35 +000026#ifdef CONFIG_MX51
27 int system_rev = 0x51000;
28#else
29 int system_rev = 0x53000;
30#endif
Jason Liue7a7ed22010-10-18 11:09:26 +080031 int reg = __raw_readl(ROM_SI_REV);
Stefano Babica521a772010-01-20 18:19:32 +010032
Liu Hui-R64343baa2d782011-01-03 22:27:35 +000033#if defined(CONFIG_MX51)
Stefano Babica521a772010-01-20 18:19:32 +010034 switch (reg) {
35 case 0x02:
Jason Liue7a7ed22010-10-18 11:09:26 +080036 system_rev |= CHIP_REV_1_1;
Stefano Babica521a772010-01-20 18:19:32 +010037 break;
38 case 0x10:
39 if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
Jason Liue7a7ed22010-10-18 11:09:26 +080040 system_rev |= CHIP_REV_2_5;
Stefano Babica521a772010-01-20 18:19:32 +010041 else
Jason Liue7a7ed22010-10-18 11:09:26 +080042 system_rev |= CHIP_REV_2_0;
Stefano Babica521a772010-01-20 18:19:32 +010043 break;
44 case 0x20:
Jason Liue7a7ed22010-10-18 11:09:26 +080045 system_rev |= CHIP_REV_3_0;
Stefano Babica521a772010-01-20 18:19:32 +010046 break;
Liu Hui-R64343baa2d782011-01-03 22:27:35 +000047 default:
48 system_rev |= CHIP_REV_1_0;
49 break;
50 }
51#else
Fabio Estevam000f4d02011-04-26 10:50:15 +000052 if (reg < 0x20)
Jason Liue7a7ed22010-10-18 11:09:26 +080053 system_rev |= CHIP_REV_1_0;
Fabio Estevam000f4d02011-04-26 10:50:15 +000054 else
55 system_rev |= reg;
Liu Hui-R64343baa2d782011-01-03 22:27:35 +000056#endif
Stefano Babica521a772010-01-20 18:19:32 +010057 return system_rev;
58}
59
Fabio Estevame993b0d2013-04-24 14:44:25 +000060#ifdef CONFIG_REVISION_TAG
61u32 __weak get_board_rev(void)
62{
63 return get_cpu_rev();
64}
65#endif
66
Trevor Woerner43ec7e02019-05-03 09:41:00 -040067#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
Benoît Thébaudeaub8aaed32012-08-14 03:17:52 +000068void enable_caches(void)
69{
70 /* Enable D-cache. I-cache is already enabled in start.S */
71 dcache_enable();
72}
73#endif
74
Stefano Babica521a772010-01-20 18:19:32 +010075#if defined(CONFIG_FEC_MXC)
Jason Liuce0e55e2012-01-31 02:07:29 +000076void imx_get_mac_from_fuse(int dev_id, unsigned char *mac)
Liu Hui-R643434df66192010-11-18 23:45:55 +000077{
78 int i;
79 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
80 struct fuse_bank *bank = &iim->bank[1];
81 struct fuse_bank1_regs *fuse =
82 (struct fuse_bank1_regs *)bank->fuse_regs;
83
84 for (i = 0; i < 6; i++)
85 mac[i] = readl(&fuse->mac_addr[i]) & 0xff;
86}
87#endif
Stefano Babica521a772010-01-20 18:19:32 +010088
Troy Kisky0ca618c2012-08-15 10:31:20 +000089#ifdef CONFIG_MX53
90void boot_mode_apply(unsigned cfg_val)
91{
92 writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr);
93}
94/*
95 * cfg_val will be used for
96 * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0]
97 *
98 * If bit 28 of LPGR is set upon watchdog reset,
99 * bits[25:0] of LPGR will move to SBMR.
100 */
101const struct boot_mode soc_boot_modes[] = {
102 {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)},
103 /* usb or serial download */
104 {"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)},
105 {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)},
106 {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)},
107 {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)},
108 {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)},
109 {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)},
110 /* 4 bit bus width */
111 {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)},
112 {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)},
113 {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)},
114 {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)},
115 {NULL, 0},
116};
117#endif