Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007 |
| 4 | * Sascha Hauer, Pengutronix |
| 5 | * |
| 6 | * (C) Copyright 2009 Freescale Semiconductor, Inc. |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | 1d91ba7 | 2019-11-14 12:57:37 -0700 | [diff] [blame] | 10 | #include <cpu_func.h> |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 11 | #include <asm/arch/imx-regs.h> |
Stefano Babic | ac41d4d | 2010-03-05 17:54:37 +0100 | [diff] [blame] | 12 | #include <asm/arch/clock.h> |
Fabio Estevam | f231efb | 2011-10-13 05:34:59 +0000 | [diff] [blame] | 13 | #include <asm/arch/sys_proto.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 14 | #include <asm/cache.h> |
Fabio Estevam | f231efb | 2011-10-13 05:34:59 +0000 | [diff] [blame] | 15 | |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 16 | #include <linux/errno.h> |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 17 | #include <asm/io.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 18 | #include <asm/mach-imx/boot_mode.h> |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 19 | |
Liu Hui-R64343 | baa2d78 | 2011-01-03 22:27:35 +0000 | [diff] [blame] | 20 | #if !(defined(CONFIG_MX51) || defined(CONFIG_MX53)) |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 21 | #error "CPU_TYPE not defined" |
| 22 | #endif |
| 23 | |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 24 | u32 get_cpu_rev(void) |
| 25 | { |
Liu Hui-R64343 | baa2d78 | 2011-01-03 22:27:35 +0000 | [diff] [blame] | 26 | #ifdef CONFIG_MX51 |
| 27 | int system_rev = 0x51000; |
| 28 | #else |
| 29 | int system_rev = 0x53000; |
| 30 | #endif |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 31 | int reg = __raw_readl(ROM_SI_REV); |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 32 | |
Liu Hui-R64343 | baa2d78 | 2011-01-03 22:27:35 +0000 | [diff] [blame] | 33 | #if defined(CONFIG_MX51) |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 34 | switch (reg) { |
| 35 | case 0x02: |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 36 | system_rev |= CHIP_REV_1_1; |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 37 | break; |
| 38 | case 0x10: |
| 39 | if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0) |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 40 | system_rev |= CHIP_REV_2_5; |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 41 | else |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 42 | system_rev |= CHIP_REV_2_0; |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 43 | break; |
| 44 | case 0x20: |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 45 | system_rev |= CHIP_REV_3_0; |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 46 | break; |
Liu Hui-R64343 | baa2d78 | 2011-01-03 22:27:35 +0000 | [diff] [blame] | 47 | default: |
| 48 | system_rev |= CHIP_REV_1_0; |
| 49 | break; |
| 50 | } |
| 51 | #else |
Fabio Estevam | 000f4d0 | 2011-04-26 10:50:15 +0000 | [diff] [blame] | 52 | if (reg < 0x20) |
Jason Liu | e7a7ed2 | 2010-10-18 11:09:26 +0800 | [diff] [blame] | 53 | system_rev |= CHIP_REV_1_0; |
Fabio Estevam | 000f4d0 | 2011-04-26 10:50:15 +0000 | [diff] [blame] | 54 | else |
| 55 | system_rev |= reg; |
Liu Hui-R64343 | baa2d78 | 2011-01-03 22:27:35 +0000 | [diff] [blame] | 56 | #endif |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 57 | return system_rev; |
| 58 | } |
| 59 | |
Fabio Estevam | e993b0d | 2013-04-24 14:44:25 +0000 | [diff] [blame] | 60 | #ifdef CONFIG_REVISION_TAG |
| 61 | u32 __weak get_board_rev(void) |
| 62 | { |
| 63 | return get_cpu_rev(); |
| 64 | } |
| 65 | #endif |
| 66 | |
Trevor Woerner | 43ec7e0 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 67 | #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
Benoît Thébaudeau | b8aaed3 | 2012-08-14 03:17:52 +0000 | [diff] [blame] | 68 | void enable_caches(void) |
| 69 | { |
| 70 | /* Enable D-cache. I-cache is already enabled in start.S */ |
| 71 | dcache_enable(); |
| 72 | } |
| 73 | #endif |
| 74 | |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 75 | #if defined(CONFIG_FEC_MXC) |
Jason Liu | ce0e55e | 2012-01-31 02:07:29 +0000 | [diff] [blame] | 76 | void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) |
Liu Hui-R64343 | 4df6619 | 2010-11-18 23:45:55 +0000 | [diff] [blame] | 77 | { |
| 78 | int i; |
| 79 | struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; |
| 80 | struct fuse_bank *bank = &iim->bank[1]; |
| 81 | struct fuse_bank1_regs *fuse = |
| 82 | (struct fuse_bank1_regs *)bank->fuse_regs; |
| 83 | |
| 84 | for (i = 0; i < 6; i++) |
| 85 | mac[i] = readl(&fuse->mac_addr[i]) & 0xff; |
| 86 | } |
| 87 | #endif |
Stefano Babic | a521a77 | 2010-01-20 18:19:32 +0100 | [diff] [blame] | 88 | |
Troy Kisky | 0ca618c | 2012-08-15 10:31:20 +0000 | [diff] [blame] | 89 | #ifdef CONFIG_MX53 |
| 90 | void boot_mode_apply(unsigned cfg_val) |
| 91 | { |
| 92 | writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); |
| 93 | } |
| 94 | /* |
| 95 | * cfg_val will be used for |
| 96 | * Boot_cfg3[7:0]:Boot_cfg2[7:0]:Boot_cfg1[7:0] |
| 97 | * |
| 98 | * If bit 28 of LPGR is set upon watchdog reset, |
| 99 | * bits[25:0] of LPGR will move to SBMR. |
| 100 | */ |
| 101 | const struct boot_mode soc_boot_modes[] = { |
| 102 | {"normal", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x00)}, |
| 103 | /* usb or serial download */ |
| 104 | {"usb", MAKE_CFGVAL(0x00, 0x00, 0x00, 0x13)}, |
| 105 | {"sata", MAKE_CFGVAL(0x28, 0x00, 0x00, 0x12)}, |
| 106 | {"escpi1:0", MAKE_CFGVAL(0x38, 0x20, 0x00, 0x12)}, |
| 107 | {"escpi1:1", MAKE_CFGVAL(0x38, 0x20, 0x04, 0x12)}, |
| 108 | {"escpi1:2", MAKE_CFGVAL(0x38, 0x20, 0x08, 0x12)}, |
| 109 | {"escpi1:3", MAKE_CFGVAL(0x38, 0x20, 0x0c, 0x12)}, |
| 110 | /* 4 bit bus width */ |
| 111 | {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x12)}, |
| 112 | {"esdhc2", MAKE_CFGVAL(0x40, 0x20, 0x08, 0x12)}, |
| 113 | {"esdhc3", MAKE_CFGVAL(0x40, 0x20, 0x10, 0x12)}, |
| 114 | {"esdhc4", MAKE_CFGVAL(0x40, 0x20, 0x18, 0x12)}, |
| 115 | {NULL, 0}, |
| 116 | }; |
| 117 | #endif |