MX5: Add initial support for MX53 processor
Add initial support for Freescale MX53 processor,
- Add the iomux support and the pin definition,
- Add the regs definition, clean up some unused def from mx51,
- Add the low level init support, make use the freq input of setup_pll macro
Signed-off-by: Jason Liu <r64343@freescale.com>
diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 2900119..09500b3 100644
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -33,17 +33,20 @@
#include <fsl_esdhc.h>
#endif
-#if defined(CONFIG_MX51)
-#define CPU_TYPE 0x51000
-#else
+#if !(defined(CONFIG_MX51) || defined(CONFIG_MX53))
#error "CPU_TYPE not defined"
#endif
u32 get_cpu_rev(void)
{
- int system_rev = CPU_TYPE;
+#ifdef CONFIG_MX51
+ int system_rev = 0x51000;
+#else
+ int system_rev = 0x53000;
+#endif
int reg = __raw_readl(ROM_SI_REV);
+#if defined(CONFIG_MX51)
switch (reg) {
case 0x02:
system_rev |= CHIP_REV_1_1;
@@ -57,11 +60,20 @@
case 0x20:
system_rev |= CHIP_REV_3_0;
break;
+ default:
+ system_rev |= CHIP_REV_1_0;
+ break;
- return system_rev;
+ }
+#else
+ switch (reg) {
+ case 0x20:
+ system_rev |= CHIP_REV_2_0;
+ break;
default:
system_rev |= CHIP_REV_1_0;
break;
}
+#endif
return system_rev;
}