Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ |
| 4 | */ |
| 5 | |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 6 | #include <dt-bindings/net/ti-dp83867.h> |
| 7 | |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 8 | / { |
| 9 | chosen { |
| 10 | stdout-path = "serial2:115200n8"; |
| 11 | tick-timer = &timer1; |
| 12 | }; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 13 | |
| 14 | aliases { |
| 15 | ethernet0 = &cpsw_port1; |
Lokesh Vutla | 62eada1 | 2021-02-01 11:26:40 +0530 | [diff] [blame] | 16 | spi0 = &ospi0; |
| 17 | spi1 = &ospi1; |
| 18 | remoteproc0 = &mcu_r5fss0_core0; |
| 19 | remoteproc1 = &mcu_r5fss0_core1; |
| 20 | remoteproc2 = &main_r5fss0_core0; |
| 21 | remoteproc3 = &main_r5fss0_core1; |
| 22 | remoteproc4 = &main_r5fss1_core0; |
| 23 | remoteproc5 = &main_r5fss1_core1; |
| 24 | remoteproc6 = &c66_0; |
| 25 | remoteproc7 = &c66_1; |
| 26 | remoteproc8 = &c71_0; |
| 27 | i2c0 = &wkup_i2c0; |
| 28 | i2c1 = &mcu_i2c0; |
| 29 | i2c2 = &mcu_i2c1; |
| 30 | i2c3 = &main_i2c0; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 31 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 32 | }; |
| 33 | |
| 34 | &cbass_main{ |
| 35 | u-boot,dm-spl; |
Lokesh Vutla | 62eada1 | 2021-02-01 11:26:40 +0530 | [diff] [blame] | 36 | |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 37 | main_navss: bus@30000000 { |
Lokesh Vutla | 62eada1 | 2021-02-01 11:26:40 +0530 | [diff] [blame] | 38 | u-boot,dm-spl; |
| 39 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 40 | }; |
| 41 | |
| 42 | &cbass_mcu_wakeup { |
| 43 | u-boot,dm-spl; |
| 44 | |
| 45 | timer1: timer@40400000 { |
| 46 | compatible = "ti,omap5430-timer"; |
| 47 | reg = <0x0 0x40400000 0x0 0x80>; |
| 48 | ti,timer-alwon; |
Tero Kristo | 94388c8 | 2021-06-11 11:45:27 +0300 | [diff] [blame] | 49 | clock-frequency = <250000000>; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 50 | u-boot,dm-spl; |
| 51 | }; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 52 | |
Tom Rini | f827645 | 2021-09-10 17:37:43 -0400 | [diff] [blame] | 53 | mcu_navss: bus@28380000 { |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 54 | u-boot,dm-spl; |
| 55 | |
Vignesh Raghavendra | 01250d8 | 2020-07-07 13:43:35 +0530 | [diff] [blame] | 56 | ringacc@2b800000 { |
Vignesh Raghavendra | 7bd0288 | 2021-06-07 19:47:51 +0530 | [diff] [blame] | 57 | reg = <0x0 0x2b800000 0x0 0x400000>, |
| 58 | <0x0 0x2b000000 0x0 0x400000>, |
| 59 | <0x0 0x28590000 0x0 0x100>, |
| 60 | <0x0 0x2a500000 0x0 0x40000>, |
| 61 | <0x0 0x28440000 0x0 0x40000>; |
| 62 | reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg"; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 63 | u-boot,dm-spl; |
| 64 | }; |
| 65 | |
Vignesh Raghavendra | 01250d8 | 2020-07-07 13:43:35 +0530 | [diff] [blame] | 66 | dma-controller@285c0000 { |
Vignesh Raghavendra | 7bd0288 | 2021-06-07 19:47:51 +0530 | [diff] [blame] | 67 | reg = <0x0 0x285c0000 0x0 0x100>, |
| 68 | <0x0 0x284c0000 0x0 0x4000>, |
| 69 | <0x0 0x2a800000 0x0 0x40000>, |
| 70 | <0x0 0x284a0000 0x0 0x4000>, |
| 71 | <0x0 0x2aa00000 0x0 0x40000>, |
| 72 | <0x0 0x28400000 0x0 0x2000>; |
| 73 | reg-names = "gcfg", "rchan", "rchanrt", "tchan", |
| 74 | "tchanrt", "rflow"; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 75 | u-boot,dm-spl; |
| 76 | }; |
| 77 | }; |
Lokesh Vutla | 62eada1 | 2021-02-01 11:26:40 +0530 | [diff] [blame] | 78 | |
| 79 | chipid@43000014 { |
| 80 | u-boot,dm-spl; |
| 81 | }; |
Lokesh Vutla | ac73680 | 2019-06-13 10:29:55 +0530 | [diff] [blame] | 82 | }; |
| 83 | |
| 84 | &secure_proxy_main { |
| 85 | u-boot,dm-spl; |
| 86 | }; |
| 87 | |
| 88 | &dmsc { |
| 89 | u-boot,dm-spl; |
| 90 | k3_sysreset: sysreset-controller { |
| 91 | compatible = "ti,sci-sysreset"; |
| 92 | u-boot,dm-spl; |
| 93 | }; |
| 94 | }; |
| 95 | |
| 96 | &k3_pds { |
| 97 | u-boot,dm-spl; |
| 98 | }; |
| 99 | |
| 100 | &k3_clks { |
| 101 | u-boot,dm-spl; |
| 102 | }; |
| 103 | |
| 104 | &k3_reset { |
| 105 | u-boot,dm-spl; |
| 106 | }; |
| 107 | |
| 108 | &wkup_pmx0 { |
| 109 | u-boot,dm-spl; |
| 110 | }; |
| 111 | |
| 112 | &main_pmx0 { |
| 113 | u-boot,dm-spl; |
| 114 | }; |
| 115 | |
| 116 | &main_uart0 { |
| 117 | u-boot,dm-spl; |
| 118 | }; |
| 119 | |
| 120 | &mcu_uart0 { |
| 121 | u-boot,dm-spl; |
| 122 | }; |
| 123 | |
| 124 | &main_sdhci0 { |
| 125 | u-boot,dm-spl; |
| 126 | }; |
| 127 | |
| 128 | &main_sdhci1 { |
| 129 | u-boot,dm-spl; |
| 130 | }; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 131 | |
Kishon Vijay Abraham I | 7f3a309 | 2021-07-21 21:28:40 +0530 | [diff] [blame] | 132 | &wiz3_pll1_refclk { |
| 133 | assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; |
| 134 | assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; |
| 135 | }; |
| 136 | |
Vignesh Raghavendra | 04ed493 | 2019-11-18 19:16:35 +0530 | [diff] [blame] | 137 | &main_usbss0_pins_default { |
| 138 | u-boot,dm-spl; |
| 139 | }; |
| 140 | |
| 141 | &usbss0 { |
| 142 | u-boot,dm-spl; |
Vignesh Raghavendra | 04ed493 | 2019-11-18 19:16:35 +0530 | [diff] [blame] | 143 | }; |
| 144 | |
| 145 | &usb0 { |
| 146 | dr_mode = "peripheral"; |
| 147 | u-boot,dm-spl; |
| 148 | }; |
| 149 | |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 150 | &mcu_cpsw { |
| 151 | reg = <0x0 0x46000000 0x0 0x200000>, |
| 152 | <0x0 0x40f00200 0x0 0x2>; |
| 153 | reg-names = "cpsw_nuss", "mac_efuse"; |
Vignesh Raghavendra | 3f09ed4 | 2020-07-06 13:36:55 +0530 | [diff] [blame] | 154 | /delete-property/ ranges; |
Vignesh Raghavendra | 268dad2 | 2019-12-04 22:17:24 +0530 | [diff] [blame] | 155 | |
| 156 | cpsw-phy-sel@40f04040 { |
| 157 | compatible = "ti,am654-cpsw-phy-sel"; |
| 158 | reg= <0x0 0x40f04040 0x0 0x4>; |
| 159 | reg-names = "gmii-sel"; |
| 160 | }; |
| 161 | }; |
Faiz Abbas | c67d389 | 2020-01-16 19:42:21 +0530 | [diff] [blame] | 162 | |
| 163 | &main_mmc1_pins_default { |
| 164 | u-boot,dm-spl; |
| 165 | }; |
Andreas Dannenberg | 0fe40e9 | 2020-01-07 13:15:56 +0530 | [diff] [blame] | 166 | |
| 167 | &wkup_i2c0_pins_default { |
| 168 | u-boot,dm-spl; |
| 169 | }; |
| 170 | |
| 171 | &wkup_i2c0 { |
| 172 | u-boot,dm-spl; |
| 173 | }; |
Vignesh Raghavendra | 8a290cc | 2020-01-27 23:22:15 +0530 | [diff] [blame] | 174 | |
| 175 | &main_i2c0 { |
| 176 | u-boot,dm-spl; |
| 177 | }; |
| 178 | |
| 179 | &main_i2c0_pins_default { |
| 180 | u-boot,dm-spl; |
| 181 | }; |
| 182 | |
| 183 | &exp2 { |
| 184 | u-boot,dm-spl; |
| 185 | }; |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 186 | |
| 187 | &mcu_fss0_ospi0_pins_default { |
| 188 | u-boot,dm-spl; |
| 189 | }; |
| 190 | |
| 191 | &fss { |
| 192 | u-boot,dm-spl; |
| 193 | }; |
| 194 | |
Vaishnav Achath | 490287c | 2022-05-09 11:50:12 +0530 | [diff] [blame] | 195 | &hbmc { |
| 196 | u-boot,dm-spl; |
| 197 | |
| 198 | flash@0,0 { |
| 199 | u-boot,dm-spl; |
| 200 | }; |
| 201 | }; |
| 202 | |
| 203 | &hbmc_mux { |
| 204 | u-boot,dm-spl; |
| 205 | }; |
| 206 | |
| 207 | &wkup_gpio0 { |
| 208 | u-boot,dm-spl; |
| 209 | }; |
| 210 | |
Vignesh Raghavendra | da67437 | 2020-02-04 11:09:52 +0530 | [diff] [blame] | 211 | &ospi0 { |
| 212 | u-boot,dm-spl; |
| 213 | |
| 214 | flash@0 { |
| 215 | u-boot,dm-spl; |
| 216 | }; |
| 217 | }; |
Keerthy | 71156c9 | 2020-03-04 10:09:59 +0530 | [diff] [blame] | 218 | |
| 219 | &ospi1 { |
| 220 | u-boot,dm-spl; |
| 221 | |
| 222 | flash@0 { |
| 223 | u-boot,dm-spl; |
| 224 | }; |
| 225 | }; |
| 226 | |
Vaishnav Achath | 490287c | 2022-05-09 11:50:12 +0530 | [diff] [blame] | 227 | &mcu_fss0_hpb0_pins_default { |
| 228 | u-boot,dm-spl; |
| 229 | }; |
| 230 | |
| 231 | &wkup_gpio_pins_default { |
| 232 | u-boot,dm-spl; |
| 233 | }; |
| 234 | |
Keerthy | 71156c9 | 2020-03-04 10:09:59 +0530 | [diff] [blame] | 235 | &mcu_fss0_ospi1_pins_default { |
| 236 | u-boot,dm-spl; |
| 237 | }; |
Suman Anna | 90eecec | 2021-05-18 16:38:25 -0500 | [diff] [blame] | 238 | |
| 239 | &main_r5fss0 { |
| 240 | ti,cluster-mode = <0>; |
| 241 | }; |
| 242 | |
| 243 | &main_r5fss1 { |
| 244 | ti,cluster-mode = <0>; |
| 245 | }; |
Kishon Vijay Abraham I | 7f3a309 | 2021-07-21 21:28:40 +0530 | [diff] [blame] | 246 | |
| 247 | &wiz3_pll1_refclk { |
| 248 | assigned-clocks = <&wiz3_pll1_refclk>, <&wiz3_pll0_refclk>; |
| 249 | assigned-clock-parents = <&k3_clks 295 0>, <&k3_clks 295 9>; |
| 250 | }; |
| 251 | |
| 252 | &serdes_ln_ctrl { |
| 253 | u-boot,mux-autoprobe; |
| 254 | }; |
| 255 | |
| 256 | &usb_serdes_mux { |
| 257 | u-boot,mux-autoprobe; |
| 258 | }; |
Aswath Govindraju | dcfb97e | 2022-01-28 13:41:39 +0530 | [diff] [blame] | 259 | |
| 260 | &serdes0 { |
| 261 | /delete-property/ assigned-clocks; |
| 262 | /delete-property/ assigned-clock-parents; |
| 263 | }; |
| 264 | |
| 265 | &serdes0_pcie_link { |
| 266 | assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC>; |
| 267 | assigned-clock-parents = <&wiz0_pll1_refclk>; |
| 268 | }; |
Aswath Govindraju | 83a8367 | 2022-01-28 13:41:51 +0530 | [diff] [blame] | 269 | |
| 270 | &serdes0_qsgmii_link { |
| 271 | assigned-clocks = <&serdes0 CDNS_SIERRA_PLL_CMNLC1>; |
| 272 | assigned-clock-parents = <&wiz0_pll1_refclk>; |
| 273 | }; |