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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Scott Wood095b7122012-09-20 19:02:18 -05002/*
3 * (C) Copyright 2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
5 *
6 * Copyright 2009 Freescale Semiconductor, Inc.
Scott Wood095b7122012-09-20 19:02:18 -05007 */
8
Masahiro Yamadacd1b58e2014-04-28 10:17:10 +09009#include "config.h"
Scott Wood095b7122012-09-20 19:02:18 -050010
11OUTPUT_ARCH(powerpc)
Ying Zhang0d4f5442013-05-20 14:07:23 +080012#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
13PHDRS
14{
15 text PT_LOAD;
16 bss PT_LOAD;
17}
18#endif
Scott Wood095b7122012-09-20 19:02:18 -050019SECTIONS
20{
Tom Rini0a01a442019-01-22 17:09:24 -050021#ifdef CONFIG_TPL_BUILD
22 . = CONFIG_TPL_TEXT_BASE;
23#else
Scott Wood095b7122012-09-20 19:02:18 -050024 . = CONFIG_SPL_TEXT_BASE;
Tom Rini0a01a442019-01-22 17:09:24 -050025#endif
Scott Wood095b7122012-09-20 19:02:18 -050026 .text : {
27 *(.text*)
28 }
29 _etext = .;
30
31 .reloc : {
32 _GOT2_TABLE_ = .;
33 KEEP(*(.got2))
34 KEEP(*(.got))
Scott Wood095b7122012-09-20 19:02:18 -050035 _FIXUP_TABLE_ = .;
36 KEEP(*(.fixup))
37 }
38 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
39 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
40
41 . = ALIGN(8);
42 .data : {
43 *(.rodata*)
44 *(.data*)
45 *(.sdata*)
46 }
47 _edata = .;
48
Ying Zhang4393f952013-09-04 17:03:45 +080049 . = ALIGN(4);
50 .u_boot_list : {
51 KEEP(*(SORT(.u_boot_list*)));
52 }
53
Ying Zhang9ff70262013-08-16 15:16:11 +080054 . = .;
55 __start___ex_table = .;
56 __ex_table : { *(__ex_table) }
57 __stop___ex_table = .;
58
Scott Wood095b7122012-09-20 19:02:18 -050059 . = ALIGN(8);
60 __init_begin = .;
61 __init_end = .;
Jagdish Gediya910e1ae2018-09-03 21:35:05 +053062 _end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +053063#ifdef CONFIG_SPL_SKIP_RELOCATE
64 . = ALIGN(4);
65 __bss_start = .;
66 .bss : {
67 *(.sbss*)
68 *(.bss*)
69 }
70 . = ALIGN(4);
71 __bss_end = .;
72#endif
Po Liuf6facca2014-01-10 10:10:58 +080073
74/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
75#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
76 .bootpg ADDR(.text) - 0x1000 :
77 {
78 KEEP(*(.bootpg))
79 } :text = 0xffff
80#else
Scott Wood095b7122012-09-20 19:02:18 -050081#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053082#ifndef BOOT_PAGE_OFFSET
83#define BOOT_PAGE_OFFSET 0x1000
84#endif
85 .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
Scott Wood095b7122012-09-20 19:02:18 -050086 {
Prabhakar Kushwahaab4ab012013-04-16 13:27:59 +053087 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Scott Wood095b7122012-09-20 19:02:18 -050088 }
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053089#ifndef RESET_VECTOR_OFFSET
Scott Wood095b7122012-09-20 19:02:18 -050090#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053091#endif
Scott Wood095b7122012-09-20 19:02:18 -050092#elif defined(CONFIG_FSL_ELBC)
93#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
94#else
95#error unknown NAND controller
96#endif
97 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
98 KEEP(*(.resetvec))
99 } = 0xffff
Ying Zhang0d4f5442013-05-20 14:07:23 +0800100#endif
Scott Wood095b7122012-09-20 19:02:18 -0500101
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +0530102#ifndef CONFIG_SPL_SKIP_RELOCATE
Scott Wood095b7122012-09-20 19:02:18 -0500103 /*
104 * Make sure that the bss segment isn't linked at 0x0, otherwise its
105 * address won't be updated during relocation fixups.
106 */
107 . |= 0x10;
108
Ying Zhang5ca62f22013-06-07 17:25:16 +0800109 . = ALIGN(4);
Scott Wood095b7122012-09-20 19:02:18 -0500110 __bss_start = .;
111 .bss : {
112 *(.sbss*)
113 *(.bss*)
114 }
Ying Zhang5ca62f22013-06-07 17:25:16 +0800115 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000116 __bss_end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +0530117#endif
Scott Wood095b7122012-09-20 19:02:18 -0500118}