blob: 613da60540ebee9ac769e80b0778ac71f64e3acb [file] [log] [blame]
Simon Glassbf8d7bf2016-11-13 14:22:16 -07001CONFIG_ARM=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +00002# CONFIG_SPL_USE_ARCH_MEMCPY is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -07003CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -05004CONFIG_SYS_TEXT_BASE=0x00100000
Tom Rini2e262c42020-08-10 15:31:07 -04005CONFIG_NR_DRAM_BANKS=1
Tom Rinia20e51f2021-06-28 10:17:29 -04006CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey"
Tom Rini0332a1a2020-07-06 13:54:25 -04007CONFIG_SPL_TEXT_BASE=0xff704000
Simon Glassbf8d7bf2016-11-13 14:22:16 -07008CONFIG_ROCKCHIP_RK3288=y
Tom Rini9834b902017-03-13 13:48:42 -04009# CONFIG_SPL_MMC_SUPPORT is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070010CONFIG_TARGET_CHROMEBIT_MICKEY=y
Tom Rinic9285bf2019-04-29 15:54:04 -040011CONFIG_SPL_STACK_R_ADDR=0x80000
Tom Rinie0056d72018-06-04 11:57:37 -040012CONFIG_DEBUG_UART_BASE=0xff690000
13CONFIG_DEBUG_UART_CLOCK=24000000
Simon Glassbf8d7bf2016-11-13 14:22:16 -070014CONFIG_SPL_SPI_FLASH_SUPPORT=y
15CONFIG_SPL_SPI_SUPPORT=y
Tom Rini47dece32020-04-28 16:15:47 -040016CONFIG_SPL_PAYLOAD="u-boot.img"
Tom Rini84610272020-07-28 08:46:52 -040017CONFIG_DEBUG_UART=y
Tom Rini0997ee02021-08-23 10:25:31 -040018CONFIG_SYS_LOAD_ADDR=0x800800
Simon Glass4be229d2019-07-20 20:51:14 -060019CONFIG_USE_PREBOOT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +020020CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb"
Simon Glassbf8d7bf2016-11-13 14:22:16 -070021# CONFIG_DISPLAY_CPUINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +020022CONFIG_DISPLAY_BOARDINFO_LATE=y
Urja Rannikkoe8c4c962020-05-13 19:15:21 +000023CONFIG_BOARD_EARLY_INIT_R=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000024# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070025CONFIG_SPL_STACK_R=y
26CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Urja Rannikko35bd7c62019-05-13 13:51:05 +000027# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
Simon Glassefc12232021-07-14 17:05:32 -050028# CONFIG_SPL_CRC32 is not set
Marek Vasute2542252018-04-07 16:05:27 +020029CONFIG_SPL_SPI_LOAD=y
Tom Rinie22fa4f2021-08-10 15:08:46 -040030CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
Tom Rini78873cd2017-08-14 19:58:53 -040031CONFIG_CMD_GPIO=y
Patrick Delaunay73287092017-01-27 11:00:42 +010032CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -040033CONFIG_CMD_I2C=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070034CONFIG_CMD_MMC=y
Simon Glass86b1b652017-08-04 16:34:46 -060035CONFIG_CMD_SF_TEST=y
Tom Rini78873cd2017-08-14 19:58:53 -040036CONFIG_CMD_SPI=y
Eddie Caib3501fe2017-12-15 08:17:13 +080037CONFIG_CMD_USB=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070038# CONFIG_CMD_SETEXPR is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070039CONFIG_CMD_CACHE=y
40CONFIG_CMD_TIME=y
41CONFIG_CMD_PMIC=y
42CONFIG_CMD_REGULATOR=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +010043# CONFIG_SPL_DOS_PARTITION is not set
Patrick Delaunay8a4f2bd2017-01-27 11:00:41 +010044# CONFIG_SPL_EFI_PARTITION is not set
Patrick Delaunay73287092017-01-27 11:00:42 +010045CONFIG_SPL_PARTITION_UUIDS=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070046CONFIG_SPL_OF_CONTROL=y
47CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Urja Rannikko35bd7c62019-05-13 13:51:05 +000048CONFIG_SPL_OF_PLATDATA=y
Tom Rinica63e712019-11-12 22:46:36 -050049CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070050CONFIG_REGMAP=y
51CONFIG_SPL_REGMAP=y
52CONFIG_SYSCON=y
53CONFIG_SPL_SYSCON=y
54# CONFIG_SPL_SIMPLE_BUS is not set
Urja Rannikko35bd7c62019-05-13 13:51:05 +000055# CONFIG_SPL_BLK is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070056CONFIG_CLK=y
57CONFIG_SPL_CLK=y
58CONFIG_ROCKCHIP_GPIO=y
59CONFIG_I2C_CROS_EC_TUNNEL=y
60CONFIG_SYS_I2C_ROCKCHIP=y
61CONFIG_I2C_MUX=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +090062CONFIG_DM_KEYBOARD=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070063CONFIG_CROS_EC_KEYB=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070064CONFIG_CROS_EC=y
65CONFIG_CROS_EC_SPI=y
66CONFIG_PWRSEQ=y
Jaehoon Chunge711c972021-02-16 10:16:56 +090067CONFIG_MMC_PWRSEQ=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000068# CONFIG_SPL_DM_MMC is not set
Masahiro Yamada7942e912017-01-10 13:32:04 +090069CONFIG_MMC_DW=y
Masahiro Yamadadc607f82017-01-10 13:32:03 +090070CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +020071CONFIG_MTD=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000072CONFIG_SF_DEFAULT_BUS=2
Patrick Delaunay0df81042019-02-27 15:20:36 +010073CONFIG_SF_DEFAULT_SPEED=20000000
Urja Rannikko7a19eec2019-05-13 13:51:03 +000074CONFIG_SPI_FLASH_GIGADEVICE=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070075CONFIG_PINCTRL=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000076CONFIG_PINCONF=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070077CONFIG_SPL_PINCTRL=y
Urja Rannikkoaa02ec02020-05-13 19:15:23 +000078# CONFIG_SPL_PINCTRL_FULL is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070079CONFIG_DM_PMIC=y
80# CONFIG_SPL_PMIC_CHILDREN is not set
Jacob Chen614704b2017-05-02 14:54:52 +080081CONFIG_PMIC_RK8XX=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070082CONFIG_DM_REGULATOR_FIXED=y
Jacob Chen614704b2017-05-02 14:54:52 +080083CONFIG_REGULATOR_RK8XX=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070084CONFIG_PWM_ROCKCHIP=y
85CONFIG_RAM=y
86CONFIG_SPL_RAM=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070087CONFIG_DEBUG_UART_SHIFT=2
Simon Glassbf8d7bf2016-11-13 14:22:16 -070088CONFIG_ROCKCHIP_SPI=y
89CONFIG_SYSRESET=y
Tom Rini504997e2017-08-25 17:50:26 -040090CONFIG_USB=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000091# CONFIG_SPL_DM_USB is not set
92CONFIG_USB_DWC2=y
Adam Fordd4183d62018-01-02 10:39:52 -060093CONFIG_ROCKCHIP_USB2_PHY=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -070094CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +010095# CONFIG_VIDEO_BPP8 is not set
Simon Glassbf8d7bf2016-11-13 14:22:16 -070096CONFIG_DISPLAY=y
97CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.com735ddea2017-04-17 22:24:23 +080098CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Urja Rannikko35bd7c62019-05-13 13:51:05 +000099CONFIG_SPL_TINY_MEMSET=y
Simon Glassbf8d7bf2016-11-13 14:22:16 -0700100CONFIG_CMD_DHRYSTONE=y
101CONFIG_ERRNO_STR=y