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SARTRE Leodce71762013-06-03 23:30:36 +00001/*
2 *
3 * Congatec Conga-QEVAl board configuration file.
4 *
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
9 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
SARTRE Leodce71762013-06-03 23:30:36 +000011 */
12
13#ifndef __CONFIG_CGTQMX6EVAL_H
14#define __CONFIG_CGTQMX6EVAL_H
15
SARTRE Leodce71762013-06-03 23:30:36 +000016#include "mx6_common.h"
17
SARTRE Leodce71762013-06-03 23:30:36 +000018#define CONFIG_MACH_TYPE 4122
19
Otavio Salvadore186b182015-11-19 19:02:36 -020020#ifdef CONFIG_SPL
Otavio Salvadore186b182015-11-19 19:02:36 -020021#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
22#define CONFIG_SPL_SPI_LOAD
23#include "imx6_spl.h"
24#endif
25
SARTRE Leodce71762013-06-03 23:30:36 +000026/* Size of malloc() pool */
27#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
28
29#define CONFIG_BOARD_EARLY_INIT_F
Otavio Salvadore186b182015-11-19 19:02:36 -020030#define CONFIG_BOARD_LATE_INIT
SARTRE Leodce71762013-06-03 23:30:36 +000031#define CONFIG_MISC_INIT_R
SARTRE Leodce71762013-06-03 23:30:36 +000032
33#define CONFIG_MXC_UART
34#define CONFIG_MXC_UART_BASE UART2_BASE
35
36/* MMC Configs */
SARTRE Leodce71762013-06-03 23:30:36 +000037#define CONFIG_SYS_FSL_ESDHC_ADDR 0
38
Otavio Salvadorf594b552015-11-19 19:02:33 -020039/* SPI NOR */
Otavio Salvadorf594b552015-11-19 19:02:33 -020040#define CONFIG_SPI_FLASH
41#define CONFIG_SPI_FLASH_STMICRO
42#define CONFIG_SPI_FLASH_SST
43#define CONFIG_MXC_SPI
44#define CONFIG_SF_DEFAULT_BUS 0
45#define CONFIG_SF_DEFAULT_SPEED 20000000
46#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
47
SARTRE Leodce71762013-06-03 23:30:36 +000048/* Miscellaneous commands */
49#define CONFIG_CMD_BMODE
50
Otavio Salvador38881002015-07-23 11:02:27 -030051/* Thermal support */
Adrian Alonsoce08c362015-09-02 13:54:13 -050052#define CONFIG_IMX_THERMAL
Otavio Salvador38881002015-07-23 11:02:27 -030053
Otavio Salvador0378d632015-07-23 11:02:28 -030054/* I2C Configs */
Otavio Salvador0378d632015-07-23 11:02:28 -030055#define CONFIG_SYS_I2C
56#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020057#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
58#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Otavio Salvador0378d632015-07-23 11:02:28 -030059#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60#define CONFIG_SYS_I2C_SPEED 100000
61
62/* PMIC */
63#define CONFIG_POWER
64#define CONFIG_POWER_I2C
65#define CONFIG_POWER_PFUZE100
66#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
67
Otavio Salvadorc8762d02015-07-23 11:02:29 -030068/* USB Configs */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030069#define CONFIG_USB_EHCI
70#define CONFIG_USB_EHCI_MX6
Otavio Salvadorc8762d02015-07-23 11:02:29 -030071#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72#define CONFIG_USB_HOST_ETHER
73#define CONFIG_USB_ETHER_ASIX
74#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
75#define CONFIG_MXC_USB_FLAGS 0
76#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
Otavio Salvadorc8762d02015-07-23 11:02:29 -030077#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
78
Otavio Salvadoredd28992015-09-17 15:13:20 -030079#define CONFIG_USBD_HS
Otavio Salvadoredd28992015-09-17 15:13:20 -030080
Otavio Salvadoredd28992015-09-17 15:13:20 -030081#define CONFIG_USB_FUNCTION_MASS_STORAGE
Otavio Salvadoredd28992015-09-17 15:13:20 -030082
Otavio Salvadorf62abc42015-11-19 19:02:35 -020083#define CONFIG_USB_FUNCTION_FASTBOOT
84#define CONFIG_CMD_FASTBOOT
85#define CONFIG_ANDROID_BOOT_IMAGE
86#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
87#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
88
Otavio Salvador6c46cd12015-07-23 11:02:30 -030089/* Framebuffer */
Otavio Salvador6c46cd12015-07-23 11:02:30 -030090#define CONFIG_VIDEO_IPUV3
Otavio Salvador6c46cd12015-07-23 11:02:30 -030091#define CONFIG_VIDEO_BMP_RLE8
92#define CONFIG_SPLASH_SCREEN
93#define CONFIG_SPLASH_SCREEN_ALIGN
94#define CONFIG_BMP_16BPP
95#define CONFIG_VIDEO_LOGO
96#define CONFIG_VIDEO_BMP_LOGO
97#ifdef CONFIG_MX6DL
98#define CONFIG_IPUV3_CLK 198000000
99#else
100#define CONFIG_IPUV3_CLK 264000000
101#endif
102#define CONFIG_IMX_HDMI
103
Otavio Salvadordf82d002015-07-23 11:02:31 -0300104/* SATA */
105#define CONFIG_CMD_SATA
106#define CONFIG_DWC_AHSATA
107#define CONFIG_SYS_SATA_MAX_DEVICE 1
108#define CONFIG_DWC_AHSATA_PORT_ID 0
109#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
110#define CONFIG_LBA48
111#define CONFIG_LIBATA
112
Otavio Salvadore6b47822015-07-28 20:24:41 -0300113/* Ethernet */
Otavio Salvadore6b47822015-07-28 20:24:41 -0300114#define CONFIG_FEC_MXC
115#define CONFIG_MII
116#define IMX_FEC_BASE ENET_BASE_ADDR
117#define CONFIG_FEC_XCV_TYPE RGMII
118#define CONFIG_ETHPRIME "FEC"
119#define CONFIG_FEC_MXC_PHYADDR 6
120#define CONFIG_PHYLIB
121#define CONFIG_PHY_ATHEROS
122
Otavio Salvador4ac01402015-07-23 11:02:33 -0300123/* Command definition */
124
125#define CONFIG_MXC_UART_BASE UART2_BASE
Simon Glass4694a742016-10-17 20:12:39 -0600126#define CONSOLE_DEV "ttymxc1"
Otavio Salvador4ac01402015-07-23 11:02:33 -0300127#define CONFIG_MMCROOT "/dev/mmcblk0p2"
128#define CONFIG_SYS_MMC_ENV_DEV 0
SARTRE Leodce71762013-06-03 23:30:36 +0000129
Otavio Salvadore186b182015-11-19 19:02:36 -0200130#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
SARTRE Leodce71762013-06-03 23:30:36 +0000131#define CONFIG_EXTRA_ENV_SETTINGS \
132 "script=boot.scr\0" \
Otavio Salvador43465d92014-01-16 19:57:56 -0200133 "image=zImage\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200134 "fdtfile=undefined\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300135 "fdt_addr_r=0x18000000\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000136 "boot_fdt=try\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300137 "ip_dyn=yes\0" \
Simon Glass4694a742016-10-17 20:12:39 -0600138 "console=" CONSOLE_DEV "\0" \
Otavio Salvadorc102b9e2015-11-19 19:02:38 -0200139 "dfuspi=dfu 0 sf 0:0:10000000:0\0" \
140 "dfu_alt_info_spl=spl raw 0x400\0" \
141 "dfu_alt_info_img=u-boot raw 0x10000\0" \
142 "dfu_alt_info=spl raw 0x400\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300143 "bootm_size=0x10000000\0" \
144 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000145 "mmcpart=1\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300146 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
147 "update_sd_firmware=" \
148 "if test ${ip_dyn} = yes; then " \
149 "setenv get_cmd dhcp; " \
150 "else " \
151 "setenv get_cmd tftp; " \
152 "fi; " \
153 "if mmc dev ${mmcdev}; then " \
154 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
155 "setexpr fw_sz ${filesize} / 0x200; " \
156 "setexpr fw_sz ${fw_sz} + 1; " \
157 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
158 "fi; " \
159 "fi\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000160 "mmcargs=setenv bootargs console=${console},${baudrate} " \
161 "root=${mmcroot}\0" \
162 "loadbootscript=" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300163 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000164 "bootscript=echo Running bootscript from mmc ...; " \
165 "source\0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300166 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
167 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
SARTRE Leodce71762013-06-03 23:30:36 +0000168 "mmcboot=echo Booting from mmc ...; " \
169 "run mmcargs; " \
170 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
171 "if run loadfdt; then " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300172 "bootz ${loadaddr} - ${fdt_addr_r}; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000173 "else " \
174 "if test ${boot_fdt} = try; then " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200175 "bootz; " \
SARTRE Leodce71762013-06-03 23:30:36 +0000176 "else " \
177 "echo WARN: Cannot load the DT; " \
178 "fi; " \
179 "fi; " \
180 "else " \
Otavio Salvador43465d92014-01-16 19:57:56 -0200181 "bootz; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300182 "fi;\0" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200183 "findfdt="\
184 "if test $board_rev = MX6Q ; then " \
185 "setenv fdtfile imx6q-qmx6.dtb; fi; " \
186 "if test $board_rev = MX6DL ; then " \
187 "setenv fdtfile imx6dl-qmx6.dtb; fi; " \
188 "if test $fdtfile = undefined; then " \
189 "echo WARNING: Could not determine dtb to use; fi; \0" \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300190 "netargs=setenv bootargs console=${console},${baudrate} " \
191 "root=/dev/nfs " \
192 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
193 "netboot=echo Booting from net ...; " \
194 "run netargs; " \
195 "if test ${ip_dyn} = yes; then " \
196 "setenv get_cmd dhcp; " \
197 "else " \
198 "setenv get_cmd tftp; " \
199 "fi; " \
200 "${get_cmd} ${image}; " \
201 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
202 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
203 "bootz ${loadaddr} - ${fdt_addr_r}; " \
204 "else " \
205 "if test ${boot_fdt} = try; then " \
206 "bootz; " \
207 "else " \
208 "echo WARN: Cannot load the DT; " \
209 "fi; " \
210 "fi; " \
211 "else " \
212 "bootz; " \
213 "fi;\0" \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200214 "spilock=sf probe && sf protect lock 0x3f0000 0x10000;"\
SARTRE Leodce71762013-06-03 23:30:36 +0000215
216#define CONFIG_BOOTCOMMAND \
Otavio Salvadorf594b552015-11-19 19:02:33 -0200217 "run spilock;" \
Otavio Salvadore186b182015-11-19 19:02:36 -0200218 "run findfdt; " \
Otavio Salvador4ac01402015-07-23 11:02:33 -0300219 "mmc dev ${mmcdev};" \
220 "if mmc rescan; then " \
221 "if run loadbootscript; then " \
222 "run bootscript; " \
223 "else " \
224 "if run loadimage; then " \
225 "run mmcboot; " \
226 "else run netboot; " \
227 "fi; " \
228 "fi; " \
229 "else run netboot; fi"
SARTRE Leodce71762013-06-03 23:30:36 +0000230
SARTRE Leodce71762013-06-03 23:30:36 +0000231#define CONFIG_SYS_MEMTEST_START 0x10000000
232#define CONFIG_SYS_MEMTEST_END 0x10010000
233#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
234
SARTRE Leodce71762013-06-03 23:30:36 +0000235/* Physical Memory Map */
236#define CONFIG_NR_DRAM_BANKS 1
237#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
SARTRE Leodce71762013-06-03 23:30:36 +0000238
239#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
240#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
241#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
242
243#define CONFIG_SYS_INIT_SP_OFFSET \
244 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
245#define CONFIG_SYS_INIT_SP_ADDR \
246 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
247
Peter Robinson4b671502015-05-22 17:30:45 +0100248/* Environment organization */
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200249#if defined (CONFIG_ENV_IS_IN_MMC)
SARTRE Leodce71762013-06-03 23:30:36 +0000250#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
251#define CONFIG_SYS_MMC_ENV_DEV 0
Otavio Salvadorca4d60b2015-11-19 19:02:34 -0200252#endif
253
254#define CONFIG_ENV_SIZE (8 * 1024)
255
256#define CONFIG_ENV_IS_IN_SPI_FLASH
257#if defined(CONFIG_ENV_IS_IN_SPI_FLASH)
258#define CONFIG_ENV_OFFSET (768 * 1024)
259#define CONFIG_ENV_SECT_SIZE (64 * 1024)
260#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
261#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
262#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
263#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
264#endif
SARTRE Leodce71762013-06-03 23:30:36 +0000265
SARTRE Leodce71762013-06-03 23:30:36 +0000266#endif /* __CONFIG_CGTQMX6EVAL_H */