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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04002/*
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +00003 * Common configuration settings for IGEP technology based boards
4 *
5 * (C) Copyright 2012
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04006 * ISEE 2007 SL, <www.iseebcn.com>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -04007 */
8
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +00009#ifndef __IGEP00X0_H
10#define __IGEP00X0_H
11
Enric Balletbò i Serraed116482013-12-06 21:30:24 +010012#include <configs/ti_omap3_common.h>
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040013
Tom Rinicfff4aa2016-08-26 13:30:43 -040014/*
15 * We are only ever GP parts and will utilize all of the "downloaded image"
16 * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB).
17 */
Enric Balletbo i Serra8aa10d42016-05-03 08:59:24 +020018
Pau Pajuelo4ddc3092017-08-17 03:09:14 +020019/* TPS65950 */
20#define PBIASLITEVMODE1 (1 << 8)
21
22/* LED */
23#define IGEP0020_GPIO_LED 27
24#define IGEP0030_GPIO_LED 16
25
26/* Board and revision detection GPIOs */
27#define IGEP0030_USB_TRANSCEIVER_RESET 54
28#define GPIO_IGEP00X0_BOARD_DETECTION 28
29#define GPIO_IGEP00X0_REVISION_DETECTION 129
Javier Martinez Canillasd549ace2012-12-27 03:36:01 +000030
Enric Balletbò i Serraa5d75f72015-09-07 08:28:09 +020031/* Environment */
32#define ENV_DEVICE_SETTINGS \
33 "stdin=serial\0" \
34 "stdout=serial\0" \
35 "stderr=serial\0"
36
37#define MEM_LAYOUT_SETTINGS \
38 DEFAULT_LINUX_BOOT_ENV \
39 "scriptaddr=0x87E00000\0" \
40 "pxefile_addr_r=0x87F00000\0"
41
42#define BOOT_TARGET_DEVICES(func) \
43 func(MMC, mmc, 0)
44
45#include <config_distro_bootcmd.h>
46
Pau Pajuelo4ddc3092017-08-17 03:09:14 +020047#define ENV_FINDFDT \
48 "findfdt="\
49 "if test ${board_name} = igep0020; then " \
50 "if test ${board_rev} = F; then " \
51 "setenv fdtfile omap3-igep0020-rev-f.dtb; " \
52 "else " \
53 "setenv fdtfile omap3-igep0020.dtb; fi; fi; " \
54 "if test ${board_name} = igep0030; then " \
55 "if test ${board_rev} = G; then " \
56 "setenv fdtfile omap3-igep0030-rev-g.dtb; " \
57 "else " \
58 "setenv fdtfile omap3-igep0030.dtb; fi; fi; " \
59 "if test ${fdtfile} = ''; then " \
60 "echo WARNING: Could not determine device tree to use; fi; \0"
61
Enric Balletbo i Serra2ce268c2010-10-14 16:54:59 -040062#define CONFIG_EXTRA_ENV_SETTINGS \
Pau Pajuelo4ddc3092017-08-17 03:09:14 +020063 ENV_FINDFDT \
Enric Balletbò i Serraa5d75f72015-09-07 08:28:09 +020064 ENV_DEVICE_SETTINGS \
65 MEM_LAYOUT_SETTINGS \
66 BOOTENV
Enric Balletbo i Serra4adf8012011-04-19 09:16:36 -040067
Ladislav Michl43a60622016-07-12 20:28:32 +020068/* OneNAND config */
Ladislav Michl43a60622016-07-12 20:28:32 +020069#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
70#define CONFIG_SYS_ONENAND_BLOCK_SIZE (128*1024)
Javier Martinez Canillas361fc832012-07-28 01:19:34 +000071
Ladislav Michl43a60622016-07-12 20:28:32 +020072/* NAND config */
Ladislav Michl8ed5b0b2015-10-12 18:09:14 +020073#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
74 10, 11, 12, 13, 14, 15, 16, 17, \
75 18, 19, 20, 21, 22, 23, 24, 25, \
76 26, 27, 28, 29, 30, 31, 32, 33, \
77 34, 35, 36, 37, 38, 39, 40, 41, \
78 42, 43, 44, 45, 46, 47, 48, 49, \
79 50, 51, 52, 53, 54, 55, 56, 57, }
Javier Martinez Canillas361fc832012-07-28 01:19:34 +000080#define CONFIG_SYS_NAND_ECCSIZE 512
Ladislav Michl8ed5b0b2015-10-12 18:09:14 +020081#define CONFIG_SYS_NAND_ECCBYTES 14
Ladislav Michl8ed5b0b2015-10-12 18:09:14 +020082
Enric Balletbò i Serra19f9df82012-03-05 11:32:16 +000083#endif /* __IGEP00X0_H */