Bin Meng | 8a8694d | 2018-09-26 06:55:21 -0700 | [diff] [blame] | 1 | if TARGET_QEMU_VIRT |
2 | |||||
3 | config SYS_BOARD | ||||
4 | default "qemu-riscv" | ||||
5 | |||||
6 | config SYS_VENDOR | ||||
7 | default "emulation" | ||||
8 | |||||
9 | config SYS_CPU | ||||
Anup Patel | 1240cd6 | 2019-02-25 08:14:10 +0000 | [diff] [blame] | 10 | default "generic" |
Bin Meng | 8a8694d | 2018-09-26 06:55:21 -0700 | [diff] [blame] | 11 | |
12 | config SYS_CONFIG_NAME | ||||
13 | default "qemu-riscv" | ||||
14 | |||||
15 | config SYS_TEXT_BASE | ||||
Lukas Auer | df3f100 | 2019-08-21 21:14:49 +0200 | [diff] [blame] | 16 | default 0x81200000 if SPL |
Anup Patel | ea6a7a0 | 2018-12-03 10:57:41 +0530 | [diff] [blame] | 17 | default 0x80000000 if !RISCV_SMODE |
Anup Patel | 3d7cb7b | 2019-04-11 06:52:12 +0000 | [diff] [blame] | 18 | default 0x80200000 if RISCV_SMODE && ARCH_RV64I |
19 | default 0x80400000 if RISCV_SMODE && ARCH_RV32I | ||||
Bin Meng | 8a8694d | 2018-09-26 06:55:21 -0700 | [diff] [blame] | 20 | |
Lukas Auer | df3f100 | 2019-08-21 21:14:49 +0200 | [diff] [blame] | 21 | config SPL_TEXT_BASE |
22 | default 0x80000000 | ||||
23 | |||||
24 | config SPL_OPENSBI_LOAD_ADDR | ||||
Bin Meng | 99e54e6 | 2019-08-07 23:04:41 -0700 | [diff] [blame] | 25 | hex |
Bin Meng | e702dea | 2022-10-17 00:42:06 +0800 | [diff] [blame] | 26 | default 0x80100000 |
Lukas Auer | df3f100 | 2019-08-21 21:14:49 +0200 | [diff] [blame] | 27 | |
Bin Meng | 8a8694d | 2018-09-26 06:55:21 -0700 | [diff] [blame] | 28 | config BOARD_SPECIFIC_OPTIONS # dummy |
29 | def_bool y | ||||
Anup Patel | 1240cd6 | 2019-02-25 08:14:10 +0000 | [diff] [blame] | 30 | select GENERIC_RISCV |
Lukas Auer | df3f100 | 2019-08-21 21:14:49 +0200 | [diff] [blame] | 31 | select SUPPORT_SPL |
Heinrich Schuchardt | 6058551 | 2020-11-04 12:49:01 +0100 | [diff] [blame] | 32 | imply AHCI |
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 33 | imply SMP |
34 | imply BOARD_LATE_INIT | ||||
Heinrich Schuchardt | 6058551 | 2020-11-04 12:49:01 +0100 | [diff] [blame] | 35 | imply PCI_INIT_R |
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 36 | imply SPL_RAM_SUPPORT |
37 | imply SPL_RAM_DEVICE | ||||
38 | imply CMD_PCI | ||||
39 | imply CMD_POWEROFF | ||||
Heinrich Schuchardt | 375c108 | 2022-03-23 22:46:43 +0100 | [diff] [blame] | 40 | imply CMD_SBI |
Heinrich Schuchardt | 6058551 | 2020-11-04 12:49:01 +0100 | [diff] [blame] | 41 | imply CMD_SCSI |
Bin Meng | f08aa02 | 2018-10-15 02:21:14 -0700 | [diff] [blame] | 42 | imply CMD_PING |
Bin Meng | f08aa02 | 2018-10-15 02:21:14 -0700 | [diff] [blame] | 43 | imply CMD_EXT2 |
44 | imply CMD_EXT4 | ||||
45 | imply CMD_FAT | ||||
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 46 | imply CMD_FS_GENERIC |
47 | imply DOS_PARTITION | ||||
48 | imply ISO_PARTITION | ||||
49 | imply EFI_PARTITION | ||||
Heinrich Schuchardt | 6058551 | 2020-11-04 12:49:01 +0100 | [diff] [blame] | 50 | imply SCSI_AHCI |
51 | imply AHCI_PCI | ||||
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 52 | imply E1000 |
53 | imply NVME | ||||
Bin Meng | c5ad889 | 2019-05-15 08:42:58 -0700 | [diff] [blame] | 54 | imply PCI |
Bin Meng | c5ad889 | 2019-05-15 08:42:58 -0700 | [diff] [blame] | 55 | imply PCIE_ECAM_GENERIC |
Heinrich Schuchardt | 6058551 | 2020-11-04 12:49:01 +0100 | [diff] [blame] | 56 | imply SCSI |
57 | imply DM_SCSI | ||||
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 58 | imply SYS_NS16550 |
59 | imply SIFIVE_SERIAL | ||||
Anup Patel | 207f0d3 | 2022-01-27 11:41:08 +0530 | [diff] [blame] | 60 | imply HTIF_CONSOLE if 64BIT |
Bin Meng | dbe74cd | 2020-06-22 22:29:45 -0700 | [diff] [blame] | 61 | imply SYSRESET |
Bin Meng | dbe74cd | 2020-06-22 22:29:45 -0700 | [diff] [blame] | 62 | imply SYSRESET_CMD_POWEROFF |
Heinrich Schuchardt | d50b4ef | 2020-11-04 12:49:00 +0100 | [diff] [blame] | 63 | imply SYSRESET_SYSCON |
64 | imply VIRTIO_MMIO | ||||
65 | imply VIRTIO_PCI | ||||
66 | imply VIRTIO_NET | ||||
67 | imply VIRTIO_BLK | ||||
Bin Meng | 29d7192 | 2021-08-07 13:00:02 +0800 | [diff] [blame] | 68 | imply MTD_NOR_FLASH |
69 | imply CFI_FLASH | ||||
Simon Glass | 94886db | 2021-12-16 20:59:36 -0700 | [diff] [blame] | 70 | imply OF_HAS_PRIOR_STAGE |
Bin Meng | 8a8694d | 2018-09-26 06:55:21 -0700 | [diff] [blame] | 71 | |
72 | endif |