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git01.mediatek.com / filogic / uboot / 040362f0c017ec64c3b18c3d7b4c68c4960f2eda / . / configs / rock960-rk3399_defconfig
blob: ba4226e1735b52f457c2de757a12ba756c33589f [file] [log] [blame]
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
3CONFIG_SYS_TEXT_BASE=0x00200000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]4CONFIG_ENV_OFFSET=0x3F8000
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]5CONFIG_ROCKCHIP_RK3399=y
6CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000
7CONFIG_TARGET_ROCK960_RK3399=y
8CONFIG_DEBUG_UART_BASE=0xFF1A0000
9CONFIG_DEBUG_UART_CLOCK=24000000
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]10CONFIG_DEBUG_UART=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]11CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb"
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]12CONFIG_DISPLAY_BOARDINFO_LATE=y
Kever Yang20673542019-08-20 11:47:02 +0800[diff] [blame]13# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]14CONFIG_SPL_STACK_R=y
Peter Robinsona6bbd202019-11-06 11:43:05 +0000[diff] [blame]15CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
Peter Robinsona6bbd202019-11-06 11:43:05 +0000[diff] [blame]16CONFIG_TPL=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]17CONFIG_SYS_PROMPT="rock960 => "
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]18CONFIG_CMD_BOOTZ=y
19CONFIG_CMD_GPT=y
20CONFIG_CMD_MMC=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]21CONFIG_CMD_USB=y
22# CONFIG_CMD_SETEXPR is not set
23CONFIG_CMD_TIME=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]24CONFIG_CMD_PMIC=y
25CONFIG_CMD_REGULATOR=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]26CONFIG_SPL_OF_CONTROL=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]27CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960"
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]28CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
29CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]30CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]31CONFIG_ROCKCHIP_GPIO=y
32CONFIG_SYS_I2C_ROCKCHIP=y
33CONFIG_MMC_DW=y
34CONFIG_MMC_DW_ROCKCHIP=y
35CONFIG_MMC_SDHCI=y
Peter Robinsonc9099d02019-07-01 17:05:52 +0100[diff] [blame]36CONFIG_MMC_SDHCI_SDMA=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]37CONFIG_MMC_SDHCI_ROCKCHIP=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]38CONFIG_DM_ETH=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]39CONFIG_PMIC_RK8XX=y
40CONFIG_REGULATOR_PWM=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]41CONFIG_REGULATOR_RK8XX=y
42CONFIG_PWM_ROCKCHIP=y
Tom Rini929ea652019-01-07 17:46:19 -0500[diff] [blame]43CONFIG_BAUDRATE=1500000
44CONFIG_DEBUG_UART_SHIFT=2
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]45CONFIG_SYSRESET=y
46CONFIG_USB=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]47CONFIG_USB_XHCI_HCD=y
48CONFIG_USB_XHCI_DWC3=y
49# CONFIG_USB_XHCI_ROCKCHIP is not set
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]50CONFIG_USB_EHCI_HCD=y
51CONFIG_USB_EHCI_GENERIC=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]52CONFIG_USB_DWC3=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]53CONFIG_ROCKCHIP_USB2_PHY=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]54CONFIG_USB_GADGET=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]55CONFIG_USB_HOST_ETHER=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]56CONFIG_USB_ETHER_ASIX=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]57CONFIG_USB_ETHER_ASIX88179=y
Peter Robinson070d0492019-07-01 17:05:53 +0100[diff] [blame]58CONFIG_USB_ETHER_MCS7830=y
59CONFIG_USB_ETHER_RTL8152=y
60CONFIG_USB_ETHER_SMSC95XX=y
Peter Robinsona6bbd202019-11-06 11:43:05 +0000[diff] [blame]61CONFIG_SPL_TINY_MEMSET=y
Manivannan Sadhasivamc9673952018-09-28 00:33:00 +0530[diff] [blame]62CONFIG_ERRNO_STR=y