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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha1b51c932016-02-11 15:47:20 -08002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha096be332017-04-10 15:02:54 -07008#include <dm.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Patrice Chotardd8c77552019-02-22 15:04:44 +010011#include <miiphy.h>
12#include <phy_interface.h>
Vikas Manocha096be332017-04-10 15:02:54 -070013#include <ram.h>
Simon Glass36736182019-11-14 12:57:24 -070014#include <serial.h>
Vikas Manocha50218ae2017-05-28 12:55:10 -070015#include <spl.h>
yannick fertre030af822018-03-02 15:59:28 +010016#include <splash.h>
17#include <st_logo_data.h>
18#include <video.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060019#include <asm/global_data.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080020#include <asm/io.h>
21#include <asm/armv7m.h>
22#include <asm/arch/stm32.h>
Michael Kurz812962b2017-01-22 16:04:27 +010023#include <asm/arch/syscfg.h>
Vikas Manocha9c7573e2017-04-10 15:03:00 -070024#include <asm/gpio.h>
Simon Glassdbd79542020-05-10 11:40:11 -060025#include <linux/delay.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080026
27DECLARE_GLOBAL_DATA_PTR;
28
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090029int dram_init(void)
30{
Patrice Chotard842463a2022-04-27 13:53:57 +020031#ifndef CONFIG_SPL_BUILD
Patrice Chotardb75feec2018-08-03 13:09:55 +020032 int rv;
Vikas Manocha50218ae2017-05-28 12:55:10 -070033 struct udevice *dev;
Vikas Manocha096be332017-04-10 15:02:54 -070034 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
35 if (rv) {
36 debug("DRAM init failed: %d\n", rv);
37 return rv;
38 }
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070039
Vikas Manocha50218ae2017-05-28 12:55:10 -070040#endif
Patrice Chotardb75feec2018-08-03 13:09:55 +020041 return fdtdec_setup_mem_size_base();
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070042}
43
44int dram_init_banksize(void)
45{
Patrice Chotardb75feec2018-08-03 13:09:55 +020046 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090047}
48
Vikas Manocha50218ae2017-05-28 12:55:10 -070049#ifdef CONFIG_SPL_BUILD
Vikas Manochab785bb42017-05-28 12:55:13 -070050#ifdef CONFIG_SPL_OS_BOOT
51int spl_start_uboot(void)
52{
53 debug("SPL: booting kernel\n");
54 /* break into full u-boot on 'c' */
55 return serial_tstc() && serial_getc() == 'c';
56}
57#endif
58
Vikas Manocha50218ae2017-05-28 12:55:10 -070059int spl_dram_init(void)
60{
61 struct udevice *dev;
62 int rv;
63 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
64 if (rv)
65 debug("DRAM init failed: %d\n", rv);
66 return rv;
67}
68void spl_board_init(void)
69{
Vikas Manocha50218ae2017-05-28 12:55:10 -070070 preloader_console_init();
Giulio Benetti09d018f2021-04-04 20:21:35 +020071 spl_dram_init();
Vikas Manocha50218ae2017-05-28 12:55:10 -070072 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
73}
74u32 spl_boot_device(void)
75{
Vikas Manochaf0e32c02017-05-28 12:55:14 -070076 return BOOT_DEVICE_XIP;
Vikas Manocha50218ae2017-05-28 12:55:10 -070077}
Vikas Manocha50218ae2017-05-28 12:55:10 -070078#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080079
Vikas Manocha9c7573e2017-04-10 15:03:00 -070080int board_late_init(void)
81{
82 struct gpio_desc gpio = {};
83 int node;
84
85 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
86 if (node < 0)
87 return -1;
88
Simon Glass1d9af1f2017-05-30 21:47:09 -060089 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha9c7573e2017-04-10 15:03:00 -070090 GPIOD_IS_OUT);
91
92 if (dm_gpio_is_valid(&gpio)) {
93 dm_gpio_set_value(&gpio, 0);
94 mdelay(10);
95 dm_gpio_set_value(&gpio, 1);
96 }
97
98 /* read button 1*/
99 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
100 if (node < 0)
101 return -1;
102
Simon Glass1d9af1f2017-05-30 21:47:09 -0600103 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
104 &gpio, GPIOD_IS_IN);
Vikas Manocha9c7573e2017-04-10 15:03:00 -0700105
106 if (dm_gpio_is_valid(&gpio)) {
107 if (dm_gpio_get_value(&gpio))
108 puts("usr button is at HIGH LEVEL\n");
109 else
110 puts("usr button is at LOW LEVEL\n");
111 }
112
113 return 0;
114}
115
Vikas Manocha1b51c932016-02-11 15:47:20 -0800116int board_init(void)
117{
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100118#ifdef CONFIG_ETH_DESIGNWARE
Marek Behúnbc194772022-04-07 00:33:01 +0200119 ofnode node;
Patrice Chotardd8c77552019-02-22 15:04:44 +0100120
Marek Behúnbc194772022-04-07 00:33:01 +0200121 node = ofnode_by_compatible(ofnode_null(), "st,stm32-dwmac");
122 if (!ofnode_valid(node))
Patrice Chotardd8c77552019-02-22 15:04:44 +0100123 return -1;
124
Marek Behúnbc194772022-04-07 00:33:01 +0200125 switch (ofnode_read_phy_mode(node)) {
Patrice Chotardd8c77552019-02-22 15:04:44 +0100126 case PHY_INTERFACE_MODE_RMII:
127 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
128 break;
129 case PHY_INTERFACE_MODE_MII:
130 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
131 break;
132 default:
Marek Behúnbc194772022-04-07 00:33:01 +0200133 printf("Unsupported PHY interface!\n");
Patrice Chotardd8c77552019-02-22 15:04:44 +0100134 }
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100135#endif
136
yannick fertre030af822018-03-02 15:59:28 +0100137#if defined(CONFIG_CMD_BMP)
138 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
139 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
140#endif /* CONFIG_CMD_BMP */
141
Vikas Manocha1b51c932016-02-11 15:47:20 -0800142 return 0;
143}