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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manocha1b51c932016-02-11 15:47:20 -08002/*
Patrice Chotard789ee0e2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manocha1b51c932016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha096be332017-04-10 15:02:54 -07008#include <dm.h>
Simon Glassa7b51302019-11-14 12:57:46 -07009#include <init.h>
yannick fertre030af822018-03-02 15:59:28 +010010#include <lcd.h>
Simon Glass0f2af882020-05-10 11:40:05 -060011#include <log.h>
Patrice Chotardd8c77552019-02-22 15:04:44 +010012#include <miiphy.h>
13#include <phy_interface.h>
Vikas Manocha096be332017-04-10 15:02:54 -070014#include <ram.h>
Simon Glass36736182019-11-14 12:57:24 -070015#include <serial.h>
Vikas Manocha50218ae2017-05-28 12:55:10 -070016#include <spl.h>
yannick fertre030af822018-03-02 15:59:28 +010017#include <splash.h>
18#include <st_logo_data.h>
19#include <video.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060020#include <asm/global_data.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080021#include <asm/io.h>
22#include <asm/armv7m.h>
23#include <asm/arch/stm32.h>
Michael Kurz812962b2017-01-22 16:04:27 +010024#include <asm/arch/syscfg.h>
Vikas Manocha9c7573e2017-04-10 15:03:00 -070025#include <asm/gpio.h>
Simon Glassdbd79542020-05-10 11:40:11 -060026#include <linux/delay.h>
Vikas Manocha1b51c932016-02-11 15:47:20 -080027
28DECLARE_GLOBAL_DATA_PTR;
29
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090030int dram_init(void)
31{
Patrice Chotard842463a2022-04-27 13:53:57 +020032#ifndef CONFIG_SPL_BUILD
Patrice Chotardb75feec2018-08-03 13:09:55 +020033 int rv;
Vikas Manocha50218ae2017-05-28 12:55:10 -070034 struct udevice *dev;
Vikas Manocha096be332017-04-10 15:02:54 -070035 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
36 if (rv) {
37 debug("DRAM init failed: %d\n", rv);
38 return rv;
39 }
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070040
Vikas Manocha50218ae2017-05-28 12:55:10 -070041#endif
Patrice Chotardb75feec2018-08-03 13:09:55 +020042 return fdtdec_setup_mem_size_base();
Vikas Manochab6fd9eb2017-04-10 15:03:01 -070043}
44
45int dram_init_banksize(void)
46{
Patrice Chotardb75feec2018-08-03 13:09:55 +020047 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA18bd7632016-07-08 01:02:25 +090048}
49
Vikas Manocha50218ae2017-05-28 12:55:10 -070050#ifdef CONFIG_SPL_BUILD
Vikas Manochab785bb42017-05-28 12:55:13 -070051#ifdef CONFIG_SPL_OS_BOOT
52int spl_start_uboot(void)
53{
54 debug("SPL: booting kernel\n");
55 /* break into full u-boot on 'c' */
56 return serial_tstc() && serial_getc() == 'c';
57}
58#endif
59
Vikas Manocha50218ae2017-05-28 12:55:10 -070060int spl_dram_init(void)
61{
62 struct udevice *dev;
63 int rv;
64 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
65 if (rv)
66 debug("DRAM init failed: %d\n", rv);
67 return rv;
68}
69void spl_board_init(void)
70{
Vikas Manocha50218ae2017-05-28 12:55:10 -070071 preloader_console_init();
Giulio Benetti09d018f2021-04-04 20:21:35 +020072 spl_dram_init();
Vikas Manocha50218ae2017-05-28 12:55:10 -070073 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
74}
75u32 spl_boot_device(void)
76{
Vikas Manochaf0e32c02017-05-28 12:55:14 -070077 return BOOT_DEVICE_XIP;
Vikas Manocha50218ae2017-05-28 12:55:10 -070078}
Vikas Manocha50218ae2017-05-28 12:55:10 -070079#endif
Vikas Manocha1b51c932016-02-11 15:47:20 -080080
Vikas Manocha9c7573e2017-04-10 15:03:00 -070081int board_late_init(void)
82{
83 struct gpio_desc gpio = {};
84 int node;
85
86 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
87 if (node < 0)
88 return -1;
89
Simon Glass1d9af1f2017-05-30 21:47:09 -060090 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha9c7573e2017-04-10 15:03:00 -070091 GPIOD_IS_OUT);
92
93 if (dm_gpio_is_valid(&gpio)) {
94 dm_gpio_set_value(&gpio, 0);
95 mdelay(10);
96 dm_gpio_set_value(&gpio, 1);
97 }
98
99 /* read button 1*/
100 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
101 if (node < 0)
102 return -1;
103
Simon Glass1d9af1f2017-05-30 21:47:09 -0600104 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
105 &gpio, GPIOD_IS_IN);
Vikas Manocha9c7573e2017-04-10 15:03:00 -0700106
107 if (dm_gpio_is_valid(&gpio)) {
108 if (dm_gpio_get_value(&gpio))
109 puts("usr button is at HIGH LEVEL\n");
110 else
111 puts("usr button is at LOW LEVEL\n");
112 }
113
114 return 0;
115}
116
Vikas Manocha1b51c932016-02-11 15:47:20 -0800117int board_init(void)
118{
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100119#ifdef CONFIG_ETH_DESIGNWARE
Marek Behúnbc194772022-04-07 00:33:01 +0200120 ofnode node;
Patrice Chotardd8c77552019-02-22 15:04:44 +0100121
Marek Behúnbc194772022-04-07 00:33:01 +0200122 node = ofnode_by_compatible(ofnode_null(), "st,stm32-dwmac");
123 if (!ofnode_valid(node))
Patrice Chotardd8c77552019-02-22 15:04:44 +0100124 return -1;
125
Marek Behúnbc194772022-04-07 00:33:01 +0200126 switch (ofnode_read_phy_mode(node)) {
Patrice Chotardd8c77552019-02-22 15:04:44 +0100127 case PHY_INTERFACE_MODE_RMII:
128 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
129 break;
130 case PHY_INTERFACE_MODE_MII:
131 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
132 break;
133 default:
Marek Behúnbc194772022-04-07 00:33:01 +0200134 printf("Unsupported PHY interface!\n");
Patrice Chotardd8c77552019-02-22 15:04:44 +0100135 }
Patrice Chotarde2d564e2018-01-18 14:10:05 +0100136#endif
137
yannick fertre030af822018-03-02 15:59:28 +0100138#if defined(CONFIG_CMD_BMP)
139 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
140 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
141#endif /* CONFIG_CMD_BMP */
142
Vikas Manocha1b51c932016-02-11 15:47:20 -0800143 return 0;
144}