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Patrick Delaunay50599142018-07-09 15:17:19 +02001// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
Patrick Delaunay06020d82018-03-12 10:46:17 +01002/*
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
4 * Author: Ludovic Barre <ludovic.barre@st.com> for STMicroelectronics.
5 */
Patrick Delaunay06020d82018-03-12 10:46:17 +01006/dts-v1/;
7
Patrick Delaunay48c5e902020-03-06 17:54:41 +01008#include "stm32mp157.dtsi"
9#include "stm32mp15xc.dtsi"
10#include "stm32mp15-pinctrl.dtsi"
11#include "stm32mp15xxaa-pinctrl.dtsi"
Patrick Delaunay06020d82018-03-12 10:46:17 +010012#include <dt-bindings/gpio/gpio.h>
Patrick Delaunay91be5942019-02-04 11:26:16 +010013#include <dt-bindings/mfd/st,stpmic1.h>
Patrick Delaunay06020d82018-03-12 10:46:17 +010014
15/ {
Patrick Delaunay50599142018-07-09 15:17:19 +020016 model = "STMicroelectronics STM32MP157C eval daughter";
Patrick Delaunay06020d82018-03-12 10:46:17 +010017 compatible = "st,stm32mp157c-ed1", "st,stm32mp157";
18
Patrick Delaunay4597d262023-07-10 10:38:45 +020019 aliases {
20 serial0 = &uart4;
21 };
22
Patrick Delaunay06020d82018-03-12 10:46:17 +010023 chosen {
Patrice Chotard00442d02019-02-12 16:50:38 +010024 stdout-path = "serial0:115200n8";
Patrick Delaunay06020d82018-03-12 10:46:17 +010025 };
26
Patrick Delaunay50599142018-07-09 15:17:19 +020027 memory@c0000000 {
Patrick Delaunaya3705302019-07-11 11:15:28 +020028 device_type = "memory";
Patrick Delaunay06020d82018-03-12 10:46:17 +010029 reg = <0xC0000000 0x40000000>;
30 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +020031
Patrick Delaunay708cae72019-07-30 19:16:12 +020032 reserved-memory {
33 #address-cells = <1>;
34 #size-cells = <1>;
35 ranges;
36
Patrick Delaunay8c6e6132019-11-06 16:16:33 +010037 mcuram2: mcuram2@10000000 {
38 compatible = "shared-dma-pool";
39 reg = <0x10000000 0x40000>;
40 no-map;
41 };
42
43 vdev0vring0: vdev0vring0@10040000 {
44 compatible = "shared-dma-pool";
45 reg = <0x10040000 0x1000>;
46 no-map;
47 };
48
49 vdev0vring1: vdev0vring1@10041000 {
50 compatible = "shared-dma-pool";
51 reg = <0x10041000 0x1000>;
52 no-map;
53 };
54
55 vdev0buffer: vdev0buffer@10042000 {
56 compatible = "shared-dma-pool";
57 reg = <0x10042000 0x4000>;
58 no-map;
59 };
60
61 mcuram: mcuram@30000000 {
62 compatible = "shared-dma-pool";
63 reg = <0x30000000 0x40000>;
64 no-map;
65 };
66
67 retram: retram@38000000 {
68 compatible = "shared-dma-pool";
69 reg = <0x38000000 0x10000>;
70 no-map;
71 };
Patrick Delaunay708cae72019-07-30 19:16:12 +020072 };
73
Patrice Chotardf6ef2292018-04-26 17:13:11 +020074 sd_switch: regulator-sd_switch {
75 compatible = "regulator-gpio";
76 regulator-name = "sd_switch";
77 regulator-min-microvolt = <1800000>;
78 regulator-max-microvolt = <2900000>;
79 regulator-type = "voltage";
80 regulator-always-on;
81
82 gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>;
83 gpios-states = <0>;
Patrick Delaunayb9c16b72020-01-28 10:11:00 +010084 states = <1800000 0x1>,
85 <2900000 0x0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +020086 };
Patrick Delaunay6d397052021-01-11 12:33:36 +010087
88 vin: vin {
89 compatible = "regulator-fixed";
90 regulator-name = "vin";
91 regulator-min-microvolt = <5000000>;
92 regulator-max-microvolt = <5000000>;
93 regulator-always-on;
94 };
Patrick Delaunay06020d82018-03-12 10:46:17 +010095};
96
Patrick Delaunay48c5e902020-03-06 17:54:41 +010097&adc {
98 /* ANA0, ANA1 are dedicated pins and don't need pinctrl: only in6. */
99 pinctrl-0 = <&adc1_in6_pins_a>;
100 pinctrl-names = "default";
101 vdd-supply = <&vdd>;
102 vdda-supply = <&vdda>;
103 vref-supply = <&vdda>;
104 status = "disabled";
105 adc1: adc@0 {
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100106 status = "okay";
Patrice Chotard02d88c02023-09-26 17:09:18 +0200107 channel@0 {
108 reg = <0>;
109 /* 16.5 ck_cycles sampling time */
110 st,min-sample-time-ns = <400>;
111 };
112 channel@1 {
113 reg = <1>;
114 st,min-sample-time-ns = <400>;
115 };
116 channel@6 {
117 reg = <6>;
118 st,min-sample-time-ns = <400>;
119 };
Patrick Delaunay48c5e902020-03-06 17:54:41 +0100120 };
121};
122
Patrick Delaunay6d397052021-01-11 12:33:36 +0100123&crc1 {
124 status = "okay";
125};
126
127&cryp1 {
128 status = "okay";
129};
130
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100131&dac {
132 pinctrl-names = "default";
133 pinctrl-0 = <&dac_ch1_pins_a &dac_ch2_pins_a>;
134 vref-supply = <&vdda>;
135 status = "disabled";
136 dac1: dac@1 {
137 status = "okay";
138 };
139 dac2: dac@2 {
140 status = "okay";
141 };
142};
143
Patrick Delaunaya3705302019-07-11 11:15:28 +0200144&dts {
Patrick Delaunay06020d82018-03-12 10:46:17 +0100145 status = "okay";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100146};
147
Patrick Delaunay6d397052021-01-11 12:33:36 +0100148&hash1 {
149 status = "okay";
150};
151
Patrick Delaunay06020d82018-03-12 10:46:17 +0100152&i2c4 {
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200153 pinctrl-names = "default", "sleep";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100154 pinctrl-0 = <&i2c4_pins_a>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200155 pinctrl-1 = <&i2c4_sleep_pins_a>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100156 i2c-scl-rising-time-ns = <185>;
157 i2c-scl-falling-time-ns = <20>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200158 clock-frequency = <400000>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100159 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200160 /* spare dmas for other usage */
161 /delete-property/dmas;
162 /delete-property/dma-names;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100163
Patrick Delaunaya3705302019-07-11 11:15:28 +0200164 pmic: stpmic@33 {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100165 compatible = "st,stpmic1";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100166 reg = <0x33>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200167 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100168 interrupt-controller;
169 #interrupt-cells = <2>;
170 status = "okay";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200171
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200172 regulators {
Patrick Delaunayd79218f2019-02-04 11:26:17 +0100173 compatible = "st,stpmic1-regulators";
Patrick Delaunay6d397052021-01-11 12:33:36 +0100174 buck1-supply = <&vin>;
175 buck2-supply = <&vin>;
176 buck3-supply = <&vin>;
177 buck4-supply = <&vin>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200178 ldo1-supply = <&v3v3>;
179 ldo2-supply = <&v3v3>;
180 ldo3-supply = <&vdd_ddr>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100181 ldo4-supply = <&vin>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200182 ldo5-supply = <&v3v3>;
183 ldo6-supply = <&v3v3>;
Patrick Delaunay6d397052021-01-11 12:33:36 +0100184 vref_ddr-supply = <&vin>;
185 boost-supply = <&vin>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200186 pwr_sw1-supply = <&bst_out>;
187 pwr_sw2-supply = <&bst_out>;
188
189 vddcore: buck1 {
190 regulator-name = "vddcore";
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100191 regulator-min-microvolt = <1200000>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200192 regulator-max-microvolt = <1350000>;
193 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200194 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200195 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200196 };
197
198 vdd_ddr: buck2 {
199 regulator-name = "vdd_ddr";
200 regulator-min-microvolt = <1350000>;
201 regulator-max-microvolt = <1350000>;
202 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200203 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200204 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200205 };
206
207 vdd: buck3 {
208 regulator-name = "vdd";
209 regulator-min-microvolt = <3300000>;
210 regulator-max-microvolt = <3300000>;
211 regulator-always-on;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200212 st,mask-reset;
213 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200214 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200215 };
216
217 v3v3: buck4 {
218 regulator-name = "v3v3";
219 regulator-min-microvolt = <3300000>;
220 regulator-max-microvolt = <3300000>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200221 regulator-always-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200222 regulator-over-current-protection;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200223 regulator-initial-mode = <0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200224 };
225
226 vdda: ldo1 {
227 regulator-name = "vdda";
228 regulator-min-microvolt = <2900000>;
229 regulator-max-microvolt = <2900000>;
230 interrupts = <IT_CURLIM_LDO1 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200231 };
232
233 v2v8: ldo2 {
234 regulator-name = "v2v8";
235 regulator-min-microvolt = <2800000>;
236 regulator-max-microvolt = <2800000>;
237 interrupts = <IT_CURLIM_LDO2 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200238 };
239
240 vtt_ddr: ldo3 {
241 regulator-name = "vtt_ddr";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200242 regulator-min-microvolt = <500000>;
243 regulator-max-microvolt = <750000>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200244 regulator-always-on;
245 regulator-over-current-protection;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200246 };
247
248 vdd_usb: ldo4 {
249 regulator-name = "vdd_usb";
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200250 interrupts = <IT_CURLIM_LDO4 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200251 };
252
253 vdd_sd: ldo5 {
254 regulator-name = "vdd_sd";
255 regulator-min-microvolt = <2900000>;
256 regulator-max-microvolt = <2900000>;
257 interrupts = <IT_CURLIM_LDO5 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200258 regulator-boot-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200259 };
260
261 v1v8: ldo6 {
262 regulator-name = "v1v8";
263 regulator-min-microvolt = <1800000>;
264 regulator-max-microvolt = <1800000>;
265 interrupts = <IT_CURLIM_LDO6 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200266 };
267
268 vref_ddr: vref_ddr {
269 regulator-name = "vref_ddr";
270 regulator-always-on;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200271 };
272
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100273 bst_out: boost {
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200274 regulator-name = "bst_out";
275 interrupts = <IT_OCP_BOOST 0>;
Patrick Delaunayc5c90692019-11-06 16:16:32 +0100276 };
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200277
278 vbus_otg: pwr_sw1 {
279 regulator-name = "vbus_otg";
280 interrupts = <IT_OCP_OTG 0>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200281 };
282
283 vbus_sw: pwr_sw2 {
284 regulator-name = "vbus_sw";
285 interrupts = <IT_OCP_SWOUT 0>;
Patrick Delaunayb9c16b72020-01-28 10:11:00 +0100286 regulator-active-discharge = <1>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200287 };
288 };
Patrick Delaunaya3705302019-07-11 11:15:28 +0200289
290 onkey {
291 compatible = "st,stpmic1-onkey";
292 interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
293 interrupt-names = "onkey-falling", "onkey-rising";
294 power-off-time-sec = <10>;
295 status = "okay";
296 };
297
298 watchdog {
299 compatible = "st,stpmic1-wdt";
300 status = "disabled";
301 };
Patrick Delaunay06020d82018-03-12 10:46:17 +0100302 };
303};
304
Fabien Dessennec2a97d32019-05-14 11:20:37 +0200305&ipcc {
306 status = "okay";
307};
308
Patrice Chotard00442d02019-02-12 16:50:38 +0100309&iwdg2 {
310 timeout-sec = <32>;
311 status = "okay";
312};
313
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200314&m4_rproc {
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100315 memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
316 <&vdev0vring1>, <&vdev0buffer>;
Patrick Delaunayc4c5c5f2021-10-21 11:54:11 +0200317 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
318 mbox-names = "vq0", "vq1", "shutdown", "detach";
Patrick Delaunay8c6e6132019-11-06 16:16:33 +0100319 interrupt-parent = <&exti>;
320 interrupts = <68 1>;
Patrick Delaunay26c24b42019-08-02 15:07:18 +0200321 status = "okay";
322};
323
Patrick Delaunay900494d2020-01-28 10:10:59 +0100324&pwr_regulators {
325 vdd-supply = <&vdd>;
326 vdd_3v3_usbfs-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200327};
328
Patrice Chotard00442d02019-02-12 16:50:38 +0100329&rng1 {
330 status = "okay";
331};
332
333&rtc {
334 status = "okay";
335};
336
Patrick Delaunay06020d82018-03-12 10:46:17 +0100337&sdmmc1 {
Patrick Delaunaya3705302019-07-11 11:15:28 +0200338 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100339 pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_a>;
Patrick Delaunaya3705302019-07-11 11:15:28 +0200340 pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_a>;
341 pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_a>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200342 cd-gpios = <&gpiog 1 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
343 disable-wp;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100344 st,sig-dir;
345 st,neg-edge;
346 st,use-ckin;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100347 bus-width = <4>;
Patrice Chotardf6ef2292018-04-26 17:13:11 +0200348 vmmc-supply = <&vdd_sd>;
349 vqmmc-supply = <&sd_switch>;
Patrick Delaunaycdc2ca12020-07-06 13:26:53 +0200350 sd-uhs-sdr12;
351 sd-uhs-sdr25;
352 sd-uhs-sdr50;
353 sd-uhs-ddr50;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100354 status = "okay";
355};
356
Patrick Delaunay8d050102018-03-20 10:54:52 +0100357&sdmmc2 {
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100358 pinctrl-names = "default", "opendrain", "sleep";
Patrick Delaunay8d050102018-03-20 10:54:52 +0100359 pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100360 pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a>;
361 pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100362 non-removable;
363 no-sd;
364 no-sdio;
Patrice Chotard882d72e2019-02-12 17:17:58 +0100365 st,neg-edge;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100366 bus-width = <8>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200367 vmmc-supply = <&v3v3>;
Patrick Delaunaydf0d20a2020-04-30 15:52:46 +0200368 vqmmc-supply = <&vdd>;
Patrick Delaunay2b0bbf52019-11-06 16:16:34 +0100369 mmc-ddr-3_3v;
Patrick Delaunay8d050102018-03-20 10:54:52 +0100370 status = "okay";
371};
372
Patrice Chotard00442d02019-02-12 16:50:38 +0100373&timers6 {
374 status = "okay";
Patrick Delaunaya3705302019-07-11 11:15:28 +0200375 /* spare dmas for other usage */
376 /delete-property/dmas;
377 /delete-property/dma-names;
Patrice Chotard00442d02019-02-12 16:50:38 +0100378 timer@5 {
379 status = "okay";
380 };
381};
382
Patrick Delaunay06020d82018-03-12 10:46:17 +0100383&uart4 {
Patrick Delaunay551efca2020-09-16 10:01:32 +0200384 pinctrl-names = "default", "sleep", "idle";
Patrick Delaunay06020d82018-03-12 10:46:17 +0100385 pinctrl-0 = <&uart4_pins_a>;
Patrick Delaunay551efca2020-09-16 10:01:32 +0200386 pinctrl-1 = <&uart4_sleep_pins_a>;
387 pinctrl-2 = <&uart4_idle_pins_a>;
Patrick Delaunay6f182192022-04-26 15:38:05 +0200388 /delete-property/dmas;
389 /delete-property/dma-names;
Patrick Delaunay06020d82018-03-12 10:46:17 +0100390 status = "okay";
391};
Patrick Delaunay50599142018-07-09 15:17:19 +0200392
Patrick Delaunaya3705302019-07-11 11:15:28 +0200393&usbotg_hs {
394 vbus-supply = <&vbus_otg>;
395};
396
Patrick Delaunay50599142018-07-09 15:17:19 +0200397&usbphyc_port0 {
398 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200399};
400
401&usbphyc_port1 {
402 phy-supply = <&vdd_usb>;
Patrick Delaunay50599142018-07-09 15:17:19 +0200403};