| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2009 |
| 4 | * Marvell Semiconductor <www.marvell.com> |
| 5 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 6 | * |
| 7 | * Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC. |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #ifndef _ASM_ARCH_KW88F6281_H |
| 11 | #define _ASM_ARCH_KW88F6281_H |
| 12 | |
| Simon Guinot | 1bcdeff | 2011-05-03 21:17:34 +0530 | [diff] [blame] | 13 | /* SOC specific definitions */ |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 14 | #define KW88F6281_REGS_PHYS_BASE 0xf1000000 |
| 15 | #define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE |
| 16 | |
| Simon Guinot | 1bcdeff | 2011-05-03 21:17:34 +0530 | [diff] [blame] | 17 | /* TCLK Core Clock definition */ |
| Tom Rini | 253b6a2 | 2022-12-04 10:13:42 -0500 | [diff] [blame] | 18 | #define CFG_SYS_TCLK ((readl(CFG_SAR_REG) & BIT(21)) ? \ |
| Pali Rohár | e370d02 | 2022-08-17 21:37:49 +0200 | [diff] [blame] | 19 | 166666667 : 200000000) |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 20 | |
| 21 | #endif /* _ASM_ARCH_KW88F6281_H */ |