| commit | b06e8fa5bd9a067dd44214c565942059db0e1617 | [log] [tgz] |
|---|---|---|
| author | Svyatoslav Ryhel <clamor95@gmail.com> | Thu Nov 16 09:35:26 2023 +0200 |
| committer | Svyatoslav Ryhel <clamor95@gmail.com> | Tue Dec 19 21:24:11 2023 +0200 |
| tree | 6c488a4a1c1c446416334e3786c6857c9e4a239c | |
| parent | 6af975cc8f02102d66b002b7c65eea3df6605a79 [diff] |
ARM: tegra114: clock: implement PLLD2 support PLLD2 is a simple clock (controlled by 2 registers) and appears starting from T30. Primary use of PLLD2 is as main HDMI clock parent. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>