blob: 47606ede9d6d009426311cc2937ead288d131725 [file] [log] [blame]
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30-asus-transformer.dtsi"
/ {
model = "ASUS Transformer Infinity TF700T";
compatible = "asus,tf700t", "nvidia,tegra30";
host1x@50000000 {
dc@54200000 {
clocks = <&tegra_car TEGRA30_CLK_DISP1>,
<&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
rgb {
status = "okay";
/delete-property/ nvidia,panel;
port {
dpi_output: endpoint {
remote-endpoint = <&bridge_input>;
bus-width = <24>;
};
};
};
};
};
pinmux@70000868 {
state_default: pinmux {
lcd_pwr2_pc6 {
nvidia,pins = "lcd_pwr2_pc6",
"lcd_dc1_pd2";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pbb3 {
nvidia,pins = "pbb3";
nvidia,function = "vgp3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
spi2_mosi_px0 {
nvidia,pins = "spi2_mosi_px0";
nvidia,function = "spi2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
pbb7 {
nvidia,pins = "pbb7";
nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
kb_row7_pr7 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
gmi_cs4_n_pk2 {
nvidia,pins = "gmi_cs4_n_pk2";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
tc358768_refclk: clock-tc358768 {
compatible = "fixed-clock";
clock-frequency = <23100000>;
clock-accuracy = <100>;
#clock-cells = <0>;
};
tc358768_osc: clock-tc358768-osc-gate {
compatible = "gpio-gate-clock";
enable-gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>;
clocks = <&tc358768_refclk>;
#clock-cells = <0>;
};
i2c-mux {
compatible = "i2c-mux-gpio";
mux-gpios = <&gpio TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>;
i2c-parent = <&gen1_i2c>;
idle-state = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
tc358768: dsi@7 {
compatible = "toshiba,tc358768";
reg = <0x7>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tc358768_osc>;
clock-names = "refclk";
reset-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
vddc-supply = <&vdd_1v2_mipi>;
vddio-supply = <&vdd_1v8_vio>;
vddmipi-supply = <&vdd_1v2_mipi>;
/*
* Panasonic VVX10F004B00 or HYDIS HV101WU1-1E1
* LCD SuperIPS+ Full HD panel.
*/
panel@1 {
compatible = "panasonic,vvx10f004b00";
reg = <1>;
power-supply = <&vdd_pnl_reg>;
backlight = <&backlight>;
display-timings {
timing@0 {
/* 1920x1200@60Hz */
clock-frequency = <154000000>;
hactive = <1920>;
hfront-porch = <48>;
hback-porch = <80>;
hsync-len = <32>;
hsync-active = <1>;
vactive = <1200>;
vfront-porch = <3>;
vback-porch = <26>;
vsync-len = <6>;
vsync-active = <1>;
};
};
port {
panel_input: endpoint {
remote-endpoint = <&bridge_output>;
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_input: endpoint {
remote-endpoint = <&dpi_output>;
bus-width = <24>;
};
};
port@1 {
reg = <1>;
bridge_output: endpoint {
remote-endpoint = <&panel_input>;
};
};
};
};
};
};
/delete-node/ panel;
vdd_1v2_mipi: regulator-mipi {
compatible = "regulator-fixed";
regulator-name = "tc358768_1v2_vdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-enable-ramp-delay = <10000>;
regulator-boot-on;
gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};