| // SPDX-License-Identifier: GPL-2.0-only |
| /* |
| * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ |
| */ |
| |
| /dts-v1/; |
| |
| #include "k3-am69-sk.dts" |
| #include "k3-j784s4-ddr-evm-lp4-4266.dtsi" |
| #include "k3-j784s4-ddr.dtsi" |
| #include "k3-am69-sk-u-boot.dtsi" |
| |
| / { |
| chosen { |
| tick-timer = &mcu_timer0; |
| }; |
| |
| aliases { |
| remoteproc0 = &sysctrler; |
| remoteproc1 = &a72_0; |
| }; |
| |
| a72_0: a72@0 { |
| compatible = "ti,am654-rproc"; |
| reg = <0x0 0x00a90000 0x0 0x10>; |
| power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>, |
| <&k3_pds 202 TI_SCI_PD_EXCLUSIVE>; |
| resets = <&k3_reset 202 0>; |
| clocks = <&k3_clks 61 0>; |
| assigned-clocks = <&k3_clks 61 0>, <&k3_clks 202 0>; |
| assigned-clock-parents = <&k3_clks 61 2>; |
| assigned-clock-rates = <200000000>, <2000000000>; |
| ti,sci = <&sms>; |
| ti,sci-proc-id = <32>; |
| ti,sci-host-id = <10>; |
| bootph-pre-ram; |
| }; |
| |
| dm_tifs: dm-tifs { |
| compatible = "ti,j721e-dm-sci"; |
| ti,host-id = <3>; |
| ti,secure-host; |
| mbox-names = "rx", "tx"; |
| mboxes= <&secure_proxy_mcu 21>, <&secure_proxy_mcu 23>; |
| bootph-pre-ram; |
| }; |
| }; |
| |
| &mcu_timer0 { |
| status = "okay"; |
| clock-frequency = <250000000>; |
| bootph-pre-ram; |
| }; |
| |
| &secure_proxy_sa3 { |
| status = "okay"; |
| bootph-pre-ram; |
| }; |
| |
| &secure_proxy_mcu { |
| status = "okay"; |
| bootph-pre-ram; |
| }; |
| |
| &cbass_mcu_wakeup { |
| sysctrler: sysctrler { |
| compatible = "ti,am654-system-controller"; |
| mboxes= <&secure_proxy_mcu 4>, |
| <&secure_proxy_mcu 5>, |
| <&secure_proxy_sa3 5>; |
| mbox-names = "tx", "rx", "boot_notify"; |
| bootph-pre-ram; |
| }; |
| }; |
| |
| &sms { |
| mboxes= <&secure_proxy_mcu 8>, <&secure_proxy_mcu 6>, <&secure_proxy_mcu 5>; |
| mbox-names = "tx", "rx", "notify"; |
| ti,host-id = <4>; |
| ti,secure-host; |
| bootph-pre-ram; |
| }; |
| |
| /* WKUP UART0 is used for DM firmware logs */ |
| &wkup_uart0 { |
| bootph-pre-ram; |
| status = "okay"; |
| }; |
| |
| &ospi0 { |
| reg = <0x0 0x47040000 0x0 0x100>, |
| <0x0 0x50000000 0x0 0x8000000>; |
| }; |
| |
| &ospi1 { |
| reg = <0x0 0x47050000 0x0 0x100>, |
| <0x0 0x58000000 0x0 0x8000000>; |
| }; |
| |
| &fss { |
| /* enable ranges missing from the FSS node */ |
| ranges = <0x0 0x47000000 0x0 0x47000000 0x0 0x00068400>, |
| <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>; |
| }; |
| |
| &mcu_ringacc { |
| ti,sci = <&dm_tifs>; |
| }; |
| |
| &mcu_udmap { |
| ti,sci = <&dm_tifs>; |
| }; |