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git01.mediatek.com
/
filogic
/
uboot
/
084d88f3889a6dd8de0506a9ad66db34325486f7
/
.
/
arch
/
arm
/
mach-socfpga
/
include
/
mach
tree: d192e35ffd8eaaf39ef1ba7354edf9dc8b03a4ca [
path history
]
[
tgz
]
base_addr_a10.h
base_addr_ac5.h
base_addr_soc64.h
boot0.h
clock_manager.h
clock_manager_agilex.h
clock_manager_agilex5.h
clock_manager_arria10.h
clock_manager_gen5.h
clock_manager_n5x.h
clock_manager_s10.h
clock_manager_soc64.h
firewall.h
fpga_manager.h
fpga_manager_arria10.h
fpga_manager_gen5.h
freeze_controller.h
gpio.h
handoff_soc64.h
mailbox_s10.h
misc.h
nic301.h
pinmux.h
reset_manager.h
reset_manager_arria10.h
reset_manager_gen5.h
reset_manager_soc64.h
scan_manager.h
scu.h
sdram.h
sdram_arria10.h
sdram_gen5.h
secure_reg_helper.h
secure_vab.h
smc_api.h
system_manager.h
system_manager_arria10.h
system_manager_gen5.h
system_manager_soc64.h
timer.h