Gitiles
Code Review Sign In
git01.mediatek.com / filogic / rdk-b / meta-filogic / 617abbdc84135e6594119bf98869f7dded53b6be / . / recipes-wifi / linux-mac80211 / files / patches-6.x / subsys / 0006-sync-backports-patches-rt2x00.patch
blob: 39975b3bf3076098b1f51d932595dad8880ea429 [file] [log] [blame]
developer617abbd2024-04-23 14:50:01 +0800[diff] [blame^]1From a08aa9e789ade7bb35eb442afa6566368d5a318f Mon Sep 17 00:00:00 2001
2From: Shayne Chen <shayne.chen@mediatek.com>
3Date: Tue, 12 Mar 2024 11:27:40 +0800
4Subject: [PATCH 06/61] sync backports patches/rt2x00
5
6---
7 drivers/net/wireless/ralink/rt2x00/Kconfig | 23 +-
8 drivers/net/wireless/ralink/rt2x00/Makefile | 1 +
9 drivers/net/wireless/ralink/rt2x00/rt2800.h | 5 +
10 .../net/wireless/ralink/rt2x00/rt2800lib.c | 373 +++++++++++-------
11 .../net/wireless/ralink/rt2x00/rt2800lib.h | 24 ++
12 .../net/wireless/ralink/rt2x00/rt2800pci.c | 7 +
13 .../net/wireless/ralink/rt2x00/rt2800soc.c | 52 ++-
14 .../net/wireless/ralink/rt2x00/rt2800usb.c | 7 +
15 drivers/net/wireless/ralink/rt2x00/rt2x00.h | 15 +
16 .../net/wireless/ralink/rt2x00/rt2x00dev.c | 34 +-
17 .../net/wireless/ralink/rt2x00/rt2x00eeprom.c | 208 ++++++++++
18 .../net/wireless/ralink/rt2x00/rt2x00leds.c | 3 +
19 .../net/wireless/ralink/rt2x00/rt2x00soc.c | 16 +
20 .../net/wireless/ralink/rt2x00/rt2x00soc.h | 9 +
21 include/linux/rt2x00_platform.h | 23 ++
22 local-symbols | 1 +
23 16 files changed, 635 insertions(+), 166 deletions(-)
24 create mode 100644 drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
25 create mode 100644 include/linux/rt2x00_platform.h
26
27diff --git a/drivers/net/wireless/ralink/rt2x00/Kconfig b/drivers/net/wireless/ralink/rt2x00/Kconfig
28index 8f6e3d2..abaa51b 100644
29--- a/drivers/net/wireless/ralink/rt2x00/Kconfig
30+++ b/drivers/net/wireless/ralink/rt2x00/Kconfig
31@@ -70,6 +70,7 @@ config RT2800PCI
32 select RT2X00_LIB_MMIO
33 select RT2X00_LIB_PCI
34 select RT2X00_LIB_FIRMWARE
35+ select RT2X00_LIB_EEPROM
36 select RT2X00_LIB_CRYPTO
37 depends on CRC_CCITT
38 depends on EEPROM_93CX6
39@@ -211,13 +212,15 @@ endif
40 config RT2800SOC
41 tristate "Ralink WiSoC support"
42 depends on m
43- depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
44+ depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
45 select RT2X00_LIB_SOC
46 select RT2X00_LIB_MMIO
47 select RT2X00_LIB_CRYPTO
48 select RT2X00_LIB_FIRMWARE
49+ select RT2X00_LIB_EEPROM
50 select RT2800_LIB
51 select RT2800_LIB_MMIO
52+ select MTD if SOC_RT288X || SOC_RT305X
53 help
54 This adds support for Ralink WiSoC devices.
55 Supported chips: RT2880, RT3050, RT3052, RT3350, RT3352.
56@@ -226,36 +229,37 @@ config RT2800SOC
57
58
59 config RT2800_LIB
60- tristate
61+ tristate "RT2800 USB/PCI support"
62 depends on m
63
64 config RT2800_LIB_MMIO
65- tristate
66+ tristate "RT2800 MMIO support"
67 depends on m
68 select RT2X00_LIB_MMIO
69 select RT2800_LIB
70
71 config RT2X00_LIB_MMIO
72- tristate
73+ tristate "RT2x00 MMIO support"
74 depends on m
75
76 config RT2X00_LIB_PCI
77- tristate
78+ tristate "RT2x00 PCI support"
79 depends on m
80 select RT2X00_LIB
81
82 config RT2X00_LIB_SOC
83- tristate
84+ tristate "RT2x00 SoC support"
85+ depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620
86 depends on m
87 select RT2X00_LIB
88
89 config RT2X00_LIB_USB
90- tristate
91+ tristate "RT2x00 USB support"
92 depends on m
93 select RT2X00_LIB
94
95 config RT2X00_LIB
96- tristate
97+ tristate "RT2x00 support"
98 depends on m
99
100 config RT2X00_LIB_FIRMWARE
101@@ -265,6 +269,9 @@ config RT2X00_LIB_FIRMWARE
102 config RT2X00_LIB_CRYPTO
103 bool
104
105+config RT2X00_LIB_EEPROM
106+ bool
107+
108 config RT2X00_LIB_LEDS
109 bool
110 default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n)
111diff --git a/drivers/net/wireless/ralink/rt2x00/Makefile b/drivers/net/wireless/ralink/rt2x00/Makefile
112index 4a2156b..94335ec 100644
113--- a/drivers/net/wireless/ralink/rt2x00/Makefile
114+++ b/drivers/net/wireless/ralink/rt2x00/Makefile
115@@ -8,6 +8,7 @@ rt2x00lib-$(CPTCFG_RT2X00_LIB_DEBUGFS) += rt2x00debug.o
116 rt2x00lib-$(CPTCFG_RT2X00_LIB_CRYPTO) += rt2x00crypto.o
117 rt2x00lib-$(CPTCFG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o
118 rt2x00lib-$(CPTCFG_RT2X00_LIB_LEDS) += rt2x00leds.o
119+rt2x00lib-$(CPTCFG_RT2X00_LIB_EEPROM) += rt2x00eeprom.o
120
121 obj-$(CPTCFG_RT2X00_LIB) += rt2x00lib.o
122 obj-$(CPTCFG_RT2X00_LIB_MMIO) += rt2x00mmio.o
123diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800.h b/drivers/net/wireless/ralink/rt2x00/rt2800.h
124index 8930589..cbfa680 100644
125--- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
126+++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
127@@ -1056,6 +1056,11 @@
128 #define MIMO_PS_CFG_RX_STBY_POL FIELD32(0x00000010)
129 #define MIMO_PS_CFG_RX_RX_STBY0 FIELD32(0x00000020)
130
131+#define BB_PA_MODE_CFG0 0x1214
132+#define BB_PA_MODE_CFG1 0x1218
133+#define RF_PA_MODE_CFG0 0x121C
134+#define RF_PA_MODE_CFG1 0x1220
135+
136 /*
137 * EDCA_AC0_CFG:
138 */
139diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
140index d2ab374..7461d2e 100644
141--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
142+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
143@@ -25,6 +25,7 @@
144 #include <linux/kernel.h>
145 #include <linux/module.h>
146 #include <linux/slab.h>
147+#include <linux/of.h>
148
149 #include "rt2x00.h"
150 #include "rt2800lib.h"
151@@ -304,6 +305,24 @@ static void rt2800_rf_write(struct rt2x00_dev *rt2x00dev,
152 mutex_unlock(&rt2x00dev->csr_mutex);
153 }
154
155+void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
156+{
157+ if (!rt2x00dev->pinctrl)
158+ return;
159+
160+ if (enable) {
161+ if (!rt2x00dev->pins_default)
162+ return;
163+
164+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
165+ } else {
166+ if (!rt2x00dev->pins_pa_gpio)
167+ return;
168+
169+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
170+ }
171+}
172+
173 static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
174 [EEPROM_CHIP_ID] = 0x0000,
175 [EEPROM_VERSION] = 0x0001,
176@@ -3817,14 +3836,16 @@ static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev,
177 rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
178 rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
179
180- /* Default: XO=20MHz , SDM mode */
181- rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
182- rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
183- rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
184+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
185+ /* Default: XO=20MHz , SDM mode */
186+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 16);
187+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
188+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
189
190- rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
191- rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
192- rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
193+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 21);
194+ rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
195+ rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
196+ }
197
198 rfcsr = rt2800_rfcsr_read(rt2x00dev, 1);
199 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
200@@ -3858,18 +3879,23 @@ static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev,
201 rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
202 }
203
204- if (conf_is_ht40(conf)) {
205- rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
206- rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
207- } else {
208- rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
209- rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
210+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
211+ if (conf_is_ht40(conf)) {
212+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
213+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
214+ } else {
215+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
216+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
217+ }
218 }
219
220- rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
221- rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
222- conf_is_ht40(conf) && (rf->channel == 11));
223- rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
224+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
225+ rt2800_hw_get_chipeco(rt2x00dev) == 2) {
226+ rfcsr = rt2800_rfcsr_read(rt2x00dev, 28);
227+ rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
228+ conf_is_ht40(conf) && (rf->channel == 11));
229+ rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
230+ }
231
232 if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
233 if (conf_is_ht40(conf)) {
234@@ -3983,25 +4009,29 @@ static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev,
235 if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY)))
236 rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n");
237
238- if (chan->center_freq > 2457) {
239- bbp = rt2800_bbp_read(rt2x00dev, 30);
240- bbp = 0x40;
241- rt2800_bbp_write(rt2x00dev, 30, bbp);
242- rt2800_rfcsr_write(rt2x00dev, 39, 0);
243- if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
244- rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
245- else
246- rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
247- } else {
248- bbp = rt2800_bbp_read(rt2x00dev, 30);
249- bbp = 0x1f;
250- rt2800_bbp_write(rt2x00dev, 30, bbp);
251- rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
252- if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
253- rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
254- else
255- rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
256+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
257+ rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
258+ if (chan->center_freq > 2457) {
259+ bbp = rt2800_bbp_read(rt2x00dev, 30);
260+ bbp = 0x40;
261+ rt2800_bbp_write(rt2x00dev, 30, bbp);
262+ rt2800_rfcsr_write(rt2x00dev, 39, 0);
263+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
264+ rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
265+ else
266+ rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
267+ } else {
268+ bbp = rt2800_bbp_read(rt2x00dev, 30);
269+ bbp = 0x1f;
270+ rt2800_bbp_write(rt2x00dev, 30, bbp);
271+ rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
272+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
273+ rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
274+ else
275+ rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
276+ }
277 }
278+
279 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
280
281 rt2800_vco_calibration(rt2x00dev);
282@@ -4494,7 +4524,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
283 if (rt2x00_rt(rt2x00dev, RT6352)) {
284 /* BBP for GLRT BW */
285 bbp = conf_is_ht40(conf) ?
286- 0x10 : rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
287+ 0x10 : !rt2x00_has_cap_external_lna_bg(rt2x00dev) ?
288+ 0x1a : rt2800_hw_get_chippkg(rt2x00dev) == 1 ?
289 0x15 : 0x1a;
290 rt2800_bbp_glrt_write(rt2x00dev, 141, bbp);
291
292@@ -5998,18 +6029,33 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
293 } else if (rt2x00_rt(rt2x00dev, RT5350)) {
294 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
295 } else if (rt2x00_rt(rt2x00dev, RT6352)) {
296- rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
297- rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
298- rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
299- rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
300- rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
301- rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
302- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
303- rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
304- rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
305- 0x3630363A);
306- rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
307- 0x3630363A);
308+ if (rt2800_hw_get_chipver(rt2x00dev) <= 1) {
309+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3,
310+ 0x00000000);
311+ rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG0,
312+ 0x000055FF);
313+ rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG1,
314+ 0x00550055);
315+ rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG0,
316+ 0x000055FF);
317+ rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG1,
318+ 0x00550055);
319+ } else {
320+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
321+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001);
322+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
323+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000);
324+ rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
325+ rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
326+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
327+ 0x6C6C666C);
328+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
329+ 0x6C6C666C);
330+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
331+ 0x3630363A);
332+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
333+ 0x3630363A);
334+ }
335 reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1);
336 rt2x00_set_field32(&reg, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
337 rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
338@@ -7122,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
339 rt2800_bbp_write(rt2x00dev, 188, 0x00);
340 rt2800_bbp_write(rt2x00dev, 189, 0x00);
341
342- rt2800_bbp_write(rt2x00dev, 91, 0x06);
343- rt2800_bbp_write(rt2x00dev, 92, 0x04);
344- rt2800_bbp_write(rt2x00dev, 93, 0x54);
345- rt2800_bbp_write(rt2x00dev, 99, 0x50);
346- rt2800_bbp_write(rt2x00dev, 148, 0x84);
347- rt2800_bbp_write(rt2x00dev, 167, 0x80);
348- rt2800_bbp_write(rt2x00dev, 178, 0xFF);
349- rt2800_bbp_write(rt2x00dev, 106, 0x13);
350+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
351+ rt2800_bbp_write(rt2x00dev, 91, 0x06);
352+ rt2800_bbp_write(rt2x00dev, 92, 0x04);
353+ rt2800_bbp_write(rt2x00dev, 93, 0x54);
354+ rt2800_bbp_write(rt2x00dev, 99, 0x50);
355+ rt2800_bbp_write(rt2x00dev, 148, 0x84);
356+ rt2800_bbp_write(rt2x00dev, 167, 0x80);
357+ rt2800_bbp_write(rt2x00dev, 178, 0xFF);
358+ rt2800_bbp_write(rt2x00dev, 106, 0x13);
359+ }
360
361 /* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
362 rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
363@@ -10359,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev)
364 rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0);
365 }
366
367+ if (rt2800_hw_get_chippkg(rt2x00dev) != 1)
368+ return;
369+
370 if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
371 rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
372 rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
373@@ -10403,8 +10454,10 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
374 u32 reg;
375
376 if (rt2x00_has_cap_external_pa(rt2x00dev) ||
377- rt2x00_has_cap_external_lna_bg(rt2x00dev))
378+ rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
379+ rt6352_enable_pa_pin(rt2x00dev, 0);
380 rt2800_restore_rf_bbp_rt6352(rt2x00dev);
381+ }
382
383 rt2800_r_calibration(rt2x00dev);
384 rt2800_rf_self_txdc_cal(rt2x00dev);
385@@ -10422,6 +10475,8 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
386 !rt2x00_has_cap_external_lna_bg(rt2x00dev))
387 return;
388
389+ rt6352_enable_pa_pin(rt2x00dev, 1);
390+
391 if (rt2x00_has_cap_external_pa(rt2x00dev)) {
392 reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
393 reg |= 0x00000101;
394@@ -10432,6 +10487,9 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev)
395 rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
396 }
397
398+ if (rt2800_hw_get_chippkg(rt2x00dev) != 1)
399+ return;
400+
401 if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
402 rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
403 rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
404@@ -10522,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
405 rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
406 rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
407
408- rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
409- if (rt2800_clk_is_20mhz(rt2x00dev))
410- rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
411- else
412- rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
413- rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
414- rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
415- rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
416- rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
417- rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
418- rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
419- rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
420- rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
421- rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
422- rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
423- rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
424- rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
425- rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
426- rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
427- rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
428- rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
429+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
430+ rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
431+ if (rt2800_clk_is_20mhz(rt2x00dev))
432+ rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
433+ else
434+ rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
435+ rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
436+ rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
437+ rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
438+ rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
439+ rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
440+ rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
441+ rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
442+ rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
443+ rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
444+ rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
445+ rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
446+ rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
447+ rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
448+ rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
449+ rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
450+ rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
451+ }
452
453- rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
454- rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
455- rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
456+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
457+ rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
458+ rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
459+ rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
460+ rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
461+ }
462
463 /* Initialize RF channel register to default value */
464 rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
465@@ -10612,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
466
467 rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
468
469- rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
470- rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
471- rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
472- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
473- rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
474- rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
475- rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
476- rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
477- rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
478- rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
479- rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
480- rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
481- rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
482- rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
483- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
484- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
485- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
486- rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
487- rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
488- rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
489- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
490- rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
491- rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
492- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
493- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
494- rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
495- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
496- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
497- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
498- rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
499-
500- rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
501- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
502- rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
503- rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
504- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
505- rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
506- rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
507- rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
508- rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
509-
510- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
511- rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
512- rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
513- rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
514- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
515- rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
516-
517- /* Initialize RF channel register for DRQFN */
518- rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
519- rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
520- rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
521- rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
522- rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
523- rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
524- rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
525- rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
526+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
527+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
528+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
529+ rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
530+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
531+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
532+ rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
533+ rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
534+ rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
535+ rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
536+ rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
537+ rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
538+ rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
539+ rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
540+ rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
541+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
542+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
543+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
544+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
545+ rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67);
546+ rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69);
547+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
548+ rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27);
549+ rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20);
550+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
551+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
552+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
553+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
554+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
555+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
556+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
557+ }
558+
559+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
560+ rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
561+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
562+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
563+ rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
564+ rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
565+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
566+ rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
567+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
568+ rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
569+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
570+
571+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
572+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
573+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
574+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
575+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
576+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
577+ }
578+
579+ if (rt2800_hw_get_chippkg(rt2x00dev) == 0 &&
580+ rt2800_hw_get_chipver(rt2x00dev) == 1) {
581+ /* Initialize RF channel register for DRQFN */
582+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
583+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
584+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
585+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
586+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
587+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
588+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
589+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
590+ }
591
592 /* Initialize RF DC calibration register to default value */
593 rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
594@@ -10731,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
595 rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
596 rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
597
598- rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
599- rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
600- rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
601+ if (rt2800_hw_get_chipver(rt2x00dev) > 1) {
602+ rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
603+ rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
604+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
605+ }
606
607- rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
608- rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
609+ if (rt2800_hw_get_chipver(rt2x00dev) > 1 &&
610+ rt2800_hw_get_chipeco(rt2x00dev) >= 2) {
611+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
612+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
613+ }
614
615 /* Do calibration and init PA/LNA */
616 rt2800_calibration_rt6352(rt2x00dev);
617@@ -11282,6 +11358,17 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
618 rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
619 rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
620
621+ {
622+ struct device_node *np = rt2x00dev->dev->of_node;
623+ unsigned int led_polarity;
624+
625+ /* Allow overriding polarity from OF */
626+ if (!of_property_read_u32(np, "ralink,led-polarity",
627+ &led_polarity))
628+ rt2x00_set_field16(&eeprom, EEPROM_FREQ_LED_POLARITY,
629+ led_polarity);
630+ }
631+
632 rt2x00dev->led_mcu_reg = eeprom;
633 #endif /* CPTCFG_RT2X00_LIB_LEDS */
634
635diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
636index 194de67..a18140c 100644
637--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
638+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h
639@@ -76,6 +76,9 @@ struct rt2800_ops {
640 int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev);
641 __le32 *(*drv_get_txwi)(struct queue_entry *entry);
642 unsigned int (*drv_get_dma_done)(struct data_queue *queue);
643+ int (*hw_get_chippkg)(void);
644+ int (*hw_get_chipver)(void);
645+ int (*hw_get_chipeco)(void);
646 };
647
648 static inline u32 rt2800_register_read(struct rt2x00_dev *rt2x00dev,
649@@ -184,6 +187,27 @@ static inline unsigned int rt2800_drv_get_dma_done(struct data_queue *queue)
650 return rt2800ops->drv_get_dma_done(queue);
651 }
652
653+static inline int rt2800_hw_get_chippkg(struct rt2x00_dev *rt2x00dev)
654+{
655+ const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
656+
657+ return rt2800ops->hw_get_chippkg();
658+}
659+
660+static inline int rt2800_hw_get_chipver(struct rt2x00_dev *rt2x00dev)
661+{
662+ const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
663+
664+ return rt2800ops->hw_get_chipver();
665+}
666+
667+static inline int rt2800_hw_get_chipeco(struct rt2x00_dev *rt2x00dev)
668+{
669+ const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv;
670+
671+ return rt2800ops->hw_get_chipeco();
672+}
673+
674 void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
675 const u8 command, const u8 token,
676 const u8 arg0, const u8 arg1);
677diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
678index c891043..b041952 100644
679--- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
680+++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c
681@@ -286,6 +286,10 @@ static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
682 return retval;
683 }
684
685+static int rt2800pci_get_chippkg(void) { return 0; }
686+static int rt2800pci_get_chipver(void) { return 0; }
687+static int rt2800pci_get_chipeco(void) { return 0; }
688+
689 static const struct ieee80211_ops rt2800pci_mac80211_ops = {
690 .add_chanctx = ieee80211_emulate_add_chanctx,
691 .remove_chanctx = ieee80211_emulate_remove_chanctx,
692@@ -333,6 +337,9 @@ static const struct rt2800_ops rt2800pci_rt2800_ops = {
693 .drv_init_registers = rt2800mmio_init_registers,
694 .drv_get_txwi = rt2800mmio_get_txwi,
695 .drv_get_dma_done = rt2800mmio_get_dma_done,
696+ .hw_get_chippkg = rt2800pci_get_chippkg,
697+ .hw_get_chipver = rt2800pci_get_chipver,
698+ .hw_get_chipeco = rt2800pci_get_chipeco,
699 };
700
701 static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
702diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
703index 787dbf0..e0d7893 100644
704--- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
705+++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c
706@@ -27,6 +27,12 @@
707 #include "rt2800lib.h"
708 #include "rt2800mmio.h"
709
710+/* Needed to probe CHIP_VER register on MT7620 */
711+#ifdef CONFIG_SOC_MT7620
712+#include <asm/mach-ralink/ralink_regs.h>
713+#include <asm/mach-ralink/mt7620.h>
714+#endif
715+
716 /* Allow hardware encryption to be disabled. */
717 static bool modparam_nohwcrypt;
718 module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444);
719@@ -90,19 +96,6 @@ static int rt2800soc_set_device_state(struct rt2x00_dev *rt2x00dev,
720 return retval;
721 }
722
723-static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev)
724-{
725- void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
726-
727- if (!base_addr)
728- return -ENOMEM;
729-
730- memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
731-
732- iounmap(base_addr);
733- return 0;
734-}
735-
736 /* Firmware functions */
737 static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
738 {
739@@ -131,6 +124,27 @@ static int rt2800soc_write_firmware(struct rt2x00_dev *rt2x00dev,
740 return 0;
741 }
742
743+#ifdef CONFIG_SOC_MT7620
744+static int rt2800soc_get_chippkg(void)
745+{
746+ return mt7620_get_pkg();
747+}
748+
749+static int rt2800soc_get_chipver(void)
750+{
751+ return mt7620_get_chipver();
752+}
753+
754+static int rt2800soc_get_chipeco(void)
755+{
756+ return mt7620_get_eco();
757+}
758+#else
759+static int rt2800soc_get_chippkg(void) { return 0; }
760+static int rt2800soc_get_chipver(void) { return 0; }
761+static int rt2800soc_get_chipeco(void) { return 0; }
762+#endif
763+
764 static const struct ieee80211_ops rt2800soc_mac80211_ops = {
765 .add_chanctx = ieee80211_emulate_add_chanctx,
766 .remove_chanctx = ieee80211_emulate_remove_chanctx,
767@@ -172,12 +186,15 @@ static const struct rt2800_ops rt2800soc_rt2800_ops = {
768 .register_multiread = rt2x00mmio_register_multiread,
769 .register_multiwrite = rt2x00mmio_register_multiwrite,
770 .regbusy_read = rt2x00mmio_regbusy_read,
771- .read_eeprom = rt2800soc_read_eeprom,
772+ .read_eeprom = rt2x00lib_read_eeprom,
773 .hwcrypt_disabled = rt2800soc_hwcrypt_disabled,
774 .drv_write_firmware = rt2800soc_write_firmware,
775 .drv_init_registers = rt2800mmio_init_registers,
776 .drv_get_txwi = rt2800mmio_get_txwi,
777 .drv_get_dma_done = rt2800mmio_get_dma_done,
778+ .hw_get_chippkg = rt2800soc_get_chippkg,
779+ .hw_get_chipver = rt2800soc_get_chipver,
780+ .hw_get_chipeco = rt2800soc_get_chipeco,
781 };
782
783 static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = {
784@@ -243,10 +260,17 @@ static int rt2800soc_probe(struct platform_device *pdev)
785 return rt2x00soc_probe(pdev, &rt2800soc_ops);
786 }
787
788+static const struct of_device_id rt2880_wmac_match[] = {
789+ { .compatible = "ralink,rt2880-wmac" },
790+ {},
791+};
792+MODULE_DEVICE_TABLE(of, rt2880_wmac_match);
793+
794 static struct platform_driver rt2800soc_driver = {
795 .driver = {
796 .name = "rt2800_wmac",
797 .mod_name = KBUILD_MODNAME,
798+ .of_match_table = rt2880_wmac_match,
799 },
800 .probe = rt2800soc_probe,
801 .remove = rt2x00soc_remove,
802diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
803index a37f8ea..2663447 100644
804--- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
805+++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c
806@@ -628,6 +628,10 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
807 return 0;
808 }
809
810+static int rt2800usb_get_chippkg(void) { return 0; }
811+static int rt2800usb_get_chipver(void) { return 0; }
812+static int rt2800usb_get_chipeco(void) { return 0; }
813+
814 static const struct ieee80211_ops rt2800usb_mac80211_ops = {
815 .add_chanctx = ieee80211_emulate_add_chanctx,
816 .remove_chanctx = ieee80211_emulate_remove_chanctx,
817@@ -676,6 +680,9 @@ static const struct rt2800_ops rt2800usb_rt2800_ops = {
818 .drv_init_registers = rt2800usb_init_registers,
819 .drv_get_txwi = rt2800usb_get_txwi,
820 .drv_get_dma_done = rt2800usb_get_dma_done,
821+ .hw_get_chippkg = rt2800usb_get_chippkg,
822+ .hw_get_chipver = rt2800usb_get_chipver,
823+ .hw_get_chipeco = rt2800usb_get_chipeco,
824 };
825
826 static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
827diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00.h b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
828index 0ac4ae9..27d283b 100644
829--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
830+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
831@@ -28,6 +28,8 @@
832 #include <linux/average.h>
833 #include <linux/usb.h>
834 #include <linux/clk.h>
835+#include <linux/pinctrl/consumer.h>
836+#include <linux/rt2x00_platform.h>
837
838 #include <net/mac80211.h>
839
840@@ -407,6 +409,7 @@ struct hw_mode_spec {
841 unsigned int supported_bands;
842 #define SUPPORT_BAND_2GHZ 0x00000001
843 #define SUPPORT_BAND_5GHZ 0x00000002
844+#define SUPPORT_BAND_BOTH (SUPPORT_BAND_2GHZ | SUPPORT_BAND_5GHZ)
845
846 unsigned int supported_rates;
847 #define SUPPORT_RATE_CCK 0x00000001
848@@ -702,6 +705,7 @@ enum rt2x00_capability_flags {
849 REQUIRE_HT_TX_DESC,
850 REQUIRE_PS_AUTOWAKE,
851 REQUIRE_DELAYED_RFKILL,
852+ REQUIRE_EEPROM_FILE,
853
854 /*
855 * Capabilities
856@@ -1024,6 +1028,11 @@ struct rt2x00_dev {
857
858 /* Clock for System On Chip devices. */
859 struct clk *clk;
860+
861+ /* pinctrl and states for System On Chip devices with PA/LNA. */
862+ struct pinctrl *pinctrl;
863+ struct pinctrl_state *pins_default;
864+ struct pinctrl_state *pins_pa_gpio;
865 };
866
867 struct rt2x00_bar_list_entry {
868@@ -1271,6 +1280,12 @@ rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
869 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
870 }
871
872+static inline bool
873+rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev)
874+{
875+ return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0);
876+}
877+
878 static inline bool
879 rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
880 {
881diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
882index 274524e..69f8d5a 100644
883--- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
884+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c
885@@ -990,6 +990,12 @@ static void rt2x00lib_rate(struct ieee80211_rate *entry,
886
887 void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr)
888 {
889+ struct rt2x00_platform_data *pdata;
890+
891+ pdata = rt2x00dev->dev->platform_data;
892+ if (pdata && pdata->mac_address)
893+ ether_addr_copy(eeprom_mac_addr, pdata->mac_address);
894+
895 of_get_mac_address(rt2x00dev->dev->of_node, eeprom_mac_addr);
896
897 if (!is_valid_ether_addr(eeprom_mac_addr)) {
898@@ -1007,6 +1013,32 @@ static int rt2x00lib_probe_hw_modes(struct rt2x00_dev *rt2x00dev,
899 struct ieee80211_rate *rates;
900 unsigned int num_rates;
901 unsigned int i;
902+#ifdef CONFIG_OF
903+ struct device_node *np = rt2x00dev->dev->of_node;
904+ unsigned int enabled;
905+ if (!of_property_read_u32(np, "ralink,2ghz",
906+ &enabled) && !enabled)
907+ spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
908+ if (!of_property_read_u32(np, "ralink,5ghz",
909+ &enabled) && !enabled)
910+ spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
911+#endif /* CONFIG_OF */
912+
913+ if (rt2x00dev->dev->platform_data) {
914+ struct rt2x00_platform_data *pdata;
915+
916+ pdata = rt2x00dev->dev->platform_data;
917+ if (pdata->disable_2ghz)
918+ spec->supported_bands &= ~SUPPORT_BAND_2GHZ;
919+ if (pdata->disable_5ghz)
920+ spec->supported_bands &= ~SUPPORT_BAND_5GHZ;
921+ }
922+
923+ if ((spec->supported_bands & SUPPORT_BAND_BOTH) == 0) {
924+ rt2x00_err(rt2x00dev, "No supported bands\n");
925+ return -EINVAL;
926+ }
927+
928
929 num_rates = 0;
930 if (spec->supported_rates & SUPPORT_RATE_CCK)
931@@ -1330,7 +1362,7 @@ static inline void rt2x00lib_set_if_combinations(struct rt2x00_dev *rt2x00dev)
932 */
933 if_limit = &rt2x00dev->if_limits_ap;
934 if_limit->max = rt2x00dev->ops->max_ap_intf;
935- if_limit->types = BIT(NL80211_IFTYPE_AP);
936+ if_limit->types = BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_STATION);
937 #ifdef CPTCFG_MAC80211_MESH
938 if_limit->types |= BIT(NL80211_IFTYPE_MESH_POINT);
939 #endif
940diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
941new file mode 100644
942index 0000000..15c4e0b
943--- /dev/null
944+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c
945@@ -0,0 +1,208 @@
946+// SPDX-License-Identifier: GPL-2.0-or-later
947+/* Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
948+ * Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
949+ * <http://rt2x00.serialmonkey.com>
950+ */
951+
952+/* Module: rt2x00lib
953+ * Abstract: rt2x00 eeprom file loading routines.
954+ */
955+
956+#include <linux/kernel.h>
957+#include <linux/module.h>
958+#if IS_ENABLED(CONFIG_MTD)
959+#include <linux/mtd/mtd.h>
960+#include <linux/mtd/partitions.h>
961+#endif
962+#include <linux/nvmem-consumer.h>
963+#include <linux/of.h>
964+
965+#include "rt2x00.h"
966+#include "rt2x00soc.h"
967+
968+static void rt2800lib_eeprom_swap(struct rt2x00_dev *rt2x00dev)
969+{
970+ struct device_node *np = rt2x00dev->dev->of_node;
971+ size_t len = rt2x00dev->ops->eeprom_size;
972+ int i;
973+
974+ if (!of_find_property(np, "ralink,eeprom-swap", NULL))
975+ return;
976+
977+ for (i = 0; i < len / sizeof(u16); i++)
978+ rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]);
979+}
980+
981+#if IS_ENABLED(CONFIG_MTD)
982+static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev)
983+{
984+ int ret = -EINVAL;
985+#ifdef CONFIG_OF
986+ struct device_node *np = rt2x00dev->dev->of_node, *mtd_np = NULL;
987+ int size, offset = 0;
988+ struct mtd_info *mtd;
989+ const char *part;
990+ const __be32 *list;
991+ phandle phandle;
992+ size_t retlen;
993+
994+ list = of_get_property(np, "ralink,mtd-eeprom", &size);
995+ if (!list)
996+ return -ENOENT;
997+
998+ phandle = be32_to_cpup(list++);
999+ if (phandle)
1000+ mtd_np = of_find_node_by_phandle(phandle);
1001+ if (!mtd_np) {
1002+ dev_err(rt2x00dev->dev, "failed to load mtd phandle\n");
1003+ return -EINVAL;
1004+ }
1005+
1006+ part = of_get_property(mtd_np, "label", NULL);
1007+ if (!part)
1008+ part = mtd_np->name;
1009+
1010+ mtd = get_mtd_device_nm(part);
1011+ if (IS_ERR(mtd)) {
1012+ dev_err(rt2x00dev->dev, "failed to get mtd device \"%s\"\n", part);
1013+ return PTR_ERR(mtd);
1014+ }
1015+
1016+ if (size > sizeof(*list))
1017+ offset = be32_to_cpup(list);
1018+
1019+ ret = mtd_read(mtd, offset, rt2x00dev->ops->eeprom_size,
1020+ &retlen, (u_char *)rt2x00dev->eeprom);
1021+ put_mtd_device(mtd);
1022+
1023+ if (retlen != rt2x00dev->ops->eeprom_size || ret) {
1024+ dev_err(rt2x00dev->dev, "failed to load eeprom from device \"%s\"\n", part);
1025+ return ret;
1026+ }
1027+
1028+ rt2800lib_eeprom_swap(rt2x00dev);
1029+
1030+ dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part);
1031+#endif
1032+
1033+ return ret;
1034+}
1035+#endif
1036+
1037+static int rt2800lib_read_eeprom_nvmem(struct rt2x00_dev *rt2x00dev)
1038+{
1039+ struct device_node *np = rt2x00dev->dev->of_node;
1040+ unsigned int len = rt2x00dev->ops->eeprom_size;
1041+ struct nvmem_cell *cell;
1042+ const void *data;
1043+ size_t retlen;
1044+ int ret = 0;
1045+
1046+ cell = of_nvmem_cell_get(np, "eeprom");
1047+ if (IS_ERR(cell))
1048+ return PTR_ERR(cell);
1049+
1050+ data = nvmem_cell_read(cell, &retlen);
1051+ nvmem_cell_put(cell);
1052+
1053+ if (IS_ERR(data))
1054+ return PTR_ERR(data);
1055+
1056+ if (retlen != len) {
1057+ dev_err(rt2x00dev->dev, "invalid eeprom size, required: 0x%04x\n", len);
1058+ ret = -EINVAL;
1059+ goto exit;
1060+ }
1061+
1062+ memcpy(rt2x00dev->eeprom, data, len);
1063+
1064+ rt2800lib_eeprom_swap(rt2x00dev);
1065+
1066+exit:
1067+ kfree(data);
1068+ return ret;
1069+}
1070+
1071+static const char *
1072+rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev)
1073+{
1074+ struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data;
1075+#ifdef CONFIG_OF
1076+ struct device_node *np;
1077+ const char *eep;
1078+#endif
1079+
1080+ if (pdata && pdata->eeprom_file_name)
1081+ return pdata->eeprom_file_name;
1082+
1083+#ifdef CONFIG_OF
1084+ np = rt2x00dev->dev->of_node;
1085+ if (np && !of_property_read_string(np, "ralink,eeprom", &eep))
1086+ return eep;
1087+#endif
1088+
1089+ return NULL;
1090+}
1091+
1092+static int rt2x00lib_read_eeprom_file(struct rt2x00_dev *rt2x00dev)
1093+{
1094+ const struct firmware *ee;
1095+ const char *ee_name;
1096+ int retval;
1097+
1098+ ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev);
1099+ if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) {
1100+ rt2x00_err(rt2x00dev, "Required EEPROM name is missing.");
1101+ return -EINVAL;
1102+ }
1103+
1104+ if (!ee_name)
1105+ return 0;
1106+
1107+ rt2x00_info(rt2x00dev, "Loading EEPROM data from '%s'.\n", ee_name);
1108+
1109+ retval = request_firmware(&ee, ee_name, rt2x00dev->dev);
1110+ if (retval) {
1111+ rt2x00_err(rt2x00dev, "Failed to request EEPROM.\n");
1112+ return retval;
1113+ }
1114+
1115+ if (!ee || !ee->size || !ee->data) {
1116+ rt2x00_err(rt2x00dev, "Failed to read EEPROM file.\n");
1117+ retval = -ENOENT;
1118+ goto err_exit;
1119+ }
1120+
1121+ if (ee->size != rt2x00dev->ops->eeprom_size) {
1122+ rt2x00_err(rt2x00dev,
1123+ "EEPROM file size is invalid, it should be %d bytes\n",
1124+ rt2x00dev->ops->eeprom_size);
1125+ retval = -EINVAL;
1126+ goto err_release_ee;
1127+ }
1128+
1129+ memcpy(rt2x00dev->eeprom, ee->data, rt2x00dev->ops->eeprom_size);
1130+
1131+err_release_ee:
1132+ release_firmware(ee);
1133+err_exit:
1134+ return retval;
1135+}
1136+
1137+int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev)
1138+{
1139+ int ret;
1140+
1141+#if IS_ENABLED(CONFIG_MTD)
1142+ ret = rt2800lib_read_eeprom_mtd(rt2x00dev);
1143+ if (!ret)
1144+ return 0;
1145+#endif
1146+
1147+ ret = rt2800lib_read_eeprom_nvmem(rt2x00dev);
1148+ if (!ret)
1149+ return 0;
1150+
1151+ return rt2x00lib_read_eeprom_file(rt2x00dev);
1152+}
1153+EXPORT_SYMBOL_GPL(rt2x00lib_read_eeprom);
1154diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
1155index f5361d5..bad5ce2 100644
1156--- a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
1157+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c
1158@@ -98,6 +98,9 @@ static int rt2x00leds_register_led(struct rt2x00_dev *rt2x00dev,
1159 led->led_dev.name = name;
1160 led->led_dev.brightness = LED_OFF;
1161
1162+ if (rt2x00_is_soc(rt2x00dev))
1163+ led->led_dev.brightness_set(&led->led_dev, LED_OFF);
1164+
1165 retval = led_classdev_register(device, &led->led_dev);
1166 if (retval) {
1167 rt2x00_err(rt2x00dev, "Failed to register led handler\n");
1168diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
1169index eface61..541b718 100644
1170--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
1171+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
1172@@ -86,6 +86,7 @@ int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops)
1173 if (IS_ERR(rt2x00dev->clk))
1174 rt2x00dev->clk = NULL;
1175
1176+ set_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags);
1177 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
1178
1179 retval = rt2x00soc_alloc_reg(rt2x00dev);
1180@@ -96,6 +97,21 @@ int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops)
1181 if (retval)
1182 goto exit_free_reg;
1183
1184+ rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
1185+ if (IS_ERR(rt2x00dev->pinctrl)) {
1186+ rt2x00dev->pinctrl = NULL;
1187+ rt2x00dev->pins_default = NULL;
1188+ rt2x00dev->pins_pa_gpio = NULL;
1189+ } else {
1190+ rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
1191+ if (IS_ERR(rt2x00dev->pins_default))
1192+ rt2x00dev->pins_default = NULL;
1193+
1194+ rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
1195+ if (IS_ERR(rt2x00dev->pins_pa_gpio))
1196+ rt2x00dev->pins_pa_gpio = NULL;
1197+ }
1198+
1199 return 0;
1200
1201 exit_free_reg:
1202diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h
1203index 021fd06..21cd951 100644
1204--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h
1205+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h
1206@@ -26,4 +26,13 @@ int rt2x00soc_resume(struct platform_device *pdev);
1207 #define rt2x00soc_resume NULL
1208 #endif /* CONFIG_PM */
1209
1210+/*
1211+ * EEPROM file handlers.
1212+ */
1213+#ifdef CPTCFG_RT2X00_LIB_EEPROM
1214+int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev);
1215+#else
1216+#define rt2x00lib_read_eeprom NULL
1217+#endif /* CPTCFG_RT2X00_LIB_EEPROM */
1218+
1219 #endif /* RT2X00SOC_H */
1220diff --git a/include/linux/rt2x00_platform.h b/include/linux/rt2x00_platform.h
1221new file mode 100644
1222index 0000000..e10377e
1223--- /dev/null
1224+++ b/include/linux/rt2x00_platform.h
1225@@ -0,0 +1,23 @@
1226+/*
1227+ * Platform data definition for the rt2x00 driver
1228+ *
1229+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
1230+ *
1231+ * This program is free software; you can redistribute it and/or modify it
1232+ * under the terms of the GNU General Public License version 2 as published
1233+ * by the Free Software Foundation.
1234+ *
1235+ */
1236+
1237+#ifndef _RT2X00_PLATFORM_H
1238+#define _RT2X00_PLATFORM_H
1239+
1240+struct rt2x00_platform_data {
1241+ char *eeprom_file_name;
1242+ const u8 *mac_address;
1243+
1244+ int disable_2ghz;
1245+ int disable_5ghz;
1246+};
1247+
1248+#endif /* _RT2X00_PLATFORM_H */
1249diff --git a/local-symbols b/local-symbols
1250index 3d81ba5..beafad9 100644
1251--- a/local-symbols
1252+++ b/local-symbols
1253@@ -331,6 +331,7 @@ RT2X00_LIB_FIRMWARE=
1254 RT2X00_LIB_CRYPTO=
1255 RT2X00_LIB_LEDS=
1256 RT2X00_LIB_DEBUGFS=
1257+RT2X00_LIB_EEPROM=
1258 RT2X00_DEBUG=
1259 WLAN_VENDOR_REALTEK=
1260 RTL8180=
1261--
12622.39.2
1263