| From a08aa9e789ade7bb35eb442afa6566368d5a318f Mon Sep 17 00:00:00 2001 |
| From: Shayne Chen <shayne.chen@mediatek.com> |
| Date: Tue, 12 Mar 2024 11:27:40 +0800 |
| Subject: [PATCH 06/61] sync backports patches/rt2x00 |
| |
| --- |
| drivers/net/wireless/ralink/rt2x00/Kconfig | 23 +- |
| drivers/net/wireless/ralink/rt2x00/Makefile | 1 + |
| drivers/net/wireless/ralink/rt2x00/rt2800.h | 5 + |
| .../net/wireless/ralink/rt2x00/rt2800lib.c | 373 +++++++++++------- |
| .../net/wireless/ralink/rt2x00/rt2800lib.h | 24 ++ |
| .../net/wireless/ralink/rt2x00/rt2800pci.c | 7 + |
| .../net/wireless/ralink/rt2x00/rt2800soc.c | 52 ++- |
| .../net/wireless/ralink/rt2x00/rt2800usb.c | 7 + |
| drivers/net/wireless/ralink/rt2x00/rt2x00.h | 15 + |
| .../net/wireless/ralink/rt2x00/rt2x00dev.c | 34 +- |
| .../net/wireless/ralink/rt2x00/rt2x00eeprom.c | 208 ++++++++++ |
| .../net/wireless/ralink/rt2x00/rt2x00leds.c | 3 + |
| .../net/wireless/ralink/rt2x00/rt2x00soc.c | 16 + |
| .../net/wireless/ralink/rt2x00/rt2x00soc.h | 9 + |
| include/linux/rt2x00_platform.h | 23 ++ |
| local-symbols | 1 + |
| 16 files changed, 635 insertions(+), 166 deletions(-) |
| create mode 100644 drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c |
| create mode 100644 include/linux/rt2x00_platform.h |
| |
| diff --git a/drivers/net/wireless/ralink/rt2x00/Kconfig b/drivers/net/wireless/ralink/rt2x00/Kconfig |
| index 8f6e3d2..abaa51b 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/Kconfig |
| +++ b/drivers/net/wireless/ralink/rt2x00/Kconfig |
| @@ -70,6 +70,7 @@ config RT2800PCI |
| select RT2X00_LIB_MMIO |
| select RT2X00_LIB_PCI |
| select RT2X00_LIB_FIRMWARE |
| + select RT2X00_LIB_EEPROM |
| select RT2X00_LIB_CRYPTO |
| depends on CRC_CCITT |
| depends on EEPROM_93CX6 |
| @@ -211,13 +212,15 @@ endif |
| config RT2800SOC |
| tristate "Ralink WiSoC support" |
| depends on m |
| - depends on SOC_RT288X || SOC_RT305X || SOC_MT7620 |
| + depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620 |
| select RT2X00_LIB_SOC |
| select RT2X00_LIB_MMIO |
| select RT2X00_LIB_CRYPTO |
| select RT2X00_LIB_FIRMWARE |
| + select RT2X00_LIB_EEPROM |
| select RT2800_LIB |
| select RT2800_LIB_MMIO |
| + select MTD if SOC_RT288X || SOC_RT305X |
| help |
| This adds support for Ralink WiSoC devices. |
| Supported chips: RT2880, RT3050, RT3052, RT3350, RT3352. |
| @@ -226,36 +229,37 @@ config RT2800SOC |
| |
| |
| config RT2800_LIB |
| - tristate |
| + tristate "RT2800 USB/PCI support" |
| depends on m |
| |
| config RT2800_LIB_MMIO |
| - tristate |
| + tristate "RT2800 MMIO support" |
| depends on m |
| select RT2X00_LIB_MMIO |
| select RT2800_LIB |
| |
| config RT2X00_LIB_MMIO |
| - tristate |
| + tristate "RT2x00 MMIO support" |
| depends on m |
| |
| config RT2X00_LIB_PCI |
| - tristate |
| + tristate "RT2x00 PCI support" |
| depends on m |
| select RT2X00_LIB |
| |
| config RT2X00_LIB_SOC |
| - tristate |
| + tristate "RT2x00 SoC support" |
| + depends on SOC_RT288X || SOC_RT305X || SOC_RT3883 || SOC_MT7620 |
| depends on m |
| select RT2X00_LIB |
| |
| config RT2X00_LIB_USB |
| - tristate |
| + tristate "RT2x00 USB support" |
| depends on m |
| select RT2X00_LIB |
| |
| config RT2X00_LIB |
| - tristate |
| + tristate "RT2x00 support" |
| depends on m |
| |
| config RT2X00_LIB_FIRMWARE |
| @@ -265,6 +269,9 @@ config RT2X00_LIB_FIRMWARE |
| config RT2X00_LIB_CRYPTO |
| bool |
| |
| +config RT2X00_LIB_EEPROM |
| + bool |
| + |
| config RT2X00_LIB_LEDS |
| bool |
| default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n) |
| diff --git a/drivers/net/wireless/ralink/rt2x00/Makefile b/drivers/net/wireless/ralink/rt2x00/Makefile |
| index 4a2156b..94335ec 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/Makefile |
| +++ b/drivers/net/wireless/ralink/rt2x00/Makefile |
| @@ -8,6 +8,7 @@ rt2x00lib-$(CPTCFG_RT2X00_LIB_DEBUGFS) += rt2x00debug.o |
| rt2x00lib-$(CPTCFG_RT2X00_LIB_CRYPTO) += rt2x00crypto.o |
| rt2x00lib-$(CPTCFG_RT2X00_LIB_FIRMWARE) += rt2x00firmware.o |
| rt2x00lib-$(CPTCFG_RT2X00_LIB_LEDS) += rt2x00leds.o |
| +rt2x00lib-$(CPTCFG_RT2X00_LIB_EEPROM) += rt2x00eeprom.o |
| |
| obj-$(CPTCFG_RT2X00_LIB) += rt2x00lib.o |
| obj-$(CPTCFG_RT2X00_LIB_MMIO) += rt2x00mmio.o |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800.h b/drivers/net/wireless/ralink/rt2x00/rt2800.h |
| index 8930589..cbfa680 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h |
| @@ -1056,6 +1056,11 @@ |
| #define MIMO_PS_CFG_RX_STBY_POL FIELD32(0x00000010) |
| #define MIMO_PS_CFG_RX_RX_STBY0 FIELD32(0x00000020) |
| |
| +#define BB_PA_MODE_CFG0 0x1214 |
| +#define BB_PA_MODE_CFG1 0x1218 |
| +#define RF_PA_MODE_CFG0 0x121C |
| +#define RF_PA_MODE_CFG1 0x1220 |
| + |
| /* |
| * EDCA_AC0_CFG: |
| */ |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c |
| index d2ab374..7461d2e 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c |
| @@ -25,6 +25,7 @@ |
| #include <linux/kernel.h> |
| #include <linux/module.h> |
| #include <linux/slab.h> |
| +#include <linux/of.h> |
| |
| #include "rt2x00.h" |
| #include "rt2800lib.h" |
| @@ -304,6 +305,24 @@ static void rt2800_rf_write(struct rt2x00_dev *rt2x00dev, |
| mutex_unlock(&rt2x00dev->csr_mutex); |
| } |
| |
| +void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable) |
| +{ |
| + if (!rt2x00dev->pinctrl) |
| + return; |
| + |
| + if (enable) { |
| + if (!rt2x00dev->pins_default) |
| + return; |
| + |
| + pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default); |
| + } else { |
| + if (!rt2x00dev->pins_pa_gpio) |
| + return; |
| + |
| + pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio); |
| + } |
| +} |
| + |
| static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = { |
| [EEPROM_CHIP_ID] = 0x0000, |
| [EEPROM_VERSION] = 0x0001, |
| @@ -3817,14 +3836,16 @@ static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev, |
| rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4); |
| rt2800_rfcsr_write(rt2x00dev, 19, rfcsr); |
| |
| - /* Default: XO=20MHz , SDM mode */ |
| - rfcsr = rt2800_rfcsr_read(rt2x00dev, 16); |
| - rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80); |
| - rt2800_rfcsr_write(rt2x00dev, 16, rfcsr); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + /* Default: XO=20MHz , SDM mode */ |
| + rfcsr = rt2800_rfcsr_read(rt2x00dev, 16); |
| + rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80); |
| + rt2800_rfcsr_write(rt2x00dev, 16, rfcsr); |
| |
| - rfcsr = rt2800_rfcsr_read(rt2x00dev, 21); |
| - rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1); |
| - rt2800_rfcsr_write(rt2x00dev, 21, rfcsr); |
| + rfcsr = rt2800_rfcsr_read(rt2x00dev, 21); |
| + rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1); |
| + rt2800_rfcsr_write(rt2x00dev, 21, rfcsr); |
| + } |
| |
| rfcsr = rt2800_rfcsr_read(rt2x00dev, 1); |
| rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620, |
| @@ -3858,18 +3879,23 @@ static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev, |
| rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20); |
| } |
| |
| - if (conf_is_ht40(conf)) { |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08); |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08); |
| - } else { |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28); |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + if (conf_is_ht40(conf)) { |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08); |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08); |
| + } else { |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28); |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28); |
| + } |
| } |
| |
| - rfcsr = rt2800_rfcsr_read(rt2x00dev, 28); |
| - rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40, |
| - conf_is_ht40(conf) && (rf->channel == 11)); |
| - rt2800_rfcsr_write(rt2x00dev, 28, rfcsr); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1 && |
| + rt2800_hw_get_chipeco(rt2x00dev) == 2) { |
| + rfcsr = rt2800_rfcsr_read(rt2x00dev, 28); |
| + rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40, |
| + conf_is_ht40(conf) && (rf->channel == 11)); |
| + rt2800_rfcsr_write(rt2x00dev, 28, rfcsr); |
| + } |
| |
| if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) { |
| if (conf_is_ht40(conf)) { |
| @@ -3983,25 +4009,29 @@ static void rt2800_config_alc_rt6352(struct rt2x00_dev *rt2x00dev, |
| if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev, MAC_STATUS_CFG_BBP_RF_BUSY))) |
| rt2x00_warn(rt2x00dev, "RF busy while configuring ALC\n"); |
| |
| - if (chan->center_freq > 2457) { |
| - bbp = rt2800_bbp_read(rt2x00dev, 30); |
| - bbp = 0x40; |
| - rt2800_bbp_write(rt2x00dev, 30, bbp); |
| - rt2800_rfcsr_write(rt2x00dev, 39, 0); |
| - if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| - rt2800_rfcsr_write(rt2x00dev, 42, 0xfb); |
| - else |
| - rt2800_rfcsr_write(rt2x00dev, 42, 0x7b); |
| - } else { |
| - bbp = rt2800_bbp_read(rt2x00dev, 30); |
| - bbp = 0x1f; |
| - rt2800_bbp_write(rt2x00dev, 30, bbp); |
| - rt2800_rfcsr_write(rt2x00dev, 39, 0x80); |
| - if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| - rt2800_rfcsr_write(rt2x00dev, 42, 0xdb); |
| - else |
| - rt2800_rfcsr_write(rt2x00dev, 42, 0x5b); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1 && |
| + rt2800_hw_get_chipeco(rt2x00dev) >= 2) { |
| + if (chan->center_freq > 2457) { |
| + bbp = rt2800_bbp_read(rt2x00dev, 30); |
| + bbp = 0x40; |
| + rt2800_bbp_write(rt2x00dev, 30, bbp); |
| + rt2800_rfcsr_write(rt2x00dev, 39, 0); |
| + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| + rt2800_rfcsr_write(rt2x00dev, 42, 0xfb); |
| + else |
| + rt2800_rfcsr_write(rt2x00dev, 42, 0x7b); |
| + } else { |
| + bbp = rt2800_bbp_read(rt2x00dev, 30); |
| + bbp = 0x1f; |
| + rt2800_bbp_write(rt2x00dev, 30, bbp); |
| + rt2800_rfcsr_write(rt2x00dev, 39, 0x80); |
| + if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| + rt2800_rfcsr_write(rt2x00dev, 42, 0xdb); |
| + else |
| + rt2800_rfcsr_write(rt2x00dev, 42, 0x5b); |
| + } |
| } |
| + |
| rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl); |
| |
| rt2800_vco_calibration(rt2x00dev); |
| @@ -4494,7 +4524,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, |
| if (rt2x00_rt(rt2x00dev, RT6352)) { |
| /* BBP for GLRT BW */ |
| bbp = conf_is_ht40(conf) ? |
| - 0x10 : rt2x00_has_cap_external_lna_bg(rt2x00dev) ? |
| + 0x10 : !rt2x00_has_cap_external_lna_bg(rt2x00dev) ? |
| + 0x1a : rt2800_hw_get_chippkg(rt2x00dev) == 1 ? |
| 0x15 : 0x1a; |
| rt2800_bbp_glrt_write(rt2x00dev, 141, bbp); |
| |
| @@ -5998,18 +6029,33 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) |
| } else if (rt2x00_rt(rt2x00dev, RT5350)) { |
| rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); |
| } else if (rt2x00_rt(rt2x00dev, RT6352)) { |
| - rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401); |
| - rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001); |
| - rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); |
| - rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000); |
| - rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0); |
| - rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0); |
| - rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C); |
| - rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C); |
| - rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, |
| - 0x3630363A); |
| - rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT, |
| - 0x3630363A); |
| + if (rt2800_hw_get_chipver(rt2x00dev) <= 1) { |
| + rt2800_register_write(rt2x00dev, TX_ALC_VGA3, |
| + 0x00000000); |
| + rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG0, |
| + 0x000055FF); |
| + rt2800_register_write(rt2x00dev, BB_PA_MODE_CFG1, |
| + 0x00550055); |
| + rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG0, |
| + 0x000055FF); |
| + rt2800_register_write(rt2x00dev, RF_PA_MODE_CFG1, |
| + 0x00550055); |
| + } else { |
| + rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401); |
| + rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0001); |
| + rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); |
| + rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x00000000); |
| + rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0); |
| + rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0); |
| + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, |
| + 0x6C6C666C); |
| + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, |
| + 0x6C6C666C); |
| + rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT, |
| + 0x3630363A); |
| + rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT, |
| + 0x3630363A); |
| + } |
| reg = rt2800_register_read(rt2x00dev, TX_ALC_CFG_1); |
| rt2x00_set_field32(®, TX_ALC_CFG_1_ROS_BUSY_EN, 0); |
| rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg); |
| @@ -7122,14 +7168,16 @@ static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev) |
| rt2800_bbp_write(rt2x00dev, 188, 0x00); |
| rt2800_bbp_write(rt2x00dev, 189, 0x00); |
| |
| - rt2800_bbp_write(rt2x00dev, 91, 0x06); |
| - rt2800_bbp_write(rt2x00dev, 92, 0x04); |
| - rt2800_bbp_write(rt2x00dev, 93, 0x54); |
| - rt2800_bbp_write(rt2x00dev, 99, 0x50); |
| - rt2800_bbp_write(rt2x00dev, 148, 0x84); |
| - rt2800_bbp_write(rt2x00dev, 167, 0x80); |
| - rt2800_bbp_write(rt2x00dev, 178, 0xFF); |
| - rt2800_bbp_write(rt2x00dev, 106, 0x13); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + rt2800_bbp_write(rt2x00dev, 91, 0x06); |
| + rt2800_bbp_write(rt2x00dev, 92, 0x04); |
| + rt2800_bbp_write(rt2x00dev, 93, 0x54); |
| + rt2800_bbp_write(rt2x00dev, 99, 0x50); |
| + rt2800_bbp_write(rt2x00dev, 148, 0x84); |
| + rt2800_bbp_write(rt2x00dev, 167, 0x80); |
| + rt2800_bbp_write(rt2x00dev, 178, 0xFF); |
| + rt2800_bbp_write(rt2x00dev, 106, 0x13); |
| + } |
| |
| /* BBP for G band GLRT function (BBP_128 ~ BBP_221) */ |
| rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00); |
| @@ -10359,6 +10407,9 @@ static void rt2800_restore_rf_bbp_rt6352(struct rt2x00_dev *rt2x00dev) |
| rt2800_register_write(rt2x00dev, RF_BYPASS3, 0x0); |
| } |
| |
| + if (rt2800_hw_get_chippkg(rt2x00dev) != 1) |
| + return; |
| + |
| if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { |
| rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16); |
| rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23); |
| @@ -10403,8 +10454,10 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev) |
| u32 reg; |
| |
| if (rt2x00_has_cap_external_pa(rt2x00dev) || |
| - rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| + rt2x00_has_cap_external_lna_bg(rt2x00dev)) { |
| + rt6352_enable_pa_pin(rt2x00dev, 0); |
| rt2800_restore_rf_bbp_rt6352(rt2x00dev); |
| + } |
| |
| rt2800_r_calibration(rt2x00dev); |
| rt2800_rf_self_txdc_cal(rt2x00dev); |
| @@ -10422,6 +10475,8 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev) |
| !rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
| return; |
| |
| + rt6352_enable_pa_pin(rt2x00dev, 1); |
| + |
| if (rt2x00_has_cap_external_pa(rt2x00dev)) { |
| reg = rt2800_register_read(rt2x00dev, RF_CONTROL3); |
| reg |= 0x00000101; |
| @@ -10432,6 +10487,9 @@ static void rt2800_calibration_rt6352(struct rt2x00_dev *rt2x00dev) |
| rt2800_register_write(rt2x00dev, RF_BYPASS3, reg); |
| } |
| |
| + if (rt2800_hw_get_chippkg(rt2x00dev) != 1) |
| + return; |
| + |
| if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { |
| rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66); |
| rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20); |
| @@ -10522,31 +10580,36 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev) |
| rt2800_rfcsr_write(rt2x00dev, 42, 0x5B); |
| rt2800_rfcsr_write(rt2x00dev, 43, 0x00); |
| |
| - rt2800_rfcsr_write(rt2x00dev, 11, 0x21); |
| - if (rt2800_clk_is_20mhz(rt2x00dev)) |
| - rt2800_rfcsr_write(rt2x00dev, 13, 0x03); |
| - else |
| - rt2800_rfcsr_write(rt2x00dev, 13, 0x00); |
| - rt2800_rfcsr_write(rt2x00dev, 14, 0x7C); |
| - rt2800_rfcsr_write(rt2x00dev, 16, 0x80); |
| - rt2800_rfcsr_write(rt2x00dev, 17, 0x99); |
| - rt2800_rfcsr_write(rt2x00dev, 18, 0x99); |
| - rt2800_rfcsr_write(rt2x00dev, 19, 0x09); |
| - rt2800_rfcsr_write(rt2x00dev, 20, 0x50); |
| - rt2800_rfcsr_write(rt2x00dev, 21, 0xB0); |
| - rt2800_rfcsr_write(rt2x00dev, 22, 0x00); |
| - rt2800_rfcsr_write(rt2x00dev, 23, 0x06); |
| - rt2800_rfcsr_write(rt2x00dev, 24, 0x00); |
| - rt2800_rfcsr_write(rt2x00dev, 25, 0x00); |
| - rt2800_rfcsr_write(rt2x00dev, 26, 0x5D); |
| - rt2800_rfcsr_write(rt2x00dev, 27, 0x00); |
| - rt2800_rfcsr_write(rt2x00dev, 28, 0x61); |
| - rt2800_rfcsr_write(rt2x00dev, 29, 0xB5); |
| - rt2800_rfcsr_write(rt2x00dev, 43, 0x02); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + rt2800_rfcsr_write(rt2x00dev, 11, 0x21); |
| + if (rt2800_clk_is_20mhz(rt2x00dev)) |
| + rt2800_rfcsr_write(rt2x00dev, 13, 0x03); |
| + else |
| + rt2800_rfcsr_write(rt2x00dev, 13, 0x00); |
| + rt2800_rfcsr_write(rt2x00dev, 14, 0x7C); |
| + rt2800_rfcsr_write(rt2x00dev, 16, 0x80); |
| + rt2800_rfcsr_write(rt2x00dev, 17, 0x99); |
| + rt2800_rfcsr_write(rt2x00dev, 18, 0x99); |
| + rt2800_rfcsr_write(rt2x00dev, 19, 0x09); |
| + rt2800_rfcsr_write(rt2x00dev, 20, 0x50); |
| + rt2800_rfcsr_write(rt2x00dev, 21, 0xB0); |
| + rt2800_rfcsr_write(rt2x00dev, 22, 0x00); |
| + rt2800_rfcsr_write(rt2x00dev, 23, 0x06); |
| + rt2800_rfcsr_write(rt2x00dev, 24, 0x00); |
| + rt2800_rfcsr_write(rt2x00dev, 25, 0x00); |
| + rt2800_rfcsr_write(rt2x00dev, 26, 0x5D); |
| + rt2800_rfcsr_write(rt2x00dev, 27, 0x00); |
| + rt2800_rfcsr_write(rt2x00dev, 28, 0x61); |
| + rt2800_rfcsr_write(rt2x00dev, 29, 0xB5); |
| + rt2800_rfcsr_write(rt2x00dev, 43, 0x02); |
| + } |
| |
| - rt2800_rfcsr_write(rt2x00dev, 28, 0x62); |
| - rt2800_rfcsr_write(rt2x00dev, 29, 0xAD); |
| - rt2800_rfcsr_write(rt2x00dev, 39, 0x80); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1 && |
| + rt2800_hw_get_chipeco(rt2x00dev) >= 2) { |
| + rt2800_rfcsr_write(rt2x00dev, 28, 0x62); |
| + rt2800_rfcsr_write(rt2x00dev, 29, 0xAD); |
| + rt2800_rfcsr_write(rt2x00dev, 39, 0x80); |
| + } |
| |
| /* Initialize RF channel register to default value */ |
| rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03); |
| @@ -10612,63 +10675,71 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev) |
| |
| rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5); |
| |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); |
| - rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67); |
| - rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF); |
| - rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27); |
| - rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09); |
| - |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16); |
| - |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B); |
| - |
| - /* Initialize RF channel register for DRQFN */ |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02); |
| - rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27); |
| + rt2800_rfcsr_write_bank(rt2x00dev, 4, 47, 0x67); |
| + rt2800_rfcsr_write_bank(rt2x00dev, 6, 47, 0x69); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF); |
| + rt2800_rfcsr_write_bank(rt2x00dev, 4, 54, 0x27); |
| + rt2800_rfcsr_write_bank(rt2x00dev, 6, 54, 0x20); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09); |
| + } |
| + |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1 && |
| + rt2800_hw_get_chipeco(rt2x00dev) >= 2) { |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16); |
| + |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B); |
| + } |
| + |
| + if (rt2800_hw_get_chippkg(rt2x00dev) == 0 && |
| + rt2800_hw_get_chipver(rt2x00dev) == 1) { |
| + /* Initialize RF channel register for DRQFN */ |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02); |
| + rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7); |
| + } |
| |
| /* Initialize RF DC calibration register to default value */ |
| rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47); |
| @@ -10731,12 +10802,17 @@ static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev) |
| rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00); |
| rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00); |
| |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08); |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04); |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1) { |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08); |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04); |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20); |
| + } |
| |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00); |
| - rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C); |
| + if (rt2800_hw_get_chipver(rt2x00dev) > 1 && |
| + rt2800_hw_get_chipeco(rt2x00dev) >= 2) { |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00); |
| + rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C); |
| + } |
| |
| /* Do calibration and init PA/LNA */ |
| rt2800_calibration_rt6352(rt2x00dev); |
| @@ -11282,6 +11358,17 @@ static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) |
| rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC); |
| rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY); |
| |
| + { |
| + struct device_node *np = rt2x00dev->dev->of_node; |
| + unsigned int led_polarity; |
| + |
| + /* Allow overriding polarity from OF */ |
| + if (!of_property_read_u32(np, "ralink,led-polarity", |
| + &led_polarity)) |
| + rt2x00_set_field16(&eeprom, EEPROM_FREQ_LED_POLARITY, |
| + led_polarity); |
| + } |
| + |
| rt2x00dev->led_mcu_reg = eeprom; |
| #endif /* CPTCFG_RT2X00_LIB_LEDS */ |
| |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h |
| index 194de67..a18140c 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.h |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.h |
| @@ -76,6 +76,9 @@ struct rt2800_ops { |
| int (*drv_init_registers)(struct rt2x00_dev *rt2x00dev); |
| __le32 *(*drv_get_txwi)(struct queue_entry *entry); |
| unsigned int (*drv_get_dma_done)(struct data_queue *queue); |
| + int (*hw_get_chippkg)(void); |
| + int (*hw_get_chipver)(void); |
| + int (*hw_get_chipeco)(void); |
| }; |
| |
| static inline u32 rt2800_register_read(struct rt2x00_dev *rt2x00dev, |
| @@ -184,6 +187,27 @@ static inline unsigned int rt2800_drv_get_dma_done(struct data_queue *queue) |
| return rt2800ops->drv_get_dma_done(queue); |
| } |
| |
| +static inline int rt2800_hw_get_chippkg(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv; |
| + |
| + return rt2800ops->hw_get_chippkg(); |
| +} |
| + |
| +static inline int rt2800_hw_get_chipver(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv; |
| + |
| + return rt2800ops->hw_get_chipver(); |
| +} |
| + |
| +static inline int rt2800_hw_get_chipeco(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + const struct rt2800_ops *rt2800ops = rt2x00dev->ops->drv; |
| + |
| + return rt2800ops->hw_get_chipeco(); |
| +} |
| + |
| void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, |
| const u8 command, const u8 token, |
| const u8 arg0, const u8 arg1); |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c |
| index c891043..b041952 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800pci.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800pci.c |
| @@ -286,6 +286,10 @@ static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev) |
| return retval; |
| } |
| |
| +static int rt2800pci_get_chippkg(void) { return 0; } |
| +static int rt2800pci_get_chipver(void) { return 0; } |
| +static int rt2800pci_get_chipeco(void) { return 0; } |
| + |
| static const struct ieee80211_ops rt2800pci_mac80211_ops = { |
| .add_chanctx = ieee80211_emulate_add_chanctx, |
| .remove_chanctx = ieee80211_emulate_remove_chanctx, |
| @@ -333,6 +337,9 @@ static const struct rt2800_ops rt2800pci_rt2800_ops = { |
| .drv_init_registers = rt2800mmio_init_registers, |
| .drv_get_txwi = rt2800mmio_get_txwi, |
| .drv_get_dma_done = rt2800mmio_get_dma_done, |
| + .hw_get_chippkg = rt2800pci_get_chippkg, |
| + .hw_get_chipver = rt2800pci_get_chipver, |
| + .hw_get_chipeco = rt2800pci_get_chipeco, |
| }; |
| |
| static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = { |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c |
| index 787dbf0..e0d7893 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800soc.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800soc.c |
| @@ -27,6 +27,12 @@ |
| #include "rt2800lib.h" |
| #include "rt2800mmio.h" |
| |
| +/* Needed to probe CHIP_VER register on MT7620 */ |
| +#ifdef CONFIG_SOC_MT7620 |
| +#include <asm/mach-ralink/ralink_regs.h> |
| +#include <asm/mach-ralink/mt7620.h> |
| +#endif |
| + |
| /* Allow hardware encryption to be disabled. */ |
| static bool modparam_nohwcrypt; |
| module_param_named(nohwcrypt, modparam_nohwcrypt, bool, 0444); |
| @@ -90,19 +96,6 @@ static int rt2800soc_set_device_state(struct rt2x00_dev *rt2x00dev, |
| return retval; |
| } |
| |
| -static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev) |
| -{ |
| - void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE); |
| - |
| - if (!base_addr) |
| - return -ENOMEM; |
| - |
| - memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE); |
| - |
| - iounmap(base_addr); |
| - return 0; |
| -} |
| - |
| /* Firmware functions */ |
| static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev) |
| { |
| @@ -131,6 +124,27 @@ static int rt2800soc_write_firmware(struct rt2x00_dev *rt2x00dev, |
| return 0; |
| } |
| |
| +#ifdef CONFIG_SOC_MT7620 |
| +static int rt2800soc_get_chippkg(void) |
| +{ |
| + return mt7620_get_pkg(); |
| +} |
| + |
| +static int rt2800soc_get_chipver(void) |
| +{ |
| + return mt7620_get_chipver(); |
| +} |
| + |
| +static int rt2800soc_get_chipeco(void) |
| +{ |
| + return mt7620_get_eco(); |
| +} |
| +#else |
| +static int rt2800soc_get_chippkg(void) { return 0; } |
| +static int rt2800soc_get_chipver(void) { return 0; } |
| +static int rt2800soc_get_chipeco(void) { return 0; } |
| +#endif |
| + |
| static const struct ieee80211_ops rt2800soc_mac80211_ops = { |
| .add_chanctx = ieee80211_emulate_add_chanctx, |
| .remove_chanctx = ieee80211_emulate_remove_chanctx, |
| @@ -172,12 +186,15 @@ static const struct rt2800_ops rt2800soc_rt2800_ops = { |
| .register_multiread = rt2x00mmio_register_multiread, |
| .register_multiwrite = rt2x00mmio_register_multiwrite, |
| .regbusy_read = rt2x00mmio_regbusy_read, |
| - .read_eeprom = rt2800soc_read_eeprom, |
| + .read_eeprom = rt2x00lib_read_eeprom, |
| .hwcrypt_disabled = rt2800soc_hwcrypt_disabled, |
| .drv_write_firmware = rt2800soc_write_firmware, |
| .drv_init_registers = rt2800mmio_init_registers, |
| .drv_get_txwi = rt2800mmio_get_txwi, |
| .drv_get_dma_done = rt2800mmio_get_dma_done, |
| + .hw_get_chippkg = rt2800soc_get_chippkg, |
| + .hw_get_chipver = rt2800soc_get_chipver, |
| + .hw_get_chipeco = rt2800soc_get_chipeco, |
| }; |
| |
| static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = { |
| @@ -243,10 +260,17 @@ static int rt2800soc_probe(struct platform_device *pdev) |
| return rt2x00soc_probe(pdev, &rt2800soc_ops); |
| } |
| |
| +static const struct of_device_id rt2880_wmac_match[] = { |
| + { .compatible = "ralink,rt2880-wmac" }, |
| + {}, |
| +}; |
| +MODULE_DEVICE_TABLE(of, rt2880_wmac_match); |
| + |
| static struct platform_driver rt2800soc_driver = { |
| .driver = { |
| .name = "rt2800_wmac", |
| .mod_name = KBUILD_MODNAME, |
| + .of_match_table = rt2880_wmac_match, |
| }, |
| .probe = rt2800soc_probe, |
| .remove = rt2x00soc_remove, |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c |
| index a37f8ea..2663447 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2800usb.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2800usb.c |
| @@ -628,6 +628,10 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev) |
| return 0; |
| } |
| |
| +static int rt2800usb_get_chippkg(void) { return 0; } |
| +static int rt2800usb_get_chipver(void) { return 0; } |
| +static int rt2800usb_get_chipeco(void) { return 0; } |
| + |
| static const struct ieee80211_ops rt2800usb_mac80211_ops = { |
| .add_chanctx = ieee80211_emulate_add_chanctx, |
| .remove_chanctx = ieee80211_emulate_remove_chanctx, |
| @@ -676,6 +680,9 @@ static const struct rt2800_ops rt2800usb_rt2800_ops = { |
| .drv_init_registers = rt2800usb_init_registers, |
| .drv_get_txwi = rt2800usb_get_txwi, |
| .drv_get_dma_done = rt2800usb_get_dma_done, |
| + .hw_get_chippkg = rt2800usb_get_chippkg, |
| + .hw_get_chipver = rt2800usb_get_chipver, |
| + .hw_get_chipeco = rt2800usb_get_chipeco, |
| }; |
| |
| static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = { |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00.h b/drivers/net/wireless/ralink/rt2x00/rt2x00.h |
| index 0ac4ae9..27d283b 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h |
| @@ -28,6 +28,8 @@ |
| #include <linux/average.h> |
| #include <linux/usb.h> |
| #include <linux/clk.h> |
| +#include <linux/pinctrl/consumer.h> |
| +#include <linux/rt2x00_platform.h> |
| |
| #include <net/mac80211.h> |
| |
| @@ -407,6 +409,7 @@ struct hw_mode_spec { |
| unsigned int supported_bands; |
| #define SUPPORT_BAND_2GHZ 0x00000001 |
| #define SUPPORT_BAND_5GHZ 0x00000002 |
| +#define SUPPORT_BAND_BOTH (SUPPORT_BAND_2GHZ | SUPPORT_BAND_5GHZ) |
| |
| unsigned int supported_rates; |
| #define SUPPORT_RATE_CCK 0x00000001 |
| @@ -702,6 +705,7 @@ enum rt2x00_capability_flags { |
| REQUIRE_HT_TX_DESC, |
| REQUIRE_PS_AUTOWAKE, |
| REQUIRE_DELAYED_RFKILL, |
| + REQUIRE_EEPROM_FILE, |
| |
| /* |
| * Capabilities |
| @@ -1024,6 +1028,11 @@ struct rt2x00_dev { |
| |
| /* Clock for System On Chip devices. */ |
| struct clk *clk; |
| + |
| + /* pinctrl and states for System On Chip devices with PA/LNA. */ |
| + struct pinctrl *pinctrl; |
| + struct pinctrl_state *pins_default; |
| + struct pinctrl_state *pins_pa_gpio; |
| }; |
| |
| struct rt2x00_bar_list_entry { |
| @@ -1271,6 +1280,12 @@ rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev) |
| return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0); |
| } |
| |
| +static inline bool |
| +rt2x00_has_cap_external_pa(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_PA_TX0); |
| +} |
| + |
| static inline bool |
| rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev) |
| { |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c |
| index 274524e..69f8d5a 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00dev.c |
| @@ -990,6 +990,12 @@ static void rt2x00lib_rate(struct ieee80211_rate *entry, |
| |
| void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr) |
| { |
| + struct rt2x00_platform_data *pdata; |
| + |
| + pdata = rt2x00dev->dev->platform_data; |
| + if (pdata && pdata->mac_address) |
| + ether_addr_copy(eeprom_mac_addr, pdata->mac_address); |
| + |
| of_get_mac_address(rt2x00dev->dev->of_node, eeprom_mac_addr); |
| |
| if (!is_valid_ether_addr(eeprom_mac_addr)) { |
| @@ -1007,6 +1013,32 @@ static int rt2x00lib_probe_hw_modes(struct rt2x00_dev *rt2x00dev, |
| struct ieee80211_rate *rates; |
| unsigned int num_rates; |
| unsigned int i; |
| +#ifdef CONFIG_OF |
| + struct device_node *np = rt2x00dev->dev->of_node; |
| + unsigned int enabled; |
| + if (!of_property_read_u32(np, "ralink,2ghz", |
| + &enabled) && !enabled) |
| + spec->supported_bands &= ~SUPPORT_BAND_2GHZ; |
| + if (!of_property_read_u32(np, "ralink,5ghz", |
| + &enabled) && !enabled) |
| + spec->supported_bands &= ~SUPPORT_BAND_5GHZ; |
| +#endif /* CONFIG_OF */ |
| + |
| + if (rt2x00dev->dev->platform_data) { |
| + struct rt2x00_platform_data *pdata; |
| + |
| + pdata = rt2x00dev->dev->platform_data; |
| + if (pdata->disable_2ghz) |
| + spec->supported_bands &= ~SUPPORT_BAND_2GHZ; |
| + if (pdata->disable_5ghz) |
| + spec->supported_bands &= ~SUPPORT_BAND_5GHZ; |
| + } |
| + |
| + if ((spec->supported_bands & SUPPORT_BAND_BOTH) == 0) { |
| + rt2x00_err(rt2x00dev, "No supported bands\n"); |
| + return -EINVAL; |
| + } |
| + |
| |
| num_rates = 0; |
| if (spec->supported_rates & SUPPORT_RATE_CCK) |
| @@ -1330,7 +1362,7 @@ static inline void rt2x00lib_set_if_combinations(struct rt2x00_dev *rt2x00dev) |
| */ |
| if_limit = &rt2x00dev->if_limits_ap; |
| if_limit->max = rt2x00dev->ops->max_ap_intf; |
| - if_limit->types = BIT(NL80211_IFTYPE_AP); |
| + if_limit->types = BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_STATION); |
| #ifdef CPTCFG_MAC80211_MESH |
| if_limit->types |= BIT(NL80211_IFTYPE_MESH_POINT); |
| #endif |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c |
| new file mode 100644 |
| index 0000000..15c4e0b |
| --- /dev/null |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00eeprom.c |
| @@ -0,0 +1,208 @@ |
| +// SPDX-License-Identifier: GPL-2.0-or-later |
| +/* Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> |
| + * Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com> |
| + * <http://rt2x00.serialmonkey.com> |
| + */ |
| + |
| +/* Module: rt2x00lib |
| + * Abstract: rt2x00 eeprom file loading routines. |
| + */ |
| + |
| +#include <linux/kernel.h> |
| +#include <linux/module.h> |
| +#if IS_ENABLED(CONFIG_MTD) |
| +#include <linux/mtd/mtd.h> |
| +#include <linux/mtd/partitions.h> |
| +#endif |
| +#include <linux/nvmem-consumer.h> |
| +#include <linux/of.h> |
| + |
| +#include "rt2x00.h" |
| +#include "rt2x00soc.h" |
| + |
| +static void rt2800lib_eeprom_swap(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + struct device_node *np = rt2x00dev->dev->of_node; |
| + size_t len = rt2x00dev->ops->eeprom_size; |
| + int i; |
| + |
| + if (!of_find_property(np, "ralink,eeprom-swap", NULL)) |
| + return; |
| + |
| + for (i = 0; i < len / sizeof(u16); i++) |
| + rt2x00dev->eeprom[i] = swab16(rt2x00dev->eeprom[i]); |
| +} |
| + |
| +#if IS_ENABLED(CONFIG_MTD) |
| +static int rt2800lib_read_eeprom_mtd(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + int ret = -EINVAL; |
| +#ifdef CONFIG_OF |
| + struct device_node *np = rt2x00dev->dev->of_node, *mtd_np = NULL; |
| + int size, offset = 0; |
| + struct mtd_info *mtd; |
| + const char *part; |
| + const __be32 *list; |
| + phandle phandle; |
| + size_t retlen; |
| + |
| + list = of_get_property(np, "ralink,mtd-eeprom", &size); |
| + if (!list) |
| + return -ENOENT; |
| + |
| + phandle = be32_to_cpup(list++); |
| + if (phandle) |
| + mtd_np = of_find_node_by_phandle(phandle); |
| + if (!mtd_np) { |
| + dev_err(rt2x00dev->dev, "failed to load mtd phandle\n"); |
| + return -EINVAL; |
| + } |
| + |
| + part = of_get_property(mtd_np, "label", NULL); |
| + if (!part) |
| + part = mtd_np->name; |
| + |
| + mtd = get_mtd_device_nm(part); |
| + if (IS_ERR(mtd)) { |
| + dev_err(rt2x00dev->dev, "failed to get mtd device \"%s\"\n", part); |
| + return PTR_ERR(mtd); |
| + } |
| + |
| + if (size > sizeof(*list)) |
| + offset = be32_to_cpup(list); |
| + |
| + ret = mtd_read(mtd, offset, rt2x00dev->ops->eeprom_size, |
| + &retlen, (u_char *)rt2x00dev->eeprom); |
| + put_mtd_device(mtd); |
| + |
| + if (retlen != rt2x00dev->ops->eeprom_size || ret) { |
| + dev_err(rt2x00dev->dev, "failed to load eeprom from device \"%s\"\n", part); |
| + return ret; |
| + } |
| + |
| + rt2800lib_eeprom_swap(rt2x00dev); |
| + |
| + dev_info(rt2x00dev->dev, "loaded eeprom from mtd device \"%s\"\n", part); |
| +#endif |
| + |
| + return ret; |
| +} |
| +#endif |
| + |
| +static int rt2800lib_read_eeprom_nvmem(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + struct device_node *np = rt2x00dev->dev->of_node; |
| + unsigned int len = rt2x00dev->ops->eeprom_size; |
| + struct nvmem_cell *cell; |
| + const void *data; |
| + size_t retlen; |
| + int ret = 0; |
| + |
| + cell = of_nvmem_cell_get(np, "eeprom"); |
| + if (IS_ERR(cell)) |
| + return PTR_ERR(cell); |
| + |
| + data = nvmem_cell_read(cell, &retlen); |
| + nvmem_cell_put(cell); |
| + |
| + if (IS_ERR(data)) |
| + return PTR_ERR(data); |
| + |
| + if (retlen != len) { |
| + dev_err(rt2x00dev->dev, "invalid eeprom size, required: 0x%04x\n", len); |
| + ret = -EINVAL; |
| + goto exit; |
| + } |
| + |
| + memcpy(rt2x00dev->eeprom, data, len); |
| + |
| + rt2800lib_eeprom_swap(rt2x00dev); |
| + |
| +exit: |
| + kfree(data); |
| + return ret; |
| +} |
| + |
| +static const char * |
| +rt2x00lib_get_eeprom_file_name(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + struct rt2x00_platform_data *pdata = rt2x00dev->dev->platform_data; |
| +#ifdef CONFIG_OF |
| + struct device_node *np; |
| + const char *eep; |
| +#endif |
| + |
| + if (pdata && pdata->eeprom_file_name) |
| + return pdata->eeprom_file_name; |
| + |
| +#ifdef CONFIG_OF |
| + np = rt2x00dev->dev->of_node; |
| + if (np && !of_property_read_string(np, "ralink,eeprom", &eep)) |
| + return eep; |
| +#endif |
| + |
| + return NULL; |
| +} |
| + |
| +static int rt2x00lib_read_eeprom_file(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + const struct firmware *ee; |
| + const char *ee_name; |
| + int retval; |
| + |
| + ee_name = rt2x00lib_get_eeprom_file_name(rt2x00dev); |
| + if (!ee_name && test_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags)) { |
| + rt2x00_err(rt2x00dev, "Required EEPROM name is missing."); |
| + return -EINVAL; |
| + } |
| + |
| + if (!ee_name) |
| + return 0; |
| + |
| + rt2x00_info(rt2x00dev, "Loading EEPROM data from '%s'.\n", ee_name); |
| + |
| + retval = request_firmware(&ee, ee_name, rt2x00dev->dev); |
| + if (retval) { |
| + rt2x00_err(rt2x00dev, "Failed to request EEPROM.\n"); |
| + return retval; |
| + } |
| + |
| + if (!ee || !ee->size || !ee->data) { |
| + rt2x00_err(rt2x00dev, "Failed to read EEPROM file.\n"); |
| + retval = -ENOENT; |
| + goto err_exit; |
| + } |
| + |
| + if (ee->size != rt2x00dev->ops->eeprom_size) { |
| + rt2x00_err(rt2x00dev, |
| + "EEPROM file size is invalid, it should be %d bytes\n", |
| + rt2x00dev->ops->eeprom_size); |
| + retval = -EINVAL; |
| + goto err_release_ee; |
| + } |
| + |
| + memcpy(rt2x00dev->eeprom, ee->data, rt2x00dev->ops->eeprom_size); |
| + |
| +err_release_ee: |
| + release_firmware(ee); |
| +err_exit: |
| + return retval; |
| +} |
| + |
| +int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev) |
| +{ |
| + int ret; |
| + |
| +#if IS_ENABLED(CONFIG_MTD) |
| + ret = rt2800lib_read_eeprom_mtd(rt2x00dev); |
| + if (!ret) |
| + return 0; |
| +#endif |
| + |
| + ret = rt2800lib_read_eeprom_nvmem(rt2x00dev); |
| + if (!ret) |
| + return 0; |
| + |
| + return rt2x00lib_read_eeprom_file(rt2x00dev); |
| +} |
| +EXPORT_SYMBOL_GPL(rt2x00lib_read_eeprom); |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c |
| index f5361d5..bad5ce2 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00leds.c |
| @@ -98,6 +98,9 @@ static int rt2x00leds_register_led(struct rt2x00_dev *rt2x00dev, |
| led->led_dev.name = name; |
| led->led_dev.brightness = LED_OFF; |
| |
| + if (rt2x00_is_soc(rt2x00dev)) |
| + led->led_dev.brightness_set(&led->led_dev, LED_OFF); |
| + |
| retval = led_classdev_register(device, &led->led_dev); |
| if (retval) { |
| rt2x00_err(rt2x00dev, "Failed to register led handler\n"); |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c |
| index eface61..541b718 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c |
| @@ -86,6 +86,7 @@ int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops) |
| if (IS_ERR(rt2x00dev->clk)) |
| rt2x00dev->clk = NULL; |
| |
| + set_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags); |
| rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC); |
| |
| retval = rt2x00soc_alloc_reg(rt2x00dev); |
| @@ -96,6 +97,21 @@ int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops) |
| if (retval) |
| goto exit_free_reg; |
| |
| + rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev); |
| + if (IS_ERR(rt2x00dev->pinctrl)) { |
| + rt2x00dev->pinctrl = NULL; |
| + rt2x00dev->pins_default = NULL; |
| + rt2x00dev->pins_pa_gpio = NULL; |
| + } else { |
| + rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default"); |
| + if (IS_ERR(rt2x00dev->pins_default)) |
| + rt2x00dev->pins_default = NULL; |
| + |
| + rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio"); |
| + if (IS_ERR(rt2x00dev->pins_pa_gpio)) |
| + rt2x00dev->pins_pa_gpio = NULL; |
| + } |
| + |
| return 0; |
| |
| exit_free_reg: |
| diff --git a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h |
| index 021fd06..21cd951 100644 |
| --- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h |
| +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.h |
| @@ -26,4 +26,13 @@ int rt2x00soc_resume(struct platform_device *pdev); |
| #define rt2x00soc_resume NULL |
| #endif /* CONFIG_PM */ |
| |
| +/* |
| + * EEPROM file handlers. |
| + */ |
| +#ifdef CPTCFG_RT2X00_LIB_EEPROM |
| +int rt2x00lib_read_eeprom(struct rt2x00_dev *rt2x00dev); |
| +#else |
| +#define rt2x00lib_read_eeprom NULL |
| +#endif /* CPTCFG_RT2X00_LIB_EEPROM */ |
| + |
| #endif /* RT2X00SOC_H */ |
| diff --git a/include/linux/rt2x00_platform.h b/include/linux/rt2x00_platform.h |
| new file mode 100644 |
| index 0000000..e10377e |
| --- /dev/null |
| +++ b/include/linux/rt2x00_platform.h |
| @@ -0,0 +1,23 @@ |
| +/* |
| + * Platform data definition for the rt2x00 driver |
| + * |
| + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> |
| + * |
| + * This program is free software; you can redistribute it and/or modify it |
| + * under the terms of the GNU General Public License version 2 as published |
| + * by the Free Software Foundation. |
| + * |
| + */ |
| + |
| +#ifndef _RT2X00_PLATFORM_H |
| +#define _RT2X00_PLATFORM_H |
| + |
| +struct rt2x00_platform_data { |
| + char *eeprom_file_name; |
| + const u8 *mac_address; |
| + |
| + int disable_2ghz; |
| + int disable_5ghz; |
| +}; |
| + |
| +#endif /* _RT2X00_PLATFORM_H */ |
| diff --git a/local-symbols b/local-symbols |
| index 3d81ba5..beafad9 100644 |
| --- a/local-symbols |
| +++ b/local-symbols |
| @@ -331,6 +331,7 @@ RT2X00_LIB_FIRMWARE= |
| RT2X00_LIB_CRYPTO= |
| RT2X00_LIB_LEDS= |
| RT2X00_LIB_DEBUGFS= |
| +RT2X00_LIB_EEPROM= |
| RT2X00_DEBUG= |
| WLAN_VENDOR_REALTEK= |
| RTL8180= |
| -- |
| 2.39.2 |
| |