blob: fb3e74bb4fcded0cfd470c719709f0b823905f26 [file] [log] [blame]
developer2b96a9e2023-08-09 10:28:15 +08001From e3eb835c5f9c1f40a1aaf4fae2a2de83f2cd1a9c Mon Sep 17 00:00:00 2001
2From: Shayne Chen <shayne.chen@mediatek.com>
3Date: Thu, 3 Aug 2023 14:49:59 +0800
4Subject: [PATCH] sync to master codebase
5
6---
7 Makefile | 8 +
8 mt76_connac3_mac.h | 14 +
9 mt76x02_mac.c | 3 +-
10 mt7915/main.c | 3 +-
11 mt7915/mcu.c | 2 +-
12 mt7921/Kconfig | 4 +-
13 mt7921/Makefile | 9 +-
14 mt7921/acpi_sar.h | 105 ---
15 mt7921/debugfs.c | 228 +------
16 mt7921/init.c | 304 +--------
17 mt7921/mac.c | 442 ++-----------
18 mt7921/main.c | 796 +++++-----------------
19 mt7921/mcu.c | 217 ++----
20 mt7921/mt7921.h | 320 ++-------
21 mt7921/pci.c | 223 ++++---
22 mt7921/pci_mac.c | 18 +-
23 mt7921/pci_mcu.c | 71 +-
24 mt7921/regs.h | 464 +------------
25 mt7921/sdio.c | 32 +-
26 mt7921/sdio_mac.c | 6 +-
27 mt7921/sdio_mcu.c | 14 +-
28 mt7921/testmode.c | 10 +-
29 mt7921/trace.c | 12 -
30 mt7921/usb.c | 205 +++---
31 mt7921/usb_mac.c | 255 -------
32 mt792x.h | 367 +++++++++++
33 mt7921/acpi_sar.c => mt792x_acpi_sar.c | 128 ++--
34 mt792x_acpi_sar.h | 105 +++
35 mt792x_core.c | 844 ++++++++++++++++++++++++
36 mt792x_debugfs.c | 168 +++++
37 mt7921/dma.c => mt792x_dma.c | 336 +++++-----
38 mt792x_mac.c | 385 +++++++++++
39 mt792x_regs.h | 479 ++++++++++++++
40 mt792x_trace.c | 14 +
41 mt7921/mt7921_trace.h => mt792x_trace.h | 16 +-
42 mt792x_usb.c | 309 +++++++++
43 mt7996/mt7996.h | 14 -
44 testmode.c | 1 +
45 38 files changed, 3586 insertions(+), 3345 deletions(-)
46 delete mode 100644 mt7921/acpi_sar.h
47 delete mode 100644 mt7921/trace.c
48 delete mode 100644 mt7921/usb_mac.c
49 create mode 100644 mt792x.h
50 rename mt7921/acpi_sar.c => mt792x_acpi_sar.c (64%)
51 create mode 100644 mt792x_acpi_sar.h
52 create mode 100644 mt792x_core.c
53 create mode 100644 mt792x_debugfs.c
54 rename mt7921/dma.c => mt792x_dma.c (55%)
55 create mode 100644 mt792x_mac.c
56 create mode 100644 mt792x_regs.h
57 create mode 100644 mt792x_trace.c
58 rename mt7921/mt7921_trace.h => mt792x_trace.h (68%)
59 create mode 100644 mt792x_usb.c
60
61diff --git a/Makefile b/Makefile
62index f9b94280..c8aedf6d 100644
63--- a/Makefile
64+++ b/Makefile
65@@ -6,6 +6,8 @@ obj-$(CONFIG_MT76_SDIO) += mt76-sdio.o
66 obj-$(CONFIG_MT76x02_LIB) += mt76x02-lib.o
67 obj-$(CONFIG_MT76x02_USB) += mt76x02-usb.o
68 obj-$(CONFIG_MT76_CONNAC_LIB) += mt76-connac-lib.o
69+obj-$(CONFIG_MT792x_LIB) += mt792x-lib.o
70+obj-$(CONFIG_MT792x_USB) += mt792x-usb.o
71
72 mt76-y := \
73 mmio.o util.o trace.o dma.o mac80211.o debugfs.o eeprom.o \
74@@ -20,6 +22,7 @@ mt76-sdio-y := sdio.o sdio_txrx.o
75 CFLAGS_trace.o := -I$(src)
76 CFLAGS_usb_trace.o := -I$(src)
77 CFLAGS_mt76x02_trace.o := -I$(src)
78+CFLAGS_mt792x_trace.o := -I$(src)
79
80 mt76x02-lib-y := mt76x02_util.o mt76x02_mac.o mt76x02_mcu.o \
81 mt76x02_eeprom.o mt76x02_phy.o mt76x02_mmio.o \
82@@ -30,6 +33,11 @@ mt76x02-usb-y := mt76x02_usb_mcu.o mt76x02_usb_core.o
83
84 mt76-connac-lib-y := mt76_connac_mcu.o mt76_connac_mac.o mt76_connac3_mac.o
85
86+mt792x-lib-y := mt792x_core.o mt792x_mac.o mt792x_trace.o \
87+ mt792x_debugfs.o mt792x_dma.o
88+mt792x-lib-$(CONFIG_ACPI) += mt792x_acpi_sar.o
89+mt792x-usb-y := mt792x_usb.o
90+
91 obj-$(CONFIG_MT76x0_COMMON) += mt76x0/
92 obj-$(CONFIG_MT76x2_COMMON) += mt76x2/
93 obj-$(CONFIG_MT7603E) += mt7603/
94diff --git a/mt76_connac3_mac.h b/mt76_connac3_mac.h
95index 6663a0b4..68ca0844 100644
96--- a/mt76_connac3_mac.h
97+++ b/mt76_connac3_mac.h
98@@ -4,6 +4,20 @@
99 #ifndef __MT76_CONNAC3_MAC_H
100 #define __MT76_CONNAC3_MAC_H
101
102+enum {
103+ MT_CTX0,
104+ MT_HIF0 = 0x0,
105+
106+ MT_LMAC_AC00 = 0x0,
107+ MT_LMAC_AC01,
108+ MT_LMAC_AC02,
109+ MT_LMAC_AC03,
110+ MT_LMAC_ALTX0 = 0x10,
111+ MT_LMAC_BMC0,
112+ MT_LMAC_BCN0,
113+ MT_LMAC_PSMP0,
114+};
115+
116 #define MT_CT_PARSE_LEN 72
117 #define MT_CT_DMA_BUF_NUM 2
118
119diff --git a/mt76x02_mac.c b/mt76x02_mac.c
120index 3e41d809..d5db6ffd 100644
121--- a/mt76x02_mac.c
122+++ b/mt76x02_mac.c
123@@ -853,7 +853,8 @@ int mt76x02_mac_process_rx(struct mt76x02_dev *dev, struct sk_buff *skb,
124 if (WARN_ON_ONCE(len > skb->len))
125 return -EINVAL;
126
127- pskb_trim(skb, len);
128+ if (pskb_trim(skb, len))
129+ return -EINVAL;
130
131 status->chains = BIT(0);
132 signal = mt76x02_mac_get_rssi(dev, rxwi->rssi[0], 0);
133diff --git a/mt7915/main.c b/mt7915/main.c
134index 33bfa4a6..9b79e915 100644
135--- a/mt7915/main.c
136+++ b/mt7915/main.c
137@@ -471,7 +471,8 @@ static int mt7915_config(struct ieee80211_hw *hw, u32 changed)
138 ieee80211_wake_queues(hw);
139 }
140
141- if (changed & IEEE80211_CONF_CHANGE_POWER) {
142+ if (changed & (IEEE80211_CONF_CHANGE_POWER |
143+ IEEE80211_CONF_CHANGE_CHANNEL)) {
144 ret = mt7915_mcu_set_txpower_sku(phy);
145 if (ret)
146 return ret;
147diff --git a/mt7915/mcu.c b/mt7915/mcu.c
148index b0328d4f..8224f8be 100644
149--- a/mt7915/mcu.c
150+++ b/mt7915/mcu.c
151@@ -3038,7 +3038,7 @@ int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch)
152 }
153
154 ret = mt76_mcu_send_and_get_msg(&dev->mt76, MCU_EXT_CMD(GET_MIB_INFO),
155- req, sizeof(req), true, &skb);
156+ req, len * sizeof(req[0]), true, &skb);
157 if (ret)
158 return ret;
159
160diff --git a/mt7921/Kconfig b/mt7921/Kconfig
161index adff2d73..7ed51e05 100644
162--- a/mt7921/Kconfig
163+++ b/mt7921/Kconfig
164@@ -1,7 +1,7 @@
165 # SPDX-License-Identifier: ISC
166 config MT7921_COMMON
167 tristate
168- select MT76_CONNAC_LIB
169+ select MT792x_LIB
170 select WANT_DEV_COREDUMP
171
172 config MT7921E
173@@ -27,7 +27,7 @@ config MT7921S
174
175 config MT7921U
176 tristate "MediaTek MT7921U (USB) support"
177- select MT76_USB
178+ select MT792x_USB
179 select MT7921_COMMON
180 depends on MAC80211
181 depends on USB
182diff --git a/mt7921/Makefile b/mt7921/Makefile
183index e5d2d2e1..849be9e8 100644
184--- a/mt7921/Makefile
185+++ b/mt7921/Makefile
186@@ -5,11 +5,8 @@ obj-$(CONFIG_MT7921E) += mt7921e.o
187 obj-$(CONFIG_MT7921S) += mt7921s.o
188 obj-$(CONFIG_MT7921U) += mt7921u.o
189
190-CFLAGS_trace.o := -I$(src)
191-
192-mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o trace.o
193+mt7921-common-y := mac.o mcu.o main.o init.o debugfs.o
194 mt7921-common-$(CONFIG_NL80211_TESTMODE) += testmode.o
195-mt7921-common-$(CONFIG_ACPI) += acpi_sar.o
196-mt7921e-y := pci.o pci_mac.o pci_mcu.o dma.o
197+mt7921e-y := pci.o pci_mac.o pci_mcu.o
198 mt7921s-y := sdio.o sdio_mac.o sdio_mcu.o
199-mt7921u-y := usb.o usb_mac.o
200+mt7921u-y := usb.o
201diff --git a/mt7921/acpi_sar.h b/mt7921/acpi_sar.h
202deleted file mode 100644
203index 35268b08..00000000
204--- a/mt7921/acpi_sar.h
205+++ /dev/null
206@@ -1,105 +0,0 @@
207-/* SPDX-License-Identifier: ISC */
208-/* Copyright (C) 2022 MediaTek Inc. */
209-
210-#ifndef __MT7921_ACPI_SAR_H
211-#define __MT7921_ACPI_SAR_H
212-
213-#define MT7921_ASAR_MIN_DYN 1
214-#define MT7921_ASAR_MAX_DYN 8
215-#define MT7921_ASAR_MIN_GEO 3
216-#define MT7921_ASAR_MAX_GEO 8
217-#define MT7921_ASAR_MIN_FG 8
218-
219-#define MT7921_ACPI_MTCL "MTCL"
220-#define MT7921_ACPI_MTDS "MTDS"
221-#define MT7921_ACPI_MTGS "MTGS"
222-#define MT7921_ACPI_MTFG "MTFG"
223-
224-struct mt7921_asar_dyn_limit {
225- u8 idx;
226- u8 frp[5];
227-} __packed;
228-
229-struct mt7921_asar_dyn {
230- u8 names[4];
231- u8 enable;
232- u8 nr_tbl;
233- struct mt7921_asar_dyn_limit tbl[0];
234-} __packed;
235-
236-struct mt7921_asar_dyn_limit_v2 {
237- u8 idx;
238- u8 frp[11];
239-} __packed;
240-
241-struct mt7921_asar_dyn_v2 {
242- u8 names[4];
243- u8 enable;
244- u8 rsvd;
245- u8 nr_tbl;
246- struct mt7921_asar_dyn_limit_v2 tbl[0];
247-} __packed;
248-
249-struct mt7921_asar_geo_band {
250- u8 pwr;
251- u8 offset;
252-} __packed;
253-
254-struct mt7921_asar_geo_limit {
255- u8 idx;
256- /* 0:2G, 1:5G */
257- struct mt7921_asar_geo_band band[2];
258-} __packed;
259-
260-struct mt7921_asar_geo {
261- u8 names[4];
262- u8 version;
263- u8 nr_tbl;
264- struct mt7921_asar_geo_limit tbl[0];
265-} __packed;
266-
267-struct mt7921_asar_geo_limit_v2 {
268- u8 idx;
269- /* 0:2G, 1:5G, 2:6G */
270- struct mt7921_asar_geo_band band[3];
271-} __packed;
272-
273-struct mt7921_asar_geo_v2 {
274- u8 names[4];
275- u8 version;
276- u8 rsvd;
277- u8 nr_tbl;
278- struct mt7921_asar_geo_limit_v2 tbl[0];
279-} __packed;
280-
281-struct mt7921_asar_cl {
282- u8 names[4];
283- u8 version;
284- u8 mode_6g;
285- u8 cl6g[6];
286-} __packed;
287-
288-struct mt7921_asar_fg {
289- u8 names[4];
290- u8 version;
291- u8 rsvd;
292- u8 nr_flag;
293- u8 rsvd1;
294- u8 flag[0];
295-} __packed;
296-
297-struct mt7921_acpi_sar {
298- u8 ver;
299- union {
300- struct mt7921_asar_dyn *dyn;
301- struct mt7921_asar_dyn_v2 *dyn_v2;
302- };
303- union {
304- struct mt7921_asar_geo *geo;
305- struct mt7921_asar_geo_v2 *geo_v2;
306- };
307- struct mt7921_asar_cl *countrylist;
308- struct mt7921_asar_fg *fg;
309-};
310-
311-#endif
312diff --git a/mt7921/debugfs.c b/mt7921/debugfs.c
313index d6c66e77..616b66a3 100644
314--- a/mt7921/debugfs.c
315+++ b/mt7921/debugfs.c
316@@ -6,11 +6,11 @@
317 static int
318 mt7921_reg_set(void *data, u64 val)
319 {
320- struct mt7921_dev *dev = data;
321+ struct mt792x_dev *dev = data;
322
323- mt7921_mutex_acquire(dev);
324+ mt792x_mutex_acquire(dev);
325 mt76_wr(dev, dev->mt76.debugfs_reg, val);
326- mt7921_mutex_release(dev);
327+ mt792x_mutex_release(dev);
328
329 return 0;
330 }
331@@ -18,11 +18,11 @@ mt7921_reg_set(void *data, u64 val)
332 static int
333 mt7921_reg_get(void *data, u64 *val)
334 {
335- struct mt7921_dev *dev = data;
336+ struct mt792x_dev *dev = data;
337
338- mt7921_mutex_acquire(dev);
339+ mt792x_mutex_acquire(dev);
340 *val = mt76_rr(dev, dev->mt76.debugfs_reg);
341- mt7921_mutex_release(dev);
342+ mt792x_mutex_release(dev);
343
344 return 0;
345 }
346@@ -32,14 +32,14 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_regval, mt7921_reg_get, mt7921_reg_set,
347 static int
348 mt7921_fw_debug_set(void *data, u64 val)
349 {
350- struct mt7921_dev *dev = data;
351+ struct mt792x_dev *dev = data;
352
353- mt7921_mutex_acquire(dev);
354+ mt792x_mutex_acquire(dev);
355
356 dev->fw_debug = (u8)val;
357 mt7921_mcu_fw_log_2_host(dev, dev->fw_debug);
358
359- mt7921_mutex_release(dev);
360+ mt792x_mutex_release(dev);
361
362 return 0;
363 }
364@@ -47,7 +47,7 @@ mt7921_fw_debug_set(void *data, u64 val)
365 static int
366 mt7921_fw_debug_get(void *data, u64 *val)
367 {
368- struct mt7921_dev *dev = data;
369+ struct mt792x_dev *dev = data;
370
371 *val = dev->fw_debug;
372
373@@ -57,128 +57,7 @@ mt7921_fw_debug_get(void *data, u64 *val)
374 DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7921_fw_debug_get,
375 mt7921_fw_debug_set, "%lld\n");
376
377-static void
378-mt7921_ampdu_stat_read_phy(struct mt7921_phy *phy,
379- struct seq_file *file)
380-{
381- struct mt7921_dev *dev = file->private;
382- int bound[15], range[4], i;
383-
384- if (!phy)
385- return;
386-
387- mt7921_mac_update_mib_stats(phy);
388-
389- /* Tx ampdu stat */
390- for (i = 0; i < ARRAY_SIZE(range); i++)
391- range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i));
392-
393- for (i = 0; i < ARRAY_SIZE(bound); i++)
394- bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1;
395-
396- seq_printf(file, "\nPhy0\n");
397-
398- seq_printf(file, "Length: %8d | ", bound[0]);
399- for (i = 0; i < ARRAY_SIZE(bound) - 1; i++)
400- seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]);
401-
402- seq_puts(file, "\nCount: ");
403- for (i = 0; i < ARRAY_SIZE(bound); i++)
404- seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]);
405- seq_puts(file, "\n");
406-
407- seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt);
408-}
409-
410-static int
411-mt7921_tx_stats_show(struct seq_file *file, void *data)
412-{
413- struct mt7921_dev *dev = file->private;
414- struct mt7921_phy *phy = &dev->phy;
415- struct mt76_mib_stats *mib = &phy->mib;
416- int i;
417-
418- mt7921_mutex_acquire(dev);
419-
420- mt7921_ampdu_stat_read_phy(phy, file);
421-
422- seq_puts(file, "Tx MSDU stat:\n");
423- for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
424- seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ",
425- i + 1, mib->tx_amsdu[i]);
426- if (mib->tx_amsdu_cnt)
427- seq_printf(file, "(%3d%%)\n",
428- mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt);
429- else
430- seq_puts(file, "\n");
431- }
432-
433- mt7921_mutex_release(dev);
434-
435- return 0;
436-}
437-
438-DEFINE_SHOW_ATTRIBUTE(mt7921_tx_stats);
439-
440-static int
441-mt7921_queues_acq(struct seq_file *s, void *data)
442-{
443- struct mt7921_dev *dev = dev_get_drvdata(s->private);
444- int i;
445-
446- mt7921_mutex_acquire(dev);
447-
448- for (i = 0; i < 4; i++) {
449- u32 ctrl, val, qlen = 0;
450- int j;
451-
452- val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i));
453- ctrl = BIT(31) | BIT(11) | (i << 24);
454-
455- for (j = 0; j < 32; j++) {
456- if (val & BIT(j))
457- continue;
458-
459- mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j);
460- qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
461- GENMASK(11, 0));
462- }
463- seq_printf(s, "AC%d: queued=%d\n", i, qlen);
464- }
465-
466- mt7921_mutex_release(dev);
467-
468- return 0;
469-}
470-
471-static int
472-mt7921_queues_read(struct seq_file *s, void *data)
473-{
474- struct mt7921_dev *dev = dev_get_drvdata(s->private);
475- struct {
476- struct mt76_queue *q;
477- char *queue;
478- } queue_map[] = {
479- { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" },
480- { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" },
481- { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" },
482- };
483- int i;
484-
485- for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
486- struct mt76_queue *q = queue_map[i].q;
487-
488- if (!q)
489- continue;
490-
491- seq_printf(s,
492- "%s: queued=%d head=%d tail=%d\n",
493- queue_map[i].queue, q->queued, q->head,
494- q->tail);
495- }
496-
497- return 0;
498-}
499+DEFINE_SHOW_ATTRIBUTE(mt792x_tx_stats);
500
501 static void
502 mt7921_seq_puts_array(struct seq_file *file, const char *str,
503@@ -211,13 +90,13 @@ mt7921_seq_puts_array(struct seq_file *file, const char *str,
504 static int
505 mt7921_txpwr(struct seq_file *s, void *data)
506 {
507- struct mt7921_dev *dev = dev_get_drvdata(s->private);
508+ struct mt792x_dev *dev = dev_get_drvdata(s->private);
509 struct mt7921_txpwr txpwr;
510 int ret;
511
512- mt7921_mutex_acquire(dev);
513+ mt792x_mutex_acquire(dev);
514 ret = mt7921_get_txpwr_info(dev, &txpwr);
515- mt7921_mutex_release(dev);
516+ mt792x_mutex_release(dev);
517
518 if (ret)
519 return ret;
520@@ -263,7 +142,7 @@ mt7921_txpwr(struct seq_file *s, void *data)
521 static int
522 mt7921_pm_set(void *data, u64 val)
523 {
524- struct mt7921_dev *dev = data;
525+ struct mt792x_dev *dev = data;
526 struct mt76_connac_pm *pm = &dev->pm;
527
528 if (mt76_is_usb(&dev->mt76))
529@@ -296,7 +175,7 @@ out:
530 static int
531 mt7921_pm_get(void *data, u64 *val)
532 {
533- struct mt7921_dev *dev = data;
534+ struct mt792x_dev *dev = data;
535
536 *val = dev->pm.enable_user;
537
538@@ -308,7 +187,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7921_pm_get, mt7921_pm_set, "%lld\n");
539 static int
540 mt7921_deep_sleep_set(void *data, u64 val)
541 {
542- struct mt7921_dev *dev = data;
543+ struct mt792x_dev *dev = data;
544 struct mt76_connac_pm *pm = &dev->pm;
545 bool monitor = !!(dev->mphy.hw->conf.flags & IEEE80211_CONF_MONITOR);
546 bool enable = !!val;
547@@ -316,7 +195,7 @@ mt7921_deep_sleep_set(void *data, u64 val)
548 if (mt76_is_usb(&dev->mt76))
549 return -EOPNOTSUPP;
550
551- mt7921_mutex_acquire(dev);
552+ mt792x_mutex_acquire(dev);
553 if (pm->ds_enable_user == enable)
554 goto out;
555
556@@ -324,7 +203,7 @@ mt7921_deep_sleep_set(void *data, u64 val)
557 pm->ds_enable = enable && !monitor;
558 mt76_connac_mcu_set_deep_sleep(&dev->mt76, pm->ds_enable);
559 out:
560- mt7921_mutex_release(dev);
561+ mt792x_mutex_release(dev);
562
563 return 0;
564 }
565@@ -332,7 +211,7 @@ out:
566 static int
567 mt7921_deep_sleep_get(void *data, u64 *val)
568 {
569- struct mt7921_dev *dev = data;
570+ struct mt792x_dev *dev = data;
571
572 *val = dev->pm.ds_enable_user;
573
574@@ -342,67 +221,24 @@ mt7921_deep_sleep_get(void *data, u64 *val)
575 DEFINE_DEBUGFS_ATTRIBUTE(fops_ds, mt7921_deep_sleep_get,
576 mt7921_deep_sleep_set, "%lld\n");
577
578-static int
579-mt7921_pm_stats(struct seq_file *s, void *data)
580-{
581- struct mt7921_dev *dev = dev_get_drvdata(s->private);
582- struct mt76_connac_pm *pm = &dev->pm;
583-
584- unsigned long awake_time = pm->stats.awake_time;
585- unsigned long doze_time = pm->stats.doze_time;
586-
587- if (!test_bit(MT76_STATE_PM, &dev->mphy.state))
588- awake_time += jiffies - pm->stats.last_wake_event;
589- else
590- doze_time += jiffies - pm->stats.last_doze_event;
591-
592- seq_printf(s, "awake time: %14u\ndoze time: %15u\n",
593- jiffies_to_msecs(awake_time),
594- jiffies_to_msecs(doze_time));
595-
596- seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake);
597-
598- return 0;
599-}
600-
601-static int
602-mt7921_pm_idle_timeout_set(void *data, u64 val)
603-{
604- struct mt7921_dev *dev = data;
605-
606- dev->pm.idle_timeout = msecs_to_jiffies(val);
607-
608- return 0;
609-}
610-
611-static int
612-mt7921_pm_idle_timeout_get(void *data, u64 *val)
613-{
614- struct mt7921_dev *dev = data;
615-
616- *val = jiffies_to_msecs(dev->pm.idle_timeout);
617-
618- return 0;
619-}
620-
621-DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7921_pm_idle_timeout_get,
622- mt7921_pm_idle_timeout_set, "%lld\n");
623+DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt792x_pm_idle_timeout_get,
624+ mt792x_pm_idle_timeout_set, "%lld\n");
625
626 static int mt7921_chip_reset(void *data, u64 val)
627 {
628- struct mt7921_dev *dev = data;
629+ struct mt792x_dev *dev = data;
630 int ret = 0;
631
632 switch (val) {
633 case 1:
634 /* Reset wifisys directly. */
635- mt7921_reset(&dev->mt76);
636+ mt792x_reset(&dev->mt76);
637 break;
638 default:
639 /* Collect the core dump before reset wifisys. */
640- mt7921_mutex_acquire(dev);
641+ mt792x_mutex_acquire(dev);
642 ret = mt76_connac_mcu_chip_config(&dev->mt76);
643- mt7921_mutex_release(dev);
644+ mt792x_mutex_release(dev);
645 break;
646 }
647
648@@ -414,7 +250,7 @@ DEFINE_DEBUGFS_ATTRIBUTE(fops_reset, NULL, mt7921_chip_reset, "%lld\n");
649 static int
650 mt7921s_sched_quota_read(struct seq_file *s, void *data)
651 {
652- struct mt7921_dev *dev = dev_get_drvdata(s->private);
653+ struct mt792x_dev *dev = dev_get_drvdata(s->private);
654 struct mt76_sdio *sdio = &dev->mt76.sdio;
655
656 seq_printf(s, "pse_data_quota\t%d\n", sdio->sched.pse_data_quota);
657@@ -425,7 +261,7 @@ mt7921s_sched_quota_read(struct seq_file *s, void *data)
658 return 0;
659 }
660
661-int mt7921_init_debugfs(struct mt7921_dev *dev)
662+int mt7921_init_debugfs(struct mt792x_dev *dev)
663 {
664 struct dentry *dir;
665
666@@ -435,23 +271,23 @@ int mt7921_init_debugfs(struct mt7921_dev *dev)
667
668 if (mt76_is_mmio(&dev->mt76))
669 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues",
670- dir, mt7921_queues_read);
671+ dir, mt792x_queues_read);
672 else
673 debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues",
674 dir, mt76_queues_read);
675
676 debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir,
677- mt7921_queues_acq);
678+ mt792x_queues_acq);
679 debugfs_create_devm_seqfile(dev->mt76.dev, "txpower_sku", dir,
680 mt7921_txpwr);
681- debugfs_create_file("tx_stats", 0400, dir, dev, &mt7921_tx_stats_fops);
682+ debugfs_create_file("tx_stats", 0400, dir, dev, &mt792x_tx_stats_fops);
683 debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug);
684 debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm);
685 debugfs_create_file("idle-timeout", 0600, dir, dev,
686 &fops_pm_idle_timeout);
687 debugfs_create_file("chip_reset", 0600, dir, dev, &fops_reset);
688 debugfs_create_devm_seqfile(dev->mt76.dev, "runtime_pm_stats", dir,
689- mt7921_pm_stats);
690+ mt792x_pm_stats);
691 debugfs_create_file("deep-sleep", 0600, dir, dev, &fops_ds);
692 if (mt76_is_sdio(&dev->mt76))
693 debugfs_create_devm_seqfile(dev->mt76.dev, "sched-quota", dir,
694diff --git a/mt7921/init.c b/mt7921/init.c
695index 94b7cdfd..ff63f37f 100644
696--- a/mt7921/init.c
697+++ b/mt7921/init.c
698@@ -10,63 +10,19 @@
699 #include "../mt76_connac2_mac.h"
700 #include "mcu.h"
701
702-static const struct ieee80211_iface_limit if_limits[] = {
703- {
704- .max = MT7921_MAX_INTERFACES,
705- .types = BIT(NL80211_IFTYPE_STATION)
706- },
707- {
708- .max = 1,
709- .types = BIT(NL80211_IFTYPE_AP)
710- }
711-};
712-
713-static const struct ieee80211_iface_combination if_comb[] = {
714- {
715- .limits = if_limits,
716- .n_limits = ARRAY_SIZE(if_limits),
717- .max_interfaces = MT7921_MAX_INTERFACES,
718- .num_different_channels = 1,
719- .beacon_int_infra_match = true,
720- },
721-};
722-
723-static const struct ieee80211_iface_limit if_limits_chanctx[] = {
724- {
725- .max = 2,
726- .types = BIT(NL80211_IFTYPE_STATION) |
727- BIT(NL80211_IFTYPE_P2P_CLIENT)
728- },
729- {
730- .max = 1,
731- .types = BIT(NL80211_IFTYPE_AP) |
732- BIT(NL80211_IFTYPE_P2P_GO)
733- }
734-};
735-
736-static const struct ieee80211_iface_combination if_comb_chanctx[] = {
737- {
738- .limits = if_limits_chanctx,
739- .n_limits = ARRAY_SIZE(if_limits_chanctx),
740- .max_interfaces = 2,
741- .num_different_channels = 2,
742- .beacon_int_infra_match = false,
743- }
744-};
745-
746 static ssize_t mt7921_thermal_temp_show(struct device *dev,
747 struct device_attribute *attr,
748 char *buf)
749 {
750 switch (to_sensor_dev_attr(attr)->index) {
751 case 0: {
752- struct mt7921_phy *phy = dev_get_drvdata(dev);
753- struct mt7921_dev *mdev = phy->dev;
754+ struct mt792x_phy *phy = dev_get_drvdata(dev);
755+ struct mt792x_dev *mdev = phy->dev;
756 int temperature;
757
758- mt7921_mutex_acquire(mdev);
759+ mt792x_mutex_acquire(mdev);
760 temperature = mt7921_mcu_get_temperature(phy);
761- mt7921_mutex_release(mdev);
762+ mt792x_mutex_release(mdev);
763
764 if (temperature < 0)
765 return temperature;
766@@ -85,7 +41,7 @@ static struct attribute *mt7921_hwmon_attrs[] = {
767 };
768 ATTRIBUTE_GROUPS(mt7921_hwmon);
769
770-static int mt7921_thermal_init(struct mt7921_phy *phy)
771+static int mt7921_thermal_init(struct mt792x_phy *phy)
772 {
773 struct wiphy *wiphy = phy->mt76->hw->wiphy;
774 struct device *hwmon;
775@@ -110,206 +66,20 @@ mt7921_regd_notifier(struct wiphy *wiphy,
776 struct regulatory_request *request)
777 {
778 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
779- struct mt7921_dev *dev = mt7921_hw_dev(hw);
780+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
781
782 memcpy(dev->mt76.alpha2, request->alpha2, sizeof(dev->mt76.alpha2));
783 dev->mt76.region = request->dfs_region;
784 dev->country_ie_env = request->country_ie_env;
785
786- mt7921_mutex_acquire(dev);
787+ mt792x_mutex_acquire(dev);
788 mt7921_mcu_set_clc(dev, request->alpha2, request->country_ie_env);
789 mt76_connac_mcu_set_channel_domain(hw->priv);
790 mt7921_set_tx_sar_pwr(hw, NULL);
791- mt7921_mutex_release(dev);
792-}
793-
794-static int
795-mt7921_init_wiphy(struct ieee80211_hw *hw)
796-{
797- struct mt7921_phy *phy = mt7921_hw_phy(hw);
798- struct mt7921_dev *dev = phy->dev;
799- struct wiphy *wiphy = hw->wiphy;
800-
801- hw->queues = 4;
802- hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
803- hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
804- hw->netdev_features = NETIF_F_RXCSUM;
805-
806- hw->radiotap_timestamp.units_pos =
807- IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
808-
809- phy->slottime = 9;
810-
811- hw->sta_data_size = sizeof(struct mt7921_sta);
812- hw->vif_data_size = sizeof(struct mt7921_vif);
813-
814- if (dev->fw_features & MT7921_FW_CAP_CNM) {
815- wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
816- wiphy->iface_combinations = if_comb_chanctx;
817- wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_chanctx);
818- } else {
819- wiphy->flags &= ~WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
820- wiphy->iface_combinations = if_comb;
821- wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
822- }
823- wiphy->flags &= ~(WIPHY_FLAG_IBSS_RSN | WIPHY_FLAG_4ADDR_AP |
824- WIPHY_FLAG_4ADDR_STATION);
825- wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
826- BIT(NL80211_IFTYPE_AP) |
827- BIT(NL80211_IFTYPE_P2P_CLIENT) |
828- BIT(NL80211_IFTYPE_P2P_GO);
829- wiphy->max_remain_on_channel_duration = 5000;
830- wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
831- wiphy->max_scan_ssids = 4;
832- wiphy->max_sched_scan_plan_interval =
833- MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
834- wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
835- wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
836- wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
837- wiphy->max_sched_scan_reqs = 1;
838- wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH |
839- WIPHY_FLAG_SPLIT_SCAN_6GHZ;
840- wiphy->reg_notifier = mt7921_regd_notifier;
841-
842- wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
843- NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
844- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
845- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
846- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
847- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
848- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
849- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
850- wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
851-
852- ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
853- ieee80211_hw_set(hw, HAS_RATE_CONTROL);
854- ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
855- ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
856- ieee80211_hw_set(hw, WANT_MONITOR_VIF);
857- ieee80211_hw_set(hw, SUPPORTS_PS);
858- ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
859- ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
860- ieee80211_hw_set(hw, CONNECTION_MONITOR);
861-
862- if (dev->pm.enable)
863- ieee80211_hw_set(hw, CONNECTION_MONITOR);
864-
865- hw->max_tx_fragments = 4;
866-
867- return 0;
868-}
869-
870-static void
871-mt7921_mac_init_band(struct mt7921_dev *dev, u8 band)
872-{
873- u32 mask, set;
874-
875- mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
876- MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
877- mt76_set(dev, MT_TMAC_CTCR0(band),
878- MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
879- MT_TMAC_CTCR0_INS_DDLMT_EN);
880-
881- mt76_set(dev, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
882- mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
883-
884- /* enable MIB tx-rx time reporting */
885- mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_TXDUR_EN);
886- mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_RXDUR_EN);
887-
888- mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 1536);
889- /* disable rx rate report by default due to hw issues */
890- mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
891-
892- /* filter out non-resp frames and get instantaneous signal reporting */
893- mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM;
894- set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |
895- FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);
896- mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set);
897-}
898-
899-static u8
900-mt7921_get_offload_capability(struct device *dev, const char *fw_wm)
901-{
902- const struct mt76_connac2_fw_trailer *hdr;
903- struct mt7921_realease_info *rel_info;
904- const struct firmware *fw;
905- int ret, i, offset = 0;
906- const u8 *data, *end;
907- u8 offload_caps = 0;
908-
909- ret = request_firmware(&fw, fw_wm, dev);
910- if (ret)
911- return ret;
912-
913- if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
914- dev_err(dev, "Invalid firmware\n");
915- goto out;
916- }
917-
918- data = fw->data;
919- hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
920-
921- for (i = 0; i < hdr->n_region; i++) {
922- const struct mt76_connac2_fw_region *region;
923-
924- region = (const void *)((const u8 *)hdr -
925- (hdr->n_region - i) * sizeof(*region));
926- offset += le32_to_cpu(region->len);
927- }
928-
929- data += offset + 16;
930- rel_info = (struct mt7921_realease_info *)data;
931- data += sizeof(*rel_info);
932- end = data + le16_to_cpu(rel_info->len);
933-
934- while (data < end) {
935- rel_info = (struct mt7921_realease_info *)data;
936- data += sizeof(*rel_info);
937-
938- if (rel_info->tag == MT7921_FW_TAG_FEATURE) {
939- struct mt7921_fw_features *features;
940-
941- features = (struct mt7921_fw_features *)data;
942- offload_caps = features->data;
943- break;
944- }
945-
946- data += le16_to_cpu(rel_info->len) + rel_info->pad_len;
947- }
948-
949-out:
950- release_firmware(fw);
951-
952- return offload_caps;
953+ mt792x_mutex_release(dev);
954 }
955
956-struct ieee80211_ops *
957-mt7921_get_mac80211_ops(struct device *dev, void *drv_data, u8 *fw_features)
958-{
959- struct ieee80211_ops *ops;
960-
961- ops = devm_kmemdup(dev, &mt7921_ops, sizeof(mt7921_ops), GFP_KERNEL);
962- if (!ops)
963- return NULL;
964-
965- *fw_features = mt7921_get_offload_capability(dev, drv_data);
966- if (!(*fw_features & MT7921_FW_CAP_CNM)) {
967- ops->remain_on_channel = NULL;
968- ops->cancel_remain_on_channel = NULL;
969- ops->add_chanctx = NULL;
970- ops->remove_chanctx = NULL;
971- ops->change_chanctx = NULL;
972- ops->assign_vif_chanctx = NULL;
973- ops->unassign_vif_chanctx = NULL;
974- ops->mgd_prepare_tx = NULL;
975- ops->mgd_complete_tx = NULL;
976- }
977- return ops;
978-}
979-EXPORT_SYMBOL_GPL(mt7921_get_mac80211_ops);
980-
981-int mt7921_mac_init(struct mt7921_dev *dev)
982+int mt7921_mac_init(struct mt792x_dev *dev)
983 {
984 int i;
985
986@@ -319,17 +89,17 @@ int mt7921_mac_init(struct mt7921_dev *dev)
987 /* enable hardware rx header translation */
988 mt76_set(dev, MT_MDP_DCR0, MT_MDP_DCR0_RX_HDR_TRANS_EN);
989
990- for (i = 0; i < MT7921_WTBL_SIZE; i++)
991+ for (i = 0; i < MT792x_WTBL_SIZE; i++)
992 mt7921_mac_wtbl_update(dev, i,
993 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
994 for (i = 0; i < 2; i++)
995- mt7921_mac_init_band(dev, i);
996+ mt792x_mac_init_band(dev, i);
997
998 return mt76_connac_mcu_set_rts_thresh(&dev->mt76, 0x92b, 0);
999 }
1000 EXPORT_SYMBOL_GPL(mt7921_mac_init);
1001
1002-static int __mt7921_init_hardware(struct mt7921_dev *dev)
1003+static int __mt7921_init_hardware(struct mt792x_dev *dev)
1004 {
1005 int ret;
1006
1007@@ -337,7 +107,7 @@ static int __mt7921_init_hardware(struct mt7921_dev *dev)
1008 * which should be set before firmware download stage.
1009 */
1010 mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
1011- ret = mt7921_mcu_init(dev);
1012+ ret = mt792x_mcu_init(dev);
1013 if (ret)
1014 goto out;
1015
1016@@ -352,21 +122,21 @@ out:
1017 return ret;
1018 }
1019
1020-static int mt7921_init_hardware(struct mt7921_dev *dev)
1021+static int mt7921_init_hardware(struct mt792x_dev *dev)
1022 {
1023 int ret, i;
1024
1025 set_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
1026
1027- for (i = 0; i < MT7921_MCU_INIT_RETRY_COUNT; i++) {
1028+ for (i = 0; i < MT792x_MCU_INIT_RETRY_COUNT; i++) {
1029 ret = __mt7921_init_hardware(dev);
1030 if (!ret)
1031 break;
1032
1033- mt7921_init_reset(dev);
1034+ mt792x_init_reset(dev);
1035 }
1036
1037- if (i == MT7921_MCU_INIT_RETRY_COUNT) {
1038+ if (i == MT792x_MCU_INIT_RETRY_COUNT) {
1039 dev_err(dev->mt76.dev, "hardware init failed\n");
1040 return ret;
1041 }
1042@@ -374,26 +144,9 @@ static int mt7921_init_hardware(struct mt7921_dev *dev)
1043 return 0;
1044 }
1045
1046-static int mt7921_init_wcid(struct mt7921_dev *dev)
1047-{
1048- int idx;
1049-
1050- /* Beacon and mgmt frames should occupy wcid 0 */
1051- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7921_WTBL_STA - 1);
1052- if (idx)
1053- return -ENOSPC;
1054-
1055- dev->mt76.global_wcid.idx = idx;
1056- dev->mt76.global_wcid.hw_key_idx = -1;
1057- dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
1058- rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
1059-
1060- return 0;
1061-}
1062-
1063 static void mt7921_init_work(struct work_struct *work)
1064 {
1065- struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1066+ struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
1067 init_work);
1068 int ret;
1069
1070@@ -429,7 +182,7 @@ static void mt7921_init_work(struct work_struct *work)
1071 mt76_connac_mcu_set_deep_sleep(&dev->mt76, dev->pm.ds_enable);
1072 }
1073
1074-int mt7921_register_device(struct mt7921_dev *dev)
1075+int mt7921_register_device(struct mt792x_dev *dev)
1076 {
1077 struct ieee80211_hw *hw = mt76_hw(dev);
1078 int ret;
1079@@ -437,17 +190,17 @@ int mt7921_register_device(struct mt7921_dev *dev)
1080 dev->phy.dev = dev;
1081 dev->phy.mt76 = &dev->mt76.phy;
1082 dev->mt76.phy.priv = &dev->phy;
1083- dev->mt76.tx_worker.fn = mt7921_tx_worker;
1084+ dev->mt76.tx_worker.fn = mt792x_tx_worker;
1085
1086- INIT_DELAYED_WORK(&dev->pm.ps_work, mt7921_pm_power_save_work);
1087- INIT_WORK(&dev->pm.wake_work, mt7921_pm_wake_work);
1088+ INIT_DELAYED_WORK(&dev->pm.ps_work, mt792x_pm_power_save_work);
1089+ INIT_WORK(&dev->pm.wake_work, mt792x_pm_wake_work);
1090 spin_lock_init(&dev->pm.wake.lock);
1091 mutex_init(&dev->pm.mutex);
1092 init_waitqueue_head(&dev->pm.wait);
1093 if (mt76_is_sdio(&dev->mt76))
1094 init_waitqueue_head(&dev->mt76.sdio.wait);
1095 spin_lock_init(&dev->pm.txq_lock);
1096- INIT_DELAYED_WORK(&dev->mphy.mac_work, mt7921_mac_work);
1097+ INIT_DELAYED_WORK(&dev->mphy.mac_work, mt792x_mac_work);
1098 INIT_DELAYED_WORK(&dev->phy.scan_work, mt7921_scan_work);
1099 INIT_DELAYED_WORK(&dev->coredump.work, mt7921_coredump_work);
1100 #if IS_ENABLED(CONFIG_IPV6)
1101@@ -461,10 +214,10 @@ int mt7921_register_device(struct mt7921_dev *dev)
1102 INIT_WORK(&dev->init_work, mt7921_init_work);
1103
1104 INIT_WORK(&dev->phy.roc_work, mt7921_roc_work);
1105- timer_setup(&dev->phy.roc_timer, mt7921_roc_timer, 0);
1106+ timer_setup(&dev->phy.roc_timer, mt792x_roc_timer, 0);
1107 init_waitqueue_head(&dev->phy.roc_wait);
1108
1109- dev->pm.idle_timeout = MT7921_PM_TIMEOUT;
1110+ dev->pm.idle_timeout = MT792x_PM_TIMEOUT;
1111 dev->pm.stats.last_wake_event = jiffies;
1112 dev->pm.stats.last_doze_event = jiffies;
1113 if (!mt76_is_usb(&dev->mt76)) {
1114@@ -477,16 +230,17 @@ int mt7921_register_device(struct mt7921_dev *dev)
1115 if (!mt76_is_mmio(&dev->mt76))
1116 hw->extra_tx_headroom += MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE;
1117
1118- mt7921_init_acpi_sar(dev);
1119+ mt792x_init_acpi_sar(dev);
1120
1121- ret = mt7921_init_wcid(dev);
1122+ ret = mt792x_init_wcid(dev);
1123 if (ret)
1124 return ret;
1125
1126- ret = mt7921_init_wiphy(hw);
1127+ ret = mt792x_init_wiphy(hw);
1128 if (ret)
1129 return ret;
1130
1131+ hw->wiphy->reg_notifier = mt7921_regd_notifier;
1132 dev->mphy.sband_2g.sband.ht_cap.cap |=
1133 IEEE80211_HT_CAP_LDPC_CODING |
1134 IEEE80211_HT_CAP_MAX_AMSDU;
1135diff --git a/mt7921/mac.c b/mt7921/mac.c
1136index 368f9271..21f93745 100644
1137--- a/mt7921/mac.c
1138+++ b/mt7921/mac.c
1139@@ -15,35 +15,7 @@
1140
1141 #define MT_WTBL_AC0_CTT_OFFSET 20
1142
1143-static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset)
1144-{
1145- return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4;
1146-}
1147-
1148-static struct mt76_wcid *mt7921_rx_get_wcid(struct mt7921_dev *dev,
1149- u16 idx, bool unicast)
1150-{
1151- struct mt7921_sta *sta;
1152- struct mt76_wcid *wcid;
1153-
1154- if (idx >= ARRAY_SIZE(dev->mt76.wcid))
1155- return NULL;
1156-
1157- wcid = rcu_dereference(dev->mt76.wcid[idx]);
1158- if (unicast || !wcid)
1159- return wcid;
1160-
1161- if (!wcid->sta)
1162- return NULL;
1163-
1164- sta = container_of(wcid, struct mt7921_sta, wcid);
1165- if (!sta->vif)
1166- return NULL;
1167-
1168- return &sta->vif->sta.wcid;
1169-}
1170-
1171-bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask)
1172+bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask)
1173 {
1174 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX,
1175 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask);
1176@@ -52,7 +24,12 @@ bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask)
1177 0, 5000);
1178 }
1179
1180-static void mt7921_mac_sta_poll(struct mt7921_dev *dev)
1181+static u32 mt7921_mac_wtbl_lmac_addr(int idx, u8 offset)
1182+{
1183+ return MT_WTBL_LMAC_OFFS(idx, 0) + offset * 4;
1184+}
1185+
1186+static void mt7921_mac_sta_poll(struct mt792x_dev *dev)
1187 {
1188 static const u8 ac_to_tid[] = {
1189 [IEEE80211_AC_BE] = 0,
1190@@ -61,7 +38,7 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev)
1191 [IEEE80211_AC_VO] = 6
1192 };
1193 struct ieee80211_sta *sta;
1194- struct mt7921_sta *msta;
1195+ struct mt792x_sta *msta;
1196 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS];
1197 LIST_HEAD(sta_poll_list);
1198 struct rate_info *rate;
1199@@ -84,7 +61,7 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev)
1200 break;
1201 }
1202 msta = list_first_entry(&sta_poll_list,
1203- struct mt7921_sta, wcid.poll_list);
1204+ struct mt792x_sta, wcid.poll_list);
1205 list_del_init(&msta->wcid.poll_list);
1206 spin_unlock_bh(&dev->mt76.sta_poll_lock);
1207
1208@@ -184,54 +161,8 @@ static void mt7921_mac_sta_poll(struct mt7921_dev *dev)
1209 }
1210 }
1211
1212-static void
1213-mt7921_get_status_freq_info(struct mt7921_dev *dev, struct mt76_phy *mphy,
1214- struct mt76_rx_status *status, u8 chfreq)
1215-{
1216- if (chfreq > 180) {
1217- status->band = NL80211_BAND_6GHZ;
1218- chfreq = (chfreq - 181) * 4 + 1;
1219- } else if (chfreq > 14) {
1220- status->band = NL80211_BAND_5GHZ;
1221- } else {
1222- status->band = NL80211_BAND_2GHZ;
1223- }
1224- status->freq = ieee80211_channel_to_frequency(chfreq, status->band);
1225-}
1226-
1227-static void
1228-mt7921_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
1229-{
1230- struct sk_buff *skb = priv;
1231- struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
1232- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1233- struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
1234-
1235- if (status->signal > 0)
1236- return;
1237-
1238- if (!ether_addr_equal(vif->addr, hdr->addr1))
1239- return;
1240-
1241- ewma_rssi_add(&mvif->rssi, -status->signal);
1242-}
1243-
1244-static void
1245-mt7921_mac_assoc_rssi(struct mt7921_dev *dev, struct sk_buff *skb)
1246-{
1247- struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
1248-
1249- if (!ieee80211_is_assoc_resp(hdr->frame_control) &&
1250- !ieee80211_is_auth(hdr->frame_control))
1251- return;
1252-
1253- ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev),
1254- IEEE80211_IFACE_ITER_RESUME_ALL,
1255- mt7921_mac_rssi_iter, skb);
1256-}
1257-
1258 static int
1259-mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1260+mt7921_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb)
1261 {
1262 u32 csum_mask = MT_RXD0_NORMAL_IP_SUM | MT_RXD0_NORMAL_UDP_TCP_SUM;
1263 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
1264@@ -240,7 +171,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1265 u16 hdr_gap;
1266 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data;
1267 struct mt76_phy *mphy = &dev->mt76.phy;
1268- struct mt7921_phy *phy = &dev->phy;
1269+ struct mt792x_phy *phy = &dev->phy;
1270 struct ieee80211_supported_band *sband;
1271 u32 csum_status = *(u32 *)skb->cb;
1272 u32 rxd0 = le32_to_cpu(rxd[0]);
1273@@ -248,7 +179,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1274 u32 rxd2 = le32_to_cpu(rxd[2]);
1275 u32 rxd3 = le32_to_cpu(rxd[3]);
1276 u32 rxd4 = le32_to_cpu(rxd[4]);
1277- struct mt7921_sta *msta = NULL;
1278+ struct mt792x_sta *msta = NULL;
1279 u16 seq_ctrl = 0;
1280 __le16 fc = 0;
1281 u8 mode = 0;
1282@@ -276,10 +207,10 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1283 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3);
1284 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M;
1285 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1);
1286- status->wcid = mt7921_rx_get_wcid(dev, idx, unicast);
1287+ status->wcid = mt792x_rx_get_wcid(dev, idx, unicast);
1288
1289 if (status->wcid) {
1290- msta = container_of(status->wcid, struct mt7921_sta, wcid);
1291+ msta = container_of(status->wcid, struct mt792x_sta, wcid);
1292 spin_lock_bh(&dev->mt76.sta_poll_lock);
1293 if (list_empty(&msta->wcid.poll_list))
1294 list_add_tail(&msta->wcid.poll_list,
1295@@ -287,7 +218,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1296 spin_unlock_bh(&dev->mt76.sta_poll_lock);
1297 }
1298
1299- mt7921_get_status_freq_info(dev, mphy, status, chfreq);
1300+ mt792x_get_status_freq_info(status, chfreq);
1301
1302 switch (status->band) {
1303 case NL80211_BAND_5GHZ:
1304@@ -496,7 +427,7 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1305 status->flag |= RX_FLAG_8023;
1306 }
1307
1308- mt7921_mac_assoc_rssi(dev, skb);
1309+ mt792x_mac_assoc_rssi(dev, skb);
1310
1311 if (rxv && mode >= MT_PHY_TYPE_HE_SU && !(status->flag & RX_FLAG_8023))
1312 mt76_connac2_mac_decode_he_radiotap(&dev->mt76, skb, rxv, mode);
1313@@ -511,9 +442,9 @@ mt7921_mac_fill_rx(struct mt7921_dev *dev, struct sk_buff *skb)
1314 return 0;
1315 }
1316
1317-void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data)
1318+void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data)
1319 {
1320- struct mt7921_sta *msta = NULL;
1321+ struct mt792x_sta *msta = NULL;
1322 struct mt76_wcid *wcid;
1323 __le32 *txs_data = data;
1324 u16 wcidx;
1325@@ -528,7 +459,7 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data)
1326 if (pid < MT_PACKET_ID_FIRST)
1327 return;
1328
1329- if (wcidx >= MT7921_WTBL_SIZE)
1330+ if (wcidx >= MT792x_WTBL_SIZE)
1331 return;
1332
1333 rcu_read_lock();
1334@@ -537,7 +468,7 @@ void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data)
1335 if (!wcid)
1336 goto out;
1337
1338- msta = container_of(wcid, struct mt7921_sta, wcid);
1339+ msta = container_of(wcid, struct mt792x_sta, wcid);
1340
1341 mt76_connac2_mac_add_txs_skb(&dev->mt76, wcid, pid, txs_data);
1342 if (!wcid->sta)
1343@@ -552,7 +483,7 @@ out:
1344 rcu_read_unlock();
1345 }
1346
1347-static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len)
1348+static void mt7921_mac_tx_free(struct mt792x_dev *dev, void *data, int len)
1349 {
1350 struct mt76_connac_tx_free *free = data;
1351 __le32 *tx_info = (__le32 *)(data + sizeof(*free));
1352@@ -582,7 +513,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len)
1353 * 1'b0: msdu_id with the same 'wcid pair' as above.
1354 */
1355 if (info & MT_TX_FREE_PAIR) {
1356- struct mt7921_sta *msta;
1357+ struct mt792x_sta *msta;
1358 u16 idx;
1359
1360 count++;
1361@@ -592,7 +523,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len)
1362 if (!sta)
1363 continue;
1364
1365- msta = container_of(wcid, struct mt7921_sta, wcid);
1366+ msta = container_of(wcid, struct mt792x_sta, wcid);
1367 spin_lock_bh(&mdev->sta_poll_lock);
1368 if (list_empty(&msta->wcid.poll_list))
1369 list_add_tail(&msta->wcid.poll_list,
1370@@ -634,7 +565,7 @@ static void mt7921_mac_tx_free(struct mt7921_dev *dev, void *data, int len)
1371
1372 bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len)
1373 {
1374- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1375+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
1376 __le32 *rxd = (__le32 *)data;
1377 __le32 *end = (__le32 *)&rxd[len / 4];
1378 enum rx_pkt_type type;
1379@@ -659,7 +590,7 @@ EXPORT_SYMBOL_GPL(mt7921_rx_check);
1380 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
1381 struct sk_buff *skb, u32 *info)
1382 {
1383- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1384+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
1385 __le32 *rxd = (__le32 *)skb->data;
1386 __le32 *end = (__le32 *)&skb->data[skb->len];
1387 enum rx_pkt_type type;
1388@@ -699,128 +630,12 @@ void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
1389 }
1390 EXPORT_SYMBOL_GPL(mt7921_queue_rx_skb);
1391
1392-void mt7921_mac_reset_counters(struct mt7921_phy *phy)
1393-{
1394- struct mt7921_dev *dev = phy->dev;
1395- int i;
1396-
1397- for (i = 0; i < 4; i++) {
1398- mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1399- mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1400- }
1401-
1402- dev->mt76.phy.survey_time = ktime_get_boottime();
1403- memset(phy->mt76->aggr_stats, 0, sizeof(phy->mt76->aggr_stats));
1404-
1405- /* reset airtime counters */
1406- mt76_rr(dev, MT_MIB_SDR9(0));
1407- mt76_rr(dev, MT_MIB_SDR36(0));
1408- mt76_rr(dev, MT_MIB_SDR37(0));
1409-
1410- mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1411- mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1412-}
1413-
1414-void mt7921_mac_set_timing(struct mt7921_phy *phy)
1415-{
1416- s16 coverage_class = phy->coverage_class;
1417- struct mt7921_dev *dev = phy->dev;
1418- u32 val, reg_offset;
1419- u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |
1420- FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
1421- u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
1422- FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
1423- bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
1424- int sifs = is_2ghz ? 10 : 16, offset;
1425-
1426- if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
1427- return;
1428-
1429- mt76_set(dev, MT_ARB_SCR(0),
1430- MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1431- udelay(1);
1432-
1433- offset = 3 * coverage_class;
1434- reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |
1435- FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);
1436-
1437- mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset);
1438- mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset);
1439- mt76_wr(dev, MT_TMAC_ICR0(0),
1440- FIELD_PREP(MT_IFS_EIFS, 360) |
1441- FIELD_PREP(MT_IFS_RIFS, 2) |
1442- FIELD_PREP(MT_IFS_SIFS, sifs) |
1443- FIELD_PREP(MT_IFS_SLOT, phy->slottime));
1444-
1445- if (phy->slottime < 20 || !is_2ghz)
1446- val = MT7921_CFEND_RATE_DEFAULT;
1447- else
1448- val = MT7921_CFEND_RATE_11B;
1449-
1450- mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val);
1451- mt76_clear(dev, MT_ARB_SCR(0),
1452- MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
1453-}
1454-
1455-static u8
1456-mt7921_phy_get_nf(struct mt7921_phy *phy, int idx)
1457-{
1458- return 0;
1459-}
1460-
1461-static void
1462-mt7921_phy_update_channel(struct mt76_phy *mphy, int idx)
1463-{
1464- struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1465- struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv;
1466- struct mt76_channel_state *state;
1467- u64 busy_time, tx_time, rx_time, obss_time;
1468- int nf;
1469-
1470- busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
1471- MT_MIB_SDR9_BUSY_MASK);
1472- tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx),
1473- MT_MIB_SDR36_TXTIME_MASK);
1474- rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx),
1475- MT_MIB_SDR37_RXTIME_MASK);
1476- obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx),
1477- MT_MIB_OBSSTIME_MASK);
1478-
1479- nf = mt7921_phy_get_nf(phy, idx);
1480- if (!phy->noise)
1481- phy->noise = nf << 4;
1482- else if (nf)
1483- phy->noise += nf - (phy->noise >> 4);
1484-
1485- state = mphy->chan_state;
1486- state->cc_busy += busy_time;
1487- state->cc_tx += tx_time;
1488- state->cc_rx += rx_time + obss_time;
1489- state->cc_bss_rx += rx_time;
1490- state->noise = -(phy->noise >> 4);
1491-}
1492-
1493-void mt7921_update_channel(struct mt76_phy *mphy)
1494-{
1495- struct mt7921_dev *dev = container_of(mphy->dev, struct mt7921_dev, mt76);
1496-
1497- if (mt76_connac_pm_wake(mphy, &dev->pm))
1498- return;
1499-
1500- mt7921_phy_update_channel(mphy, 0);
1501- /* reset obss airtime */
1502- mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
1503-
1504- mt76_connac_power_save_sched(mphy, &dev->pm);
1505-}
1506-EXPORT_SYMBOL_GPL(mt7921_update_channel);
1507-
1508 static void
1509 mt7921_vif_connect_iter(void *priv, u8 *mac,
1510 struct ieee80211_vif *vif)
1511 {
1512- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1513- struct mt7921_dev *dev = mvif->phy->dev;
1514+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
1515+ struct mt792x_dev *dev = mvif->phy->dev;
1516 struct ieee80211_hw *hw = mt76_hw(dev);
1517
1518 if (vif->type == NL80211_IFTYPE_STATION)
1519@@ -841,7 +656,7 @@ mt7921_vif_connect_iter(void *priv, u8 *mac,
1520 /* system error recovery */
1521 void mt7921_mac_reset_work(struct work_struct *work)
1522 {
1523- struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1524+ struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
1525 reset_work);
1526 struct ieee80211_hw *hw = mt76_hw(dev);
1527 struct mt76_connac_pm *pm = &dev->pm;
1528@@ -857,7 +672,7 @@ void mt7921_mac_reset_work(struct work_struct *work)
1529
1530 for (i = 0; i < 10; i++) {
1531 mutex_lock(&dev->mt76.mutex);
1532- ret = mt7921_dev_reset(dev);
1533+ ret = mt792x_dev_reset(dev);
1534 mutex_unlock(&dev->mt76.mutex);
1535
1536 if (!ret)
1537@@ -884,185 +699,12 @@ void mt7921_mac_reset_work(struct work_struct *work)
1538 mt76_connac_power_save_sched(&dev->mt76.phy, pm);
1539 }
1540
1541-void mt7921_reset(struct mt76_dev *mdev)
1542-{
1543- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1544- struct mt76_connac_pm *pm = &dev->pm;
1545-
1546- if (!dev->hw_init_done)
1547- return;
1548-
1549- if (dev->hw_full_reset)
1550- return;
1551-
1552- if (pm->suspended)
1553- return;
1554-
1555- queue_work(dev->mt76.wq, &dev->reset_work);
1556-}
1557-EXPORT_SYMBOL_GPL(mt7921_reset);
1558-
1559-void mt7921_mac_update_mib_stats(struct mt7921_phy *phy)
1560-{
1561- struct mt76_mib_stats *mib = &phy->mib;
1562- struct mt7921_dev *dev = phy->dev;
1563- int i, aggr0 = 0, aggr1;
1564- u32 val;
1565-
1566- mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0),
1567- MT_MIB_SDR3_FCS_ERR_MASK);
1568- mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0),
1569- MT_MIB_ACK_FAIL_COUNT_MASK);
1570- mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0),
1571- MT_MIB_BA_FAIL_COUNT_MASK);
1572- mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0),
1573- MT_MIB_RTS_COUNT_MASK);
1574- mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0),
1575- MT_MIB_RTS_FAIL_COUNT_MASK);
1576-
1577- mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0));
1578- mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0));
1579- mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0));
1580-
1581- val = mt76_rr(dev, MT_MIB_SDR32(0));
1582- mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val);
1583- mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val);
1584-
1585- val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0));
1586- mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val);
1587- mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val);
1588-
1589- val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0));
1590- mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val);
1591- mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val);
1592- mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val);
1593- mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val);
1594-
1595- mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0));
1596- mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0));
1597- mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0));
1598- mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0));
1599-
1600- for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
1601- val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i));
1602- mib->tx_amsdu[i] += val;
1603- mib->tx_amsdu_cnt += val;
1604- }
1605-
1606- for (i = 0, aggr1 = aggr0 + 8; i < 4; i++) {
1607- u32 val2;
1608-
1609- val = mt76_rr(dev, MT_TX_AGG_CNT(0, i));
1610- val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
1611-
1612- phy->mt76->aggr_stats[aggr0++] += val & 0xffff;
1613- phy->mt76->aggr_stats[aggr0++] += val >> 16;
1614- phy->mt76->aggr_stats[aggr1++] += val2 & 0xffff;
1615- phy->mt76->aggr_stats[aggr1++] += val2 >> 16;
1616- }
1617-}
1618-
1619-void mt7921_mac_work(struct work_struct *work)
1620-{
1621- struct mt7921_phy *phy;
1622- struct mt76_phy *mphy;
1623-
1624- mphy = (struct mt76_phy *)container_of(work, struct mt76_phy,
1625- mac_work.work);
1626- phy = mphy->priv;
1627-
1628- mt7921_mutex_acquire(phy->dev);
1629-
1630- mt76_update_survey(mphy);
1631- if (++mphy->mac_work_count == 2) {
1632- mphy->mac_work_count = 0;
1633-
1634- mt7921_mac_update_mib_stats(phy);
1635- }
1636-
1637- mt7921_mutex_release(phy->dev);
1638-
1639- mt76_tx_status_check(mphy->dev, false);
1640- ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work,
1641- MT7921_WATCHDOG_TIME);
1642-}
1643-
1644-void mt7921_pm_wake_work(struct work_struct *work)
1645-{
1646- struct mt7921_dev *dev;
1647- struct mt76_phy *mphy;
1648-
1649- dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1650- pm.wake_work);
1651- mphy = dev->phy.mt76;
1652-
1653- if (!mt7921_mcu_drv_pmctrl(dev)) {
1654- struct mt76_dev *mdev = &dev->mt76;
1655- int i;
1656-
1657- if (mt76_is_sdio(mdev)) {
1658- mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1659- mt76_worker_schedule(&mdev->sdio.txrx_worker);
1660- } else {
1661- local_bh_disable();
1662- mt76_for_each_q_rx(mdev, i)
1663- napi_schedule(&mdev->napi[i]);
1664- local_bh_enable();
1665- mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
1666- mt76_connac_tx_cleanup(mdev);
1667- }
1668- if (test_bit(MT76_STATE_RUNNING, &mphy->state))
1669- ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
1670- MT7921_WATCHDOG_TIME);
1671- }
1672-
1673- ieee80211_wake_queues(mphy->hw);
1674- wake_up(&dev->pm.wait);
1675-}
1676-
1677-void mt7921_pm_power_save_work(struct work_struct *work)
1678-{
1679- struct mt7921_dev *dev;
1680- unsigned long delta;
1681- struct mt76_phy *mphy;
1682-
1683- dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1684- pm.ps_work.work);
1685- mphy = dev->phy.mt76;
1686-
1687- delta = dev->pm.idle_timeout;
1688- if (test_bit(MT76_HW_SCANNING, &mphy->state) ||
1689- test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) ||
1690- dev->fw_assert)
1691- goto out;
1692-
1693- if (mutex_is_locked(&dev->mt76.mutex))
1694- /* if mt76 mutex is held we should not put the device
1695- * to sleep since we are currently accessing device
1696- * register map. We need to wait for the next power_save
1697- * trigger.
1698- */
1699- goto out;
1700-
1701- if (time_is_after_jiffies(dev->pm.last_activity + delta)) {
1702- delta = dev->pm.last_activity + delta - jiffies;
1703- goto out;
1704- }
1705-
1706- if (!mt7921_mcu_fw_pmctrl(dev)) {
1707- cancel_delayed_work_sync(&mphy->mac_work);
1708- return;
1709- }
1710-out:
1711- queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta);
1712-}
1713-
1714 void mt7921_coredump_work(struct work_struct *work)
1715 {
1716- struct mt7921_dev *dev;
1717+ struct mt792x_dev *dev;
1718 char *dump, *data;
1719
1720- dev = (struct mt7921_dev *)container_of(work, struct mt7921_dev,
1721+ dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,
1722 coredump.work.work);
1723
1724 if (time_is_after_jiffies(dev->coredump.last_activity +
1725@@ -1101,12 +743,12 @@ void mt7921_coredump_work(struct work_struct *work)
1726 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ,
1727 GFP_KERNEL);
1728
1729- mt7921_reset(&dev->mt76);
1730+ mt792x_reset(&dev->mt76);
1731 }
1732
1733 /* usb_sdio */
1734 static void
1735-mt7921_usb_sdio_write_txwi(struct mt7921_dev *dev, struct mt76_wcid *wcid,
1736+mt7921_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid,
1737 enum mt76_txq_id qid, struct ieee80211_sta *sta,
1738 struct ieee80211_key_conf *key, int pid,
1739 struct sk_buff *skb)
1740@@ -1123,7 +765,7 @@ int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
1741 struct ieee80211_sta *sta,
1742 struct mt76_tx_info *tx_info)
1743 {
1744- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1745+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
1746 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
1747 struct ieee80211_key_conf *key = info->control.hw_key;
1748 struct sk_buff *skb = tx_info->skb;
1749@@ -1140,7 +782,7 @@ int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
1750 wcid = &dev->mt76.global_wcid;
1751
1752 if (sta) {
1753- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
1754+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
1755
1756 if (time_after(jiffies, msta->last_txs + HZ / 4)) {
1757 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
1758@@ -1189,11 +831,11 @@ EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_complete_skb);
1759
1760 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update)
1761 {
1762- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
1763+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
1764
1765- mt7921_mutex_acquire(dev);
1766+ mt792x_mutex_acquire(dev);
1767 mt7921_mac_sta_poll(dev);
1768- mt7921_mutex_release(dev);
1769+ mt792x_mutex_release(dev);
1770
1771 return false;
1772 }
1773@@ -1202,8 +844,8 @@ EXPORT_SYMBOL_GPL(mt7921_usb_sdio_tx_status_data);
1774 #if IS_ENABLED(CONFIG_IPV6)
1775 void mt7921_set_ipv6_ns_work(struct work_struct *work)
1776 {
1777- struct mt7921_dev *dev = container_of(work, struct mt7921_dev,
1778- ipv6_ns_work);
1779+ struct mt792x_dev *dev = container_of(work, struct mt792x_dev,
1780+ ipv6_ns_work);
1781 struct sk_buff *skb;
1782 int ret = 0;
1783
1784@@ -1213,10 +855,10 @@ void mt7921_set_ipv6_ns_work(struct work_struct *work)
1785 if (!skb)
1786 break;
1787
1788- mt7921_mutex_acquire(dev);
1789+ mt792x_mutex_acquire(dev);
1790 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb,
1791 MCU_UNI_CMD(OFFLOAD), true);
1792- mt7921_mutex_release(dev);
1793+ mt792x_mutex_release(dev);
1794
1795 } while (!ret);
1796
1797diff --git a/mt7921/main.c b/mt7921/main.c
1798index 87067ac3..0844d28b 100644
1799--- a/mt7921/main.c
1800+++ b/mt7921/main.c
1801@@ -10,7 +10,7 @@
1802 #include "mcu.h"
1803
1804 static int
1805-mt7921_init_he_caps(struct mt7921_phy *phy, enum nl80211_band band,
1806+mt7921_init_he_caps(struct mt792x_phy *phy, enum nl80211_band band,
1807 struct ieee80211_sband_iftype_data *data)
1808 {
1809 int i, idx = 0;
1810@@ -185,7 +185,7 @@ mt7921_init_he_caps(struct mt7921_phy *phy, enum nl80211_band band,
1811 return idx;
1812 }
1813
1814-void mt7921_set_stream_he_caps(struct mt7921_phy *phy)
1815+void mt7921_set_stream_he_caps(struct mt792x_phy *phy)
1816 {
1817 struct ieee80211_sband_iftype_data *data;
1818 struct ieee80211_supported_band *band;
1819@@ -219,7 +219,7 @@ void mt7921_set_stream_he_caps(struct mt7921_phy *phy)
1820 }
1821 }
1822
1823-int __mt7921_start(struct mt7921_phy *phy)
1824+int __mt7921_start(struct mt792x_phy *phy)
1825 {
1826 struct mt76_phy *mphy = phy->mt76;
1827 int err;
1828@@ -240,11 +240,11 @@ int __mt7921_start(struct mt7921_phy *phy)
1829 if (err)
1830 return err;
1831
1832- mt7921_mac_reset_counters(phy);
1833+ mt792x_mac_reset_counters(phy);
1834 set_bit(MT76_STATE_RUNNING, &mphy->state);
1835
1836 ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
1837- MT7921_WATCHDOG_TIME);
1838+ MT792x_WATCHDOG_TIME);
1839
1840 return 0;
1841 }
1842@@ -252,20 +252,20 @@ EXPORT_SYMBOL_GPL(__mt7921_start);
1843
1844 static int mt7921_start(struct ieee80211_hw *hw)
1845 {
1846- struct mt7921_phy *phy = mt7921_hw_phy(hw);
1847+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
1848 int err;
1849
1850- mt7921_mutex_acquire(phy->dev);
1851+ mt792x_mutex_acquire(phy->dev);
1852 err = __mt7921_start(phy);
1853- mt7921_mutex_release(phy->dev);
1854+ mt792x_mutex_release(phy->dev);
1855
1856 return err;
1857 }
1858
1859 void mt7921_stop(struct ieee80211_hw *hw)
1860 {
1861- struct mt7921_dev *dev = mt7921_hw_dev(hw);
1862- struct mt7921_phy *phy = mt7921_hw_phy(hw);
1863+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
1864+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
1865
1866 cancel_delayed_work_sync(&phy->mt76->mac_work);
1867
1868@@ -274,26 +274,26 @@ void mt7921_stop(struct ieee80211_hw *hw)
1869 cancel_work_sync(&dev->reset_work);
1870 mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);
1871
1872- mt7921_mutex_acquire(dev);
1873+ mt792x_mutex_acquire(dev);
1874 clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
1875 mt76_connac_mcu_set_mac_enable(&dev->mt76, 0, false, false);
1876- mt7921_mutex_release(dev);
1877+ mt792x_mutex_release(dev);
1878 }
1879 EXPORT_SYMBOL_GPL(mt7921_stop);
1880
1881-static int mt7921_add_interface(struct ieee80211_hw *hw,
1882- struct ieee80211_vif *vif)
1883+static int
1884+mt7921_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1885 {
1886- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1887- struct mt7921_dev *dev = mt7921_hw_dev(hw);
1888- struct mt7921_phy *phy = mt7921_hw_phy(hw);
1889+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
1890+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
1891+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
1892 struct mt76_txq *mtxq;
1893 int idx, ret = 0;
1894
1895- mt7921_mutex_acquire(dev);
1896+ mt792x_mutex_acquire(dev);
1897
1898 mvif->mt76.idx = __ffs64(~dev->mt76.vif_mask);
1899- if (mvif->mt76.idx >= MT7921_MAX_INTERFACES) {
1900+ if (mvif->mt76.idx >= MT792x_MAX_INTERFACES) {
1901 ret = -ENOSPC;
1902 goto out;
1903 }
1904@@ -311,7 +311,7 @@ static int mt7921_add_interface(struct ieee80211_hw *hw,
1905 dev->mt76.vif_mask |= BIT_ULL(mvif->mt76.idx);
1906 phy->omac_mask |= BIT_ULL(mvif->mt76.omac_idx);
1907
1908- idx = MT7921_WTBL_RESERVED - mvif->mt76.idx;
1909+ idx = MT792x_WTBL_RESERVED - mvif->mt76.idx;
1910
1911 INIT_LIST_HEAD(&mvif->sta.wcid.poll_list);
1912 mvif->sta.wcid.idx = idx;
1913@@ -333,89 +333,55 @@ static int mt7921_add_interface(struct ieee80211_hw *hw,
1914
1915 vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER;
1916 out:
1917- mt7921_mutex_release(dev);
1918+ mt792x_mutex_release(dev);
1919
1920 return ret;
1921 }
1922
1923-static void mt7921_remove_interface(struct ieee80211_hw *hw,
1924- struct ieee80211_vif *vif)
1925-{
1926- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1927- struct mt7921_sta *msta = &mvif->sta;
1928- struct mt7921_dev *dev = mt7921_hw_dev(hw);
1929- struct mt7921_phy *phy = mt7921_hw_phy(hw);
1930- int idx = msta->wcid.idx;
1931-
1932- mt7921_mutex_acquire(dev);
1933- mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid);
1934- mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, false);
1935-
1936- rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
1937-
1938- dev->mt76.vif_mask &= ~BIT_ULL(mvif->mt76.idx);
1939- phy->omac_mask &= ~BIT_ULL(mvif->mt76.omac_idx);
1940- mt7921_mutex_release(dev);
1941-
1942- spin_lock_bh(&dev->mt76.sta_poll_lock);
1943- if (!list_empty(&msta->wcid.poll_list))
1944- list_del_init(&msta->wcid.poll_list);
1945- spin_unlock_bh(&dev->mt76.sta_poll_lock);
1946-
1947- mt76_packet_id_flush(&dev->mt76, &msta->wcid);
1948-}
1949-
1950 static void mt7921_roc_iter(void *priv, u8 *mac,
1951 struct ieee80211_vif *vif)
1952 {
1953- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
1954- struct mt7921_phy *phy = priv;
1955+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
1956+ struct mt792x_phy *phy = priv;
1957
1958 mt7921_mcu_abort_roc(phy, mvif, phy->roc_token_id);
1959 }
1960
1961 void mt7921_roc_work(struct work_struct *work)
1962 {
1963- struct mt7921_phy *phy;
1964+ struct mt792x_phy *phy;
1965
1966- phy = (struct mt7921_phy *)container_of(work, struct mt7921_phy,
1967+ phy = (struct mt792x_phy *)container_of(work, struct mt792x_phy,
1968 roc_work);
1969
1970 if (!test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state))
1971 return;
1972
1973- mt7921_mutex_acquire(phy->dev);
1974+ mt792x_mutex_acquire(phy->dev);
1975 ieee80211_iterate_active_interfaces(phy->mt76->hw,
1976 IEEE80211_IFACE_ITER_RESUME_ALL,
1977 mt7921_roc_iter, phy);
1978- mt7921_mutex_release(phy->dev);
1979+ mt792x_mutex_release(phy->dev);
1980 ieee80211_remain_on_channel_expired(phy->mt76->hw);
1981 }
1982
1983-void mt7921_roc_timer(struct timer_list *timer)
1984-{
1985- struct mt7921_phy *phy = from_timer(phy, timer, roc_timer);
1986-
1987- ieee80211_queue_work(phy->mt76->hw, &phy->roc_work);
1988-}
1989-
1990-static int mt7921_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif)
1991+static int mt7921_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif)
1992 {
1993 int err = 0;
1994
1995 del_timer_sync(&phy->roc_timer);
1996 cancel_work_sync(&phy->roc_work);
1997
1998- mt7921_mutex_acquire(phy->dev);
1999+ mt792x_mutex_acquire(phy->dev);
2000 if (test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state))
2001 err = mt7921_mcu_abort_roc(phy, vif, phy->roc_token_id);
2002- mt7921_mutex_release(phy->dev);
2003+ mt792x_mutex_release(phy->dev);
2004
2005 return err;
2006 }
2007
2008-static int mt7921_set_roc(struct mt7921_phy *phy,
2009- struct mt7921_vif *vif,
2010+static int mt7921_set_roc(struct mt792x_phy *phy,
2011+ struct mt792x_vif *vif,
2012 struct ieee80211_channel *chan,
2013 int duration,
2014 enum mt7921_roc_req type)
2015@@ -450,13 +416,13 @@ static int mt7921_remain_on_channel(struct ieee80211_hw *hw,
2016 int duration,
2017 enum ieee80211_roc_type type)
2018 {
2019- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2020- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2021+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2022+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2023 int err;
2024
2025- mt7921_mutex_acquire(phy->dev);
2026+ mt792x_mutex_acquire(phy->dev);
2027 err = mt7921_set_roc(phy, mvif, chan, duration, MT7921_ROC_REQ_ROC);
2028- mt7921_mutex_release(phy->dev);
2029+ mt792x_mutex_release(phy->dev);
2030
2031 return err;
2032 }
2033@@ -464,20 +430,20 @@ static int mt7921_remain_on_channel(struct ieee80211_hw *hw,
2034 static int mt7921_cancel_remain_on_channel(struct ieee80211_hw *hw,
2035 struct ieee80211_vif *vif)
2036 {
2037- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2038- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2039+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2040+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2041
2042 return mt7921_abort_roc(phy, mvif);
2043 }
2044
2045-static int mt7921_set_channel(struct mt7921_phy *phy)
2046+static int mt7921_set_channel(struct mt792x_phy *phy)
2047 {
2048- struct mt7921_dev *dev = phy->dev;
2049+ struct mt792x_dev *dev = phy->dev;
2050 int ret;
2051
2052 cancel_delayed_work_sync(&phy->mt76->mac_work);
2053
2054- mt7921_mutex_acquire(dev);
2055+ mt792x_mutex_acquire(dev);
2056 set_bit(MT76_RESET, &phy->mt76->state);
2057
2058 mt76_set_channel(phy->mt76);
2059@@ -486,18 +452,18 @@ static int mt7921_set_channel(struct mt7921_phy *phy)
2060 if (ret)
2061 goto out;
2062
2063- mt7921_mac_set_timing(phy);
2064+ mt792x_mac_set_timeing(phy);
2065
2066- mt7921_mac_reset_counters(phy);
2067+ mt792x_mac_reset_counters(phy);
2068 phy->noise = 0;
2069
2070 out:
2071 clear_bit(MT76_RESET, &phy->mt76->state);
2072- mt7921_mutex_release(dev);
2073+ mt792x_mutex_release(dev);
2074
2075 mt76_worker_schedule(&dev->mt76.tx_worker);
2076 ieee80211_queue_delayed_work(phy->mt76->hw, &phy->mt76->mac_work,
2077- MT7921_WATCHDOG_TIME);
2078+ MT792x_WATCHDOG_TIME);
2079
2080 return ret;
2081 }
2082@@ -506,9 +472,9 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2083 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2084 struct ieee80211_key_conf *key)
2085 {
2086- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2087- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2088- struct mt7921_sta *msta = sta ? (struct mt7921_sta *)sta->drv_priv :
2089+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2090+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2091+ struct mt792x_sta *msta = sta ? (struct mt792x_sta *)sta->drv_priv :
2092 &mvif->sta;
2093 struct mt76_wcid *wcid = &msta->wcid;
2094 u8 *wcid_keyidx = &wcid->hw_key_idx;
2095@@ -546,7 +512,7 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2096 return -EOPNOTSUPP;
2097 }
2098
2099- mt7921_mutex_acquire(dev);
2100+ mt792x_mutex_acquire(dev);
2101
2102 if (cmd == SET_KEY) {
2103 *wcid_keyidx = idx;
2104@@ -570,7 +536,7 @@ static int mt7921_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2105 key, MCU_UNI_CMD(STA_REC_UPDATE),
2106 &mvif->wep_sta->wcid, cmd);
2107 out:
2108- mt7921_mutex_release(dev);
2109+ mt792x_mutex_release(dev);
2110
2111 return err;
2112 }
2113@@ -578,7 +544,7 @@ out:
2114 static void
2115 mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
2116 {
2117- struct mt7921_dev *dev = priv;
2118+ struct mt792x_dev *dev = priv;
2119 struct ieee80211_hw *hw = mt76_hw(dev);
2120 bool pm_enable = dev->pm.enable;
2121 int err;
2122@@ -599,7 +565,7 @@ mt7921_pm_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
2123 static void
2124 mt7921_sniffer_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
2125 {
2126- struct mt7921_dev *dev = priv;
2127+ struct mt792x_dev *dev = priv;
2128 struct ieee80211_hw *hw = mt76_hw(dev);
2129 struct mt76_connac_pm *pm = &dev->pm;
2130 bool monitor = !!(hw->conf.flags & IEEE80211_CONF_MONITOR);
2131@@ -614,7 +580,7 @@ mt7921_sniffer_interface_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
2132 mt7921_mcu_set_beacon_filter(dev, vif, false);
2133 }
2134
2135-void mt7921_set_runtime_pm(struct mt7921_dev *dev)
2136+void mt7921_set_runtime_pm(struct mt792x_dev *dev)
2137 {
2138 struct ieee80211_hw *hw = mt76_hw(dev);
2139 struct mt76_connac_pm *pm = &dev->pm;
2140@@ -630,8 +596,8 @@ void mt7921_set_runtime_pm(struct mt7921_dev *dev)
2141
2142 static int mt7921_config(struct ieee80211_hw *hw, u32 changed)
2143 {
2144- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2145- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2146+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2147+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2148 int ret = 0;
2149
2150 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
2151@@ -642,7 +608,7 @@ static int mt7921_config(struct ieee80211_hw *hw, u32 changed)
2152 ieee80211_wake_queues(hw);
2153 }
2154
2155- mt7921_mutex_acquire(dev);
2156+ mt792x_mutex_acquire(dev);
2157
2158 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2159 ret = mt7921_set_tx_sar_pwr(hw, NULL);
2160@@ -657,25 +623,11 @@ static int mt7921_config(struct ieee80211_hw *hw, u32 changed)
2161 }
2162
2163 out:
2164- mt7921_mutex_release(dev);
2165+ mt792x_mutex_release(dev);
2166
2167 return ret;
2168 }
2169
2170-static int
2171-mt7921_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2172- unsigned int link_id, u16 queue,
2173- const struct ieee80211_tx_queue_params *params)
2174-{
2175- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2176-
2177- /* no need to update right away, we'll get BSS_CHANGED_QOS */
2178- queue = mt76_connac_lmac_mapping(queue);
2179- mvif->queue_params[queue] = *params;
2180-
2181- return 0;
2182-}
2183-
2184 static void mt7921_configure_filter(struct ieee80211_hw *hw,
2185 unsigned int changed_flags,
2186 unsigned int *total_flags,
2187@@ -686,7 +638,7 @@ static void mt7921_configure_filter(struct ieee80211_hw *hw,
2188 #define MT7921_FILTER_OTHER_BSS BIT(6)
2189 #define MT7921_FILTER_ENABLE BIT(31)
2190
2191- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2192+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2193 u32 flags = MT7921_FILTER_ENABLE;
2194
2195 #define MT7921_FILTER(_fif, _type) do { \
2196@@ -698,9 +650,9 @@ static void mt7921_configure_filter(struct ieee80211_hw *hw,
2197 MT7921_FILTER(FIF_CONTROL, CONTROL);
2198 MT7921_FILTER(FIF_OTHER_BSS, OTHER_BSS);
2199
2200- mt7921_mutex_acquire(dev);
2201+ mt792x_mutex_acquire(dev);
2202 mt7921_mcu_set_rxfilter(dev, flags, 0, 0);
2203- mt7921_mutex_release(dev);
2204+ mt792x_mutex_release(dev);
2205
2206 *total_flags &= (FIF_OTHER_BSS | FIF_FCSFAIL | FIF_CONTROL);
2207 }
2208@@ -710,17 +662,17 @@ static void mt7921_bss_info_changed(struct ieee80211_hw *hw,
2209 struct ieee80211_bss_conf *info,
2210 u64 changed)
2211 {
2212- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2213- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2214+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2215+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2216
2217- mt7921_mutex_acquire(dev);
2218+ mt792x_mutex_acquire(dev);
2219
2220 if (changed & BSS_CHANGED_ERP_SLOT) {
2221 int slottime = info->use_short_slot ? 9 : 20;
2222
2223 if (slottime != phy->slottime) {
2224 phy->slottime = slottime;
2225- mt7921_mac_set_timing(phy);
2226+ mt792x_mac_set_timeing(phy);
2227 }
2228 }
2229
2230@@ -743,24 +695,24 @@ static void mt7921_bss_info_changed(struct ieee80211_hw *hw,
2231 }
2232
2233 if (changed & BSS_CHANGED_ARP_FILTER) {
2234- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2235+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2236
2237 mt76_connac_mcu_update_arp_filter(&dev->mt76, &mvif->mt76,
2238 info);
2239 }
2240
2241- mt7921_mutex_release(dev);
2242+ mt792x_mutex_release(dev);
2243 }
2244
2245 int mt7921_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2246 struct ieee80211_sta *sta)
2247 {
2248- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
2249- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2250- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2251+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
2252+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
2253+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2254 int ret, idx;
2255
2256- idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7921_WTBL_STA - 1);
2257+ idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT792x_WTBL_STA - 1);
2258 if (idx < 0)
2259 return -ENOSPC;
2260
2261@@ -796,11 +748,11 @@ EXPORT_SYMBOL_GPL(mt7921_mac_sta_add);
2262 void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2263 struct ieee80211_sta *sta)
2264 {
2265- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
2266- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2267- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2268+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
2269+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
2270+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2271
2272- mt7921_mutex_acquire(dev);
2273+ mt792x_mutex_acquire(dev);
2274
2275 if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls)
2276 mt76_connac_mcu_uni_add_bss(&dev->mphy, vif, &mvif->sta.wcid,
2277@@ -814,15 +766,15 @@ void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2278
2279 mt7921_mcu_sta_update(dev, sta, vif, true, MT76_STA_INFO_STATE_ASSOC);
2280
2281- mt7921_mutex_release(dev);
2282+ mt792x_mutex_release(dev);
2283 }
2284 EXPORT_SYMBOL_GPL(mt7921_mac_sta_assoc);
2285
2286 void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2287 struct ieee80211_sta *sta)
2288 {
2289- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
2290- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2291+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
2292+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
2293
2294 mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid);
2295 mt76_connac_pm_wake(&dev->mphy, &dev->pm);
2296@@ -832,7 +784,7 @@ void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2297 MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
2298
2299 if (vif->type == NL80211_IFTYPE_STATION) {
2300- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2301+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2302
2303 mvif->wep_sta = NULL;
2304 ewma_rssi_init(&mvif->rssi);
2305@@ -851,67 +803,13 @@ void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
2306 }
2307 EXPORT_SYMBOL_GPL(mt7921_mac_sta_remove);
2308
2309-void mt7921_tx_worker(struct mt76_worker *w)
2310-{
2311- struct mt7921_dev *dev = container_of(w, struct mt7921_dev,
2312- mt76.tx_worker);
2313-
2314- if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
2315- queue_work(dev->mt76.wq, &dev->pm.wake_work);
2316- return;
2317- }
2318-
2319- mt76_txq_schedule_all(&dev->mphy);
2320- mt76_connac_pm_unref(&dev->mphy, &dev->pm);
2321-}
2322-
2323-static void mt7921_tx(struct ieee80211_hw *hw,
2324- struct ieee80211_tx_control *control,
2325- struct sk_buff *skb)
2326-{
2327- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2328- struct mt76_phy *mphy = hw->priv;
2329- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2330- struct ieee80211_vif *vif = info->control.vif;
2331- struct mt76_wcid *wcid = &dev->mt76.global_wcid;
2332- int qid;
2333-
2334- if (control->sta) {
2335- struct mt7921_sta *sta;
2336-
2337- sta = (struct mt7921_sta *)control->sta->drv_priv;
2338- wcid = &sta->wcid;
2339- }
2340-
2341- if (vif && !control->sta) {
2342- struct mt7921_vif *mvif;
2343-
2344- mvif = (struct mt7921_vif *)vif->drv_priv;
2345- wcid = &mvif->sta.wcid;
2346- }
2347-
2348- if (mt76_connac_pm_ref(mphy, &dev->pm)) {
2349- mt76_tx(mphy, control->sta, wcid, skb);
2350- mt76_connac_pm_unref(mphy, &dev->pm);
2351- return;
2352- }
2353-
2354- qid = skb_get_queue_mapping(skb);
2355- if (qid >= MT_TXQ_PSD) {
2356- qid = IEEE80211_AC_BE;
2357- skb_set_queue_mapping(skb, qid);
2358- }
2359-
2360- mt76_connac_pm_queue_skb(hw, &dev->pm, wcid, skb);
2361-}
2362-
2363 static int mt7921_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
2364 {
2365- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2366+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2367
2368- mt7921_mutex_acquire(dev);
2369+ mt792x_mutex_acquire(dev);
2370 mt76_connac_mcu_set_rts_thresh(&dev->mt76, val, 0);
2371- mt7921_mutex_release(dev);
2372+ mt792x_mutex_release(dev);
2373
2374 return 0;
2375 }
2376@@ -921,10 +819,10 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2377 struct ieee80211_ampdu_params *params)
2378 {
2379 enum ieee80211_ampdu_mlme_action action = params->action;
2380- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2381+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2382 struct ieee80211_sta *sta = params->sta;
2383 struct ieee80211_txq *txq = sta->txq[params->tid];
2384- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2385+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
2386 u16 tid = params->tid;
2387 u16 ssn = params->ssn;
2388 struct mt76_txq *mtxq;
2389@@ -935,7 +833,7 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2390
2391 mtxq = (struct mt76_txq *)txq->drv_priv;
2392
2393- mt7921_mutex_acquire(dev);
2394+ mt792x_mutex_acquire(dev);
2395 switch (action) {
2396 case IEEE80211_AMPDU_RX_START:
2397 mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
2398@@ -968,7 +866,7 @@ mt7921_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2399 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2400 break;
2401 }
2402- mt7921_mutex_release(dev);
2403+ mt792x_mutex_release(dev);
2404
2405 return ret;
2406 }
2407@@ -979,293 +877,22 @@ static int mt7921_sta_state(struct ieee80211_hw *hw,
2408 enum ieee80211_sta_state old_state,
2409 enum ieee80211_sta_state new_state)
2410 {
2411- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2412+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2413
2414 if (dev->pm.ds_enable) {
2415- mt7921_mutex_acquire(dev);
2416+ mt792x_mutex_acquire(dev);
2417 mt76_connac_sta_state_dp(&dev->mt76, old_state, new_state);
2418- mt7921_mutex_release(dev);
2419+ mt792x_mutex_release(dev);
2420 }
2421
2422 return mt76_sta_state(hw, vif, sta, old_state, new_state);
2423 }
2424
2425-static int
2426-mt7921_get_stats(struct ieee80211_hw *hw,
2427- struct ieee80211_low_level_stats *stats)
2428-{
2429- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2430- struct mt76_mib_stats *mib = &phy->mib;
2431-
2432- mt7921_mutex_acquire(phy->dev);
2433-
2434- stats->dot11RTSSuccessCount = mib->rts_cnt;
2435- stats->dot11RTSFailureCount = mib->rts_retries_cnt;
2436- stats->dot11FCSErrorCount = mib->fcs_err_cnt;
2437- stats->dot11ACKFailureCount = mib->ack_fail_cnt;
2438-
2439- mt7921_mutex_release(phy->dev);
2440-
2441- return 0;
2442-}
2443-
2444-static const char mt7921_gstrings_stats[][ETH_GSTRING_LEN] = {
2445- /* tx counters */
2446- "tx_ampdu_cnt",
2447- "tx_mpdu_attempts",
2448- "tx_mpdu_success",
2449- "tx_pkt_ebf_cnt",
2450- "tx_pkt_ibf_cnt",
2451- "tx_ampdu_len:0-1",
2452- "tx_ampdu_len:2-10",
2453- "tx_ampdu_len:11-19",
2454- "tx_ampdu_len:20-28",
2455- "tx_ampdu_len:29-37",
2456- "tx_ampdu_len:38-46",
2457- "tx_ampdu_len:47-55",
2458- "tx_ampdu_len:56-79",
2459- "tx_ampdu_len:80-103",
2460- "tx_ampdu_len:104-127",
2461- "tx_ampdu_len:128-151",
2462- "tx_ampdu_len:152-175",
2463- "tx_ampdu_len:176-199",
2464- "tx_ampdu_len:200-223",
2465- "tx_ampdu_len:224-247",
2466- "ba_miss_count",
2467- "tx_beamformer_ppdu_iBF",
2468- "tx_beamformer_ppdu_eBF",
2469- "tx_beamformer_rx_feedback_all",
2470- "tx_beamformer_rx_feedback_he",
2471- "tx_beamformer_rx_feedback_vht",
2472- "tx_beamformer_rx_feedback_ht",
2473- "tx_msdu_pack_1",
2474- "tx_msdu_pack_2",
2475- "tx_msdu_pack_3",
2476- "tx_msdu_pack_4",
2477- "tx_msdu_pack_5",
2478- "tx_msdu_pack_6",
2479- "tx_msdu_pack_7",
2480- "tx_msdu_pack_8",
2481- /* rx counters */
2482- "rx_mpdu_cnt",
2483- "rx_ampdu_cnt",
2484- "rx_ampdu_bytes_cnt",
2485- "rx_ba_cnt",
2486- /* per vif counters */
2487- "v_tx_mode_cck",
2488- "v_tx_mode_ofdm",
2489- "v_tx_mode_ht",
2490- "v_tx_mode_ht_gf",
2491- "v_tx_mode_vht",
2492- "v_tx_mode_he_su",
2493- "v_tx_mode_he_ext_su",
2494- "v_tx_mode_he_tb",
2495- "v_tx_mode_he_mu",
2496- "v_tx_bw_20",
2497- "v_tx_bw_40",
2498- "v_tx_bw_80",
2499- "v_tx_bw_160",
2500- "v_tx_mcs_0",
2501- "v_tx_mcs_1",
2502- "v_tx_mcs_2",
2503- "v_tx_mcs_3",
2504- "v_tx_mcs_4",
2505- "v_tx_mcs_5",
2506- "v_tx_mcs_6",
2507- "v_tx_mcs_7",
2508- "v_tx_mcs_8",
2509- "v_tx_mcs_9",
2510- "v_tx_mcs_10",
2511- "v_tx_mcs_11",
2512- "v_tx_nss_1",
2513- "v_tx_nss_2",
2514- "v_tx_nss_3",
2515- "v_tx_nss_4",
2516-};
2517-
2518-static void
2519-mt7921_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2520- u32 sset, u8 *data)
2521-{
2522- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2523-
2524- if (sset != ETH_SS_STATS)
2525- return;
2526-
2527- memcpy(data, *mt7921_gstrings_stats, sizeof(mt7921_gstrings_stats));
2528-
2529- if (mt76_is_sdio(&dev->mt76))
2530- return;
2531-
2532- data += sizeof(mt7921_gstrings_stats);
2533- page_pool_ethtool_stats_get_strings(data);
2534-}
2535-
2536-static int
2537-mt7921_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2538- int sset)
2539-{
2540- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2541-
2542- if (sset != ETH_SS_STATS)
2543- return 0;
2544-
2545- if (mt76_is_sdio(&dev->mt76))
2546- return ARRAY_SIZE(mt7921_gstrings_stats);
2547-
2548- return ARRAY_SIZE(mt7921_gstrings_stats) +
2549- page_pool_ethtool_stats_get_count();
2550-}
2551-
2552-static void
2553-mt7921_ethtool_worker(void *wi_data, struct ieee80211_sta *sta)
2554-{
2555- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2556- struct mt76_ethtool_worker_info *wi = wi_data;
2557-
2558- if (msta->vif->mt76.idx != wi->idx)
2559- return;
2560-
2561- mt76_ethtool_worker(wi, &msta->wcid.stats, false);
2562-}
2563-
2564-static
2565-void mt7921_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2566- struct ethtool_stats *stats, u64 *data)
2567-{
2568- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2569- int stats_size = ARRAY_SIZE(mt7921_gstrings_stats);
2570- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2571- struct mt7921_dev *dev = phy->dev;
2572- struct mt76_mib_stats *mib = &phy->mib;
2573- struct mt76_ethtool_worker_info wi = {
2574- .data = data,
2575- .idx = mvif->mt76.idx,
2576- };
2577- int i, ei = 0;
2578-
2579- mt7921_mutex_acquire(dev);
2580-
2581- mt7921_mac_update_mib_stats(phy);
2582-
2583- data[ei++] = mib->tx_ampdu_cnt;
2584- data[ei++] = mib->tx_mpdu_attempts_cnt;
2585- data[ei++] = mib->tx_mpdu_success_cnt;
2586- data[ei++] = mib->tx_pkt_ebf_cnt;
2587- data[ei++] = mib->tx_pkt_ibf_cnt;
2588-
2589- /* Tx ampdu stat */
2590- for (i = 0; i < 15; i++)
2591- data[ei++] = phy->mt76->aggr_stats[i];
2592-
2593- data[ei++] = phy->mib.ba_miss_cnt;
2594-
2595- /* Tx Beamformer monitor */
2596- data[ei++] = mib->tx_bf_ibf_ppdu_cnt;
2597- data[ei++] = mib->tx_bf_ebf_ppdu_cnt;
2598-
2599- /* Tx Beamformer Rx feedback monitor */
2600- data[ei++] = mib->tx_bf_rx_fb_all_cnt;
2601- data[ei++] = mib->tx_bf_rx_fb_he_cnt;
2602- data[ei++] = mib->tx_bf_rx_fb_vht_cnt;
2603- data[ei++] = mib->tx_bf_rx_fb_ht_cnt;
2604-
2605- /* Tx amsdu info (pack-count histogram) */
2606- for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++)
2607- data[ei++] = mib->tx_amsdu[i];
2608-
2609- /* rx counters */
2610- data[ei++] = mib->rx_mpdu_cnt;
2611- data[ei++] = mib->rx_ampdu_cnt;
2612- data[ei++] = mib->rx_ampdu_bytes_cnt;
2613- data[ei++] = mib->rx_ba_cnt;
2614-
2615- /* Add values for all stations owned by this vif */
2616- wi.initial_stat_idx = ei;
2617- ieee80211_iterate_stations_atomic(hw, mt7921_ethtool_worker, &wi);
2618-
2619- mt7921_mutex_release(dev);
2620-
2621- if (!wi.sta_count)
2622- return;
2623-
2624- ei += wi.worker_stat_count;
2625-
2626- if (!mt76_is_sdio(&dev->mt76)) {
2627- mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei);
2628- stats_size += page_pool_ethtool_stats_get_count();
2629- }
2630-
2631- if (ei != stats_size)
2632- dev_err(dev->mt76.dev, "ei: %d SSTATS_LEN: %d", ei, stats_size);
2633-}
2634-
2635-static u64
2636-mt7921_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2637-{
2638- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2639- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2640- u8 omac_idx = mvif->mt76.omac_idx;
2641- union {
2642- u64 t64;
2643- u32 t32[2];
2644- } tsf;
2645- u16 n;
2646-
2647- mt7921_mutex_acquire(dev);
2648-
2649- n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx;
2650- /* TSF software read */
2651- mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_MODE);
2652- tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0(0));
2653- tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1(0));
2654-
2655- mt7921_mutex_release(dev);
2656-
2657- return tsf.t64;
2658-}
2659-
2660-static void
2661-mt7921_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2662- u64 timestamp)
2663-{
2664- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2665- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2666- u8 omac_idx = mvif->mt76.omac_idx;
2667- union {
2668- u64 t64;
2669- u32 t32[2];
2670- } tsf = { .t64 = timestamp, };
2671- u16 n;
2672-
2673- mt7921_mutex_acquire(dev);
2674-
2675- n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx;
2676- mt76_wr(dev, MT_LPON_UTTR0(0), tsf.t32[0]);
2677- mt76_wr(dev, MT_LPON_UTTR1(0), tsf.t32[1]);
2678- /* TSF software overwrite */
2679- mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_WRITE);
2680-
2681- mt7921_mutex_release(dev);
2682-}
2683-
2684-static void
2685-mt7921_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
2686-{
2687- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2688- struct mt7921_dev *dev = phy->dev;
2689-
2690- mt7921_mutex_acquire(dev);
2691- phy->coverage_class = max_t(s16, coverage_class, 0);
2692- mt7921_mac_set_timing(phy);
2693- mt7921_mutex_release(dev);
2694-}
2695-
2696 void mt7921_scan_work(struct work_struct *work)
2697 {
2698- struct mt7921_phy *phy;
2699+ struct mt792x_phy *phy;
2700
2701- phy = (struct mt7921_phy *)container_of(work, struct mt7921_phy,
2702+ phy = (struct mt792x_phy *)container_of(work, struct mt792x_phy,
2703 scan_work.work);
2704
2705 while (true) {
2706@@ -1298,13 +925,13 @@ static int
2707 mt7921_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2708 struct ieee80211_scan_request *req)
2709 {
2710- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2711+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2712 struct mt76_phy *mphy = hw->priv;
2713 int err;
2714
2715- mt7921_mutex_acquire(dev);
2716+ mt792x_mutex_acquire(dev);
2717 err = mt76_connac_mcu_hw_scan(mphy, vif, req);
2718- mt7921_mutex_release(dev);
2719+ mt792x_mutex_release(dev);
2720
2721 return err;
2722 }
2723@@ -1312,12 +939,12 @@ mt7921_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2724 static void
2725 mt7921_cancel_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2726 {
2727- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2728+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2729 struct mt76_phy *mphy = hw->priv;
2730
2731- mt7921_mutex_acquire(dev);
2732+ mt792x_mutex_acquire(dev);
2733 mt76_connac_mcu_cancel_hw_scan(mphy, vif);
2734- mt7921_mutex_release(dev);
2735+ mt792x_mutex_release(dev);
2736 }
2737
2738 static int
2739@@ -1325,11 +952,11 @@ mt7921_start_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2740 struct cfg80211_sched_scan_request *req,
2741 struct ieee80211_scan_ies *ies)
2742 {
2743- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2744+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2745 struct mt76_phy *mphy = hw->priv;
2746 int err;
2747
2748- mt7921_mutex_acquire(dev);
2749+ mt792x_mutex_acquire(dev);
2750
2751 err = mt76_connac_mcu_sched_scan_req(mphy, vif, req);
2752 if (err < 0)
2753@@ -1337,7 +964,7 @@ mt7921_start_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2754
2755 err = mt76_connac_mcu_sched_scan_enable(mphy, vif, true);
2756 out:
2757- mt7921_mutex_release(dev);
2758+ mt792x_mutex_release(dev);
2759
2760 return err;
2761 }
2762@@ -1345,13 +972,13 @@ out:
2763 static int
2764 mt7921_stop_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2765 {
2766- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2767+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2768 struct mt76_phy *mphy = hw->priv;
2769 int err;
2770
2771- mt7921_mutex_acquire(dev);
2772+ mt792x_mutex_acquire(dev);
2773 err = mt76_connac_mcu_sched_scan_enable(mphy, vif, false);
2774- mt7921_mutex_release(dev);
2775+ mt792x_mutex_release(dev);
2776
2777 return err;
2778 }
2779@@ -1359,8 +986,8 @@ mt7921_stop_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
2780 static int
2781 mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2782 {
2783- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2784- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2785+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2786+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2787 int max_nss = hweight8(hw->wiphy->available_antennas_tx);
2788
2789 if (!tx_ant || tx_ant != rx_ant || ffs(tx_ant) > max_nss)
2790@@ -1369,7 +996,7 @@ mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2791 if ((BIT(hweight8(tx_ant)) - 1) != tx_ant)
2792 return -EINVAL;
2793
2794- mt7921_mutex_acquire(dev);
2795+ mt792x_mutex_acquire(dev);
2796
2797 phy->mt76->antenna_mask = tx_ant;
2798 phy->mt76->chainmask = tx_ant;
2799@@ -1377,54 +1004,17 @@ mt7921_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2800 mt76_set_stream_caps(phy->mt76, true);
2801 mt7921_set_stream_he_caps(phy);
2802
2803- mt7921_mutex_release(dev);
2804+ mt792x_mutex_release(dev);
2805
2806 return 0;
2807 }
2808
2809-static void mt7921_sta_statistics(struct ieee80211_hw *hw,
2810- struct ieee80211_vif *vif,
2811- struct ieee80211_sta *sta,
2812- struct station_info *sinfo)
2813-{
2814- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2815- struct rate_info *txrate = &msta->wcid.rate;
2816-
2817- if (!txrate->legacy && !txrate->flags)
2818- return;
2819-
2820- if (txrate->legacy) {
2821- sinfo->txrate.legacy = txrate->legacy;
2822- } else {
2823- sinfo->txrate.mcs = txrate->mcs;
2824- sinfo->txrate.nss = txrate->nss;
2825- sinfo->txrate.bw = txrate->bw;
2826- sinfo->txrate.he_gi = txrate->he_gi;
2827- sinfo->txrate.he_dcm = txrate->he_dcm;
2828- sinfo->txrate.he_ru_alloc = txrate->he_ru_alloc;
2829- }
2830- sinfo->tx_failed = msta->wcid.stats.tx_failed;
2831- sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED);
2832-
2833- sinfo->tx_retries = msta->wcid.stats.tx_retries;
2834- sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES);
2835-
2836- sinfo->txrate.flags = txrate->flags;
2837- sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
2838-
2839- sinfo->ack_signal = (s8)msta->ack_signal;
2840- sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL);
2841-
2842- sinfo->avg_ack_signal = -(s8)ewma_avg_signal_read(&msta->avg_ack_signal);
2843- sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG);
2844-}
2845-
2846 #ifdef CONFIG_PM
2847 static int mt7921_suspend(struct ieee80211_hw *hw,
2848 struct cfg80211_wowlan *wowlan)
2849 {
2850- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2851- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2852+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2853+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2854
2855 cancel_delayed_work_sync(&phy->scan_work);
2856 cancel_delayed_work_sync(&phy->mt76->mac_work);
2857@@ -1432,7 +1022,7 @@ static int mt7921_suspend(struct ieee80211_hw *hw,
2858 cancel_delayed_work_sync(&dev->pm.ps_work);
2859 mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);
2860
2861- mt7921_mutex_acquire(dev);
2862+ mt792x_mutex_acquire(dev);
2863
2864 clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
2865 ieee80211_iterate_active_interfaces(hw,
2866@@ -1440,17 +1030,17 @@ static int mt7921_suspend(struct ieee80211_hw *hw,
2867 mt7921_mcu_set_suspend_iter,
2868 &dev->mphy);
2869
2870- mt7921_mutex_release(dev);
2871+ mt792x_mutex_release(dev);
2872
2873 return 0;
2874 }
2875
2876 static int mt7921_resume(struct ieee80211_hw *hw)
2877 {
2878- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2879- struct mt7921_phy *phy = mt7921_hw_phy(hw);
2880+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2881+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
2882
2883- mt7921_mutex_acquire(dev);
2884+ mt792x_mutex_acquire(dev);
2885
2886 set_bit(MT76_STATE_RUNNING, &phy->mt76->state);
2887 ieee80211_iterate_active_interfaces(hw,
2888@@ -1459,51 +1049,34 @@ static int mt7921_resume(struct ieee80211_hw *hw)
2889 &dev->mphy);
2890
2891 ieee80211_queue_delayed_work(hw, &phy->mt76->mac_work,
2892- MT7921_WATCHDOG_TIME);
2893+ MT792x_WATCHDOG_TIME);
2894
2895- mt7921_mutex_release(dev);
2896+ mt792x_mutex_release(dev);
2897
2898 return 0;
2899 }
2900
2901-static void mt7921_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2902-{
2903- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2904- struct mt76_dev *mdev = &dev->mt76;
2905-
2906- device_set_wakeup_enable(mdev->dev, enabled);
2907-}
2908-
2909 static void mt7921_set_rekey_data(struct ieee80211_hw *hw,
2910 struct ieee80211_vif *vif,
2911 struct cfg80211_gtk_rekey_data *data)
2912 {
2913- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2914+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2915
2916- mt7921_mutex_acquire(dev);
2917+ mt792x_mutex_acquire(dev);
2918 mt76_connac_mcu_update_gtk_rekey(hw, vif, data);
2919- mt7921_mutex_release(dev);
2920+ mt792x_mutex_release(dev);
2921 }
2922 #endif /* CONFIG_PM */
2923
2924-static void mt7921_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2925- u32 queues, bool drop)
2926-{
2927- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2928-
2929- wait_event_timeout(dev->mt76.tx_wait, !mt76_has_tx_pending(&dev->mphy),
2930- HZ / 2);
2931-}
2932-
2933 static void mt7921_sta_set_decap_offload(struct ieee80211_hw *hw,
2934 struct ieee80211_vif *vif,
2935 struct ieee80211_sta *sta,
2936 bool enabled)
2937 {
2938- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
2939- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2940+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
2941+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2942
2943- mt7921_mutex_acquire(dev);
2944+ mt792x_mutex_acquire(dev);
2945
2946 if (enabled)
2947 set_bit(MT_WCID_FLAG_HDR_TRANS, &msta->wcid.flags);
2948@@ -1513,7 +1086,7 @@ static void mt7921_sta_set_decap_offload(struct ieee80211_hw *hw,
2949 mt76_connac_mcu_sta_update_hdr_trans(&dev->mt76, vif, &msta->wcid,
2950 MCU_UNI_CMD(STA_REC_UPDATE));
2951
2952- mt7921_mutex_release(dev);
2953+ mt792x_mutex_release(dev);
2954 }
2955
2956 #if IS_ENABLED(CONFIG_IPV6)
2957@@ -1521,8 +1094,8 @@ static void mt7921_ipv6_addr_change(struct ieee80211_hw *hw,
2958 struct ieee80211_vif *vif,
2959 struct inet6_dev *idev)
2960 {
2961- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
2962- struct mt7921_dev *dev = mvif->phy->dev;
2963+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
2964+ struct mt792x_dev *dev = mvif->phy->dev;
2965 struct inet6_ifaddr *ifa;
2966 struct in6_addr ns_addrs[IEEE80211_BSS_ARP_ADDR_LIST_LEN];
2967 struct sk_buff *skb;
2968@@ -1580,28 +1153,25 @@ int mt7921_set_tx_sar_pwr(struct ieee80211_hw *hw,
2969 const struct cfg80211_sar_specs *sar)
2970 {
2971 struct mt76_phy *mphy = hw->priv;
2972- int err;
2973
2974 if (sar) {
2975- err = mt76_init_sar_power(hw, sar);
2976+ int err = mt76_init_sar_power(hw, sar);
2977+
2978 if (err)
2979 return err;
2980 }
2981+ mt792x_init_acpi_sar_power(mt792x_hw_phy(hw), !sar);
2982
2983- mt7921_init_acpi_sar_power(mt7921_hw_phy(hw), !sar);
2984-
2985- err = mt76_connac_mcu_set_rate_txpower(mphy);
2986-
2987- return err;
2988+ return mt76_connac_mcu_set_rate_txpower(mphy);
2989 }
2990
2991 static int mt7921_set_sar_specs(struct ieee80211_hw *hw,
2992 const struct cfg80211_sar_specs *sar)
2993 {
2994- struct mt7921_dev *dev = mt7921_hw_dev(hw);
2995+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
2996 int err;
2997
2998- mt7921_mutex_acquire(dev);
2999+ mt792x_mutex_acquire(dev);
3000 err = mt7921_mcu_set_clc(dev, dev->mt76.alpha2,
3001 dev->country_ie_env);
3002 if (err < 0)
3003@@ -1609,7 +1179,7 @@ static int mt7921_set_sar_specs(struct ieee80211_hw *hw,
3004
3005 err = mt7921_set_tx_sar_pwr(hw, sar);
3006 out:
3007- mt7921_mutex_release(dev);
3008+ mt792x_mutex_release(dev);
3009
3010 return err;
3011 }
3012@@ -1619,23 +1189,23 @@ mt7921_channel_switch_beacon(struct ieee80211_hw *hw,
3013 struct ieee80211_vif *vif,
3014 struct cfg80211_chan_def *chandef)
3015 {
3016- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3017+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
3018
3019- mt7921_mutex_acquire(dev);
3020+ mt792x_mutex_acquire(dev);
3021 mt7921_mcu_uni_add_beacon_offload(dev, hw, vif, true);
3022- mt7921_mutex_release(dev);
3023+ mt792x_mutex_release(dev);
3024 }
3025
3026 static int
3027 mt7921_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3028 struct ieee80211_bss_conf *link_conf)
3029 {
3030- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3031- struct mt7921_phy *phy = mt7921_hw_phy(hw);
3032- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3033+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3034+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
3035+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
3036 int err;
3037
3038- mt7921_mutex_acquire(dev);
3039+ mt792x_mutex_acquire(dev);
3040
3041 err = mt76_connac_mcu_uni_add_bss(phy->mt76, vif, &mvif->sta.wcid,
3042 true, mvif->ctx);
3043@@ -1649,7 +1219,7 @@ mt7921_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3044 err = mt7921_mcu_sta_update(dev, NULL, vif, true,
3045 MT76_STA_INFO_STATE_NONE);
3046 out:
3047- mt7921_mutex_release(dev);
3048+ mt792x_mutex_release(dev);
3049
3050 return err;
3051 }
3052@@ -1658,12 +1228,12 @@ static void
3053 mt7921_stop_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3054 struct ieee80211_bss_conf *link_conf)
3055 {
3056- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3057- struct mt7921_phy *phy = mt7921_hw_phy(hw);
3058- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3059+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3060+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
3061+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
3062 int err;
3063
3064- mt7921_mutex_acquire(dev);
3065+ mt792x_mutex_acquire(dev);
3066
3067 err = mt7921_mcu_set_bss_pm(dev, vif, false);
3068 if (err)
3069@@ -1673,7 +1243,7 @@ mt7921_stop_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3070 mvif->ctx);
3071
3072 out:
3073- mt7921_mutex_release(dev);
3074+ mt792x_mutex_release(dev);
3075 }
3076
3077 static int
3078@@ -1692,7 +1262,7 @@ mt7921_remove_chanctx(struct ieee80211_hw *hw,
3079 static void mt7921_ctx_iter(void *priv, u8 *mac,
3080 struct ieee80211_vif *vif)
3081 {
3082- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3083+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3084 struct ieee80211_chanctx_conf *ctx = priv;
3085
3086 if (ctx != mvif->ctx)
3087@@ -1709,77 +1279,47 @@ mt7921_change_chanctx(struct ieee80211_hw *hw,
3088 struct ieee80211_chanctx_conf *ctx,
3089 u32 changed)
3090 {
3091- struct mt7921_phy *phy = mt7921_hw_phy(hw);
3092+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
3093
3094- mt7921_mutex_acquire(phy->dev);
3095+ mt792x_mutex_acquire(phy->dev);
3096 ieee80211_iterate_active_interfaces(phy->mt76->hw,
3097 IEEE80211_IFACE_ITER_ACTIVE,
3098 mt7921_ctx_iter, ctx);
3099- mt7921_mutex_release(phy->dev);
3100-}
3101-
3102-static int
3103-mt7921_assign_vif_chanctx(struct ieee80211_hw *hw,
3104- struct ieee80211_vif *vif,
3105- struct ieee80211_bss_conf *link_conf,
3106- struct ieee80211_chanctx_conf *ctx)
3107-{
3108- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3109- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3110-
3111- mutex_lock(&dev->mt76.mutex);
3112- mvif->ctx = ctx;
3113- mutex_unlock(&dev->mt76.mutex);
3114-
3115- return 0;
3116-}
3117-
3118-static void
3119-mt7921_unassign_vif_chanctx(struct ieee80211_hw *hw,
3120- struct ieee80211_vif *vif,
3121- struct ieee80211_bss_conf *link_conf,
3122- struct ieee80211_chanctx_conf *ctx)
3123-{
3124- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3125- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3126-
3127- mutex_lock(&dev->mt76.mutex);
3128- mvif->ctx = NULL;
3129- mutex_unlock(&dev->mt76.mutex);
3130+ mt792x_mutex_release(phy->dev);
3131 }
3132
3133 static void mt7921_mgd_prepare_tx(struct ieee80211_hw *hw,
3134 struct ieee80211_vif *vif,
3135 struct ieee80211_prep_tx_info *info)
3136 {
3137- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3138- struct mt7921_dev *dev = mt7921_hw_dev(hw);
3139+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3140+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
3141 u16 duration = info->duration ? info->duration :
3142 jiffies_to_msecs(HZ);
3143
3144- mt7921_mutex_acquire(dev);
3145+ mt792x_mutex_acquire(dev);
3146 mt7921_set_roc(mvif->phy, mvif, mvif->ctx->def.chan, duration,
3147 MT7921_ROC_REQ_JOIN);
3148- mt7921_mutex_release(dev);
3149+ mt792x_mutex_release(dev);
3150 }
3151
3152 static void mt7921_mgd_complete_tx(struct ieee80211_hw *hw,
3153 struct ieee80211_vif *vif,
3154 struct ieee80211_prep_tx_info *info)
3155 {
3156- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3157+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3158
3159 mt7921_abort_roc(mvif->phy, mvif);
3160 }
3161
3162 const struct ieee80211_ops mt7921_ops = {
3163- .tx = mt7921_tx,
3164+ .tx = mt792x_tx,
3165 .start = mt7921_start,
3166 .stop = mt7921_stop,
3167 .add_interface = mt7921_add_interface,
3168- .remove_interface = mt7921_remove_interface,
3169+ .remove_interface = mt792x_remove_interface,
3170 .config = mt7921_config,
3171- .conf_tx = mt7921_conf_tx,
3172+ .conf_tx = mt792x_conf_tx,
3173 .configure_filter = mt7921_configure_filter,
3174 .bss_info_changed = mt7921_bss_info_changed,
3175 .start_ap = mt7921_start_ap,
3176@@ -1797,19 +1337,19 @@ const struct ieee80211_ops mt7921_ops = {
3177 .release_buffered_frames = mt76_release_buffered_frames,
3178 .channel_switch_beacon = mt7921_channel_switch_beacon,
3179 .get_txpower = mt76_get_txpower,
3180- .get_stats = mt7921_get_stats,
3181- .get_et_sset_count = mt7921_get_et_sset_count,
3182- .get_et_strings = mt7921_get_et_strings,
3183- .get_et_stats = mt7921_get_et_stats,
3184- .get_tsf = mt7921_get_tsf,
3185- .set_tsf = mt7921_set_tsf,
3186+ .get_stats = mt792x_get_stats,
3187+ .get_et_sset_count = mt792x_get_et_sset_count,
3188+ .get_et_strings = mt792x_get_et_strings,
3189+ .get_et_stats = mt792x_get_et_stats,
3190+ .get_tsf = mt792x_get_tsf,
3191+ .set_tsf = mt792x_set_tsf,
3192 .get_survey = mt76_get_survey,
3193 .get_antenna = mt76_get_antenna,
3194 .set_antenna = mt7921_set_antenna,
3195- .set_coverage_class = mt7921_set_coverage_class,
3196+ .set_coverage_class = mt792x_set_coverage_class,
3197 .hw_scan = mt7921_hw_scan,
3198 .cancel_hw_scan = mt7921_cancel_hw_scan,
3199- .sta_statistics = mt7921_sta_statistics,
3200+ .sta_statistics = mt792x_sta_statistics,
3201 .sched_scan_start = mt7921_start_sched_scan,
3202 .sched_scan_stop = mt7921_stop_sched_scan,
3203 CFG80211_TESTMODE_CMD(mt7921_testmode_cmd)
3204@@ -1817,18 +1357,18 @@ const struct ieee80211_ops mt7921_ops = {
3205 #ifdef CONFIG_PM
3206 .suspend = mt7921_suspend,
3207 .resume = mt7921_resume,
3208- .set_wakeup = mt7921_set_wakeup,
3209+ .set_wakeup = mt792x_set_wakeup,
3210 .set_rekey_data = mt7921_set_rekey_data,
3211 #endif /* CONFIG_PM */
3212- .flush = mt7921_flush,
3213+ .flush = mt792x_flush,
3214 .set_sar_specs = mt7921_set_sar_specs,
3215 .remain_on_channel = mt7921_remain_on_channel,
3216 .cancel_remain_on_channel = mt7921_cancel_remain_on_channel,
3217 .add_chanctx = mt7921_add_chanctx,
3218 .remove_chanctx = mt7921_remove_chanctx,
3219 .change_chanctx = mt7921_change_chanctx,
3220- .assign_vif_chanctx = mt7921_assign_vif_chanctx,
3221- .unassign_vif_chanctx = mt7921_unassign_vif_chanctx,
3222+ .assign_vif_chanctx = mt792x_assign_vif_chanctx,
3223+ .unassign_vif_chanctx = mt792x_unassign_vif_chanctx,
3224 .mgd_prepare_tx = mt7921_mgd_prepare_tx,
3225 .mgd_complete_tx = mt7921_mgd_complete_tx,
3226 };
3227diff --git a/mt7921/mcu.c b/mt7921/mcu.c
3228index a0ad18c7..90c93970 100644
3229--- a/mt7921/mcu.c
3230+++ b/mt7921/mcu.c
3231@@ -4,9 +4,9 @@
3232 #include <linux/fs.h>
3233 #include <linux/firmware.h>
3234 #include "mt7921.h"
3235-#include "mt7921_trace.h"
3236 #include "mcu.h"
3237 #include "../mt76_connac2_mac.h"
3238+#include "../mt792x_trace.h"
3239
3240 #define MT_STA_BFER BIT(0)
3241 #define MT_STA_BFEE BIT(1)
3242@@ -25,7 +25,7 @@ int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd,
3243 if (!skb) {
3244 dev_err(mdev->dev, "Message %08x (seq %d) timeout\n",
3245 cmd, seq);
3246- mt7921_reset(mdev);
3247+ mt792x_reset(mdev);
3248
3249 return -ETIMEDOUT;
3250 }
3251@@ -69,7 +69,7 @@ int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd,
3252 }
3253 EXPORT_SYMBOL_GPL(mt7921_mcu_parse_response);
3254
3255-static int mt7921_mcu_read_eeprom(struct mt7921_dev *dev, u32 offset, u8 *val)
3256+static int mt7921_mcu_read_eeprom(struct mt792x_dev *dev, u32 offset, u8 *val)
3257 {
3258 struct mt7921_mcu_eeprom_info *res, req = {
3259 .addr = cpu_to_le32(round_down(offset,
3260@@ -96,7 +96,7 @@ static int
3261 mt7921_mcu_set_ipv6_ns_filter(struct mt76_dev *dev,
3262 struct ieee80211_vif *vif, bool suspend)
3263 {
3264- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3265+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3266 struct {
3267 struct {
3268 u8 bss_idx;
3269@@ -134,7 +134,7 @@ void mt7921_mcu_set_suspend_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
3270 #endif /* CONFIG_PM */
3271
3272 static void
3273-mt7921_mcu_uni_roc_event(struct mt7921_dev *dev, struct sk_buff *skb)
3274+mt7921_mcu_uni_roc_event(struct mt792x_dev *dev, struct sk_buff *skb)
3275 {
3276 struct mt7921_roc_grant_tlv *grant;
3277 struct mt76_connac2_mcu_rxd *rxd;
3278@@ -157,17 +157,17 @@ mt7921_mcu_uni_roc_event(struct mt7921_dev *dev, struct sk_buff *skb)
3279 }
3280
3281 static void
3282-mt7921_mcu_scan_event(struct mt7921_dev *dev, struct sk_buff *skb)
3283+mt7921_mcu_scan_event(struct mt792x_dev *dev, struct sk_buff *skb)
3284 {
3285 struct mt76_phy *mphy = &dev->mt76.phy;
3286- struct mt7921_phy *phy = (struct mt7921_phy *)mphy->priv;
3287+ struct mt792x_phy *phy = (struct mt792x_phy *)mphy->priv;
3288
3289 spin_lock_bh(&dev->mt76.lock);
3290 __skb_queue_tail(&phy->scan_event_list, skb);
3291 spin_unlock_bh(&dev->mt76.lock);
3292
3293 ieee80211_queue_delayed_work(mphy->hw, &phy->scan_work,
3294- MT7921_HW_SCAN_TIMEOUT);
3295+ MT792x_HW_SCAN_TIMEOUT);
3296 }
3297
3298 static void
3299@@ -188,7 +188,7 @@ mt7921_mcu_connection_loss_iter(void *priv, u8 *mac,
3300 }
3301
3302 static void
3303-mt7921_mcu_connection_loss_event(struct mt7921_dev *dev, struct sk_buff *skb)
3304+mt7921_mcu_connection_loss_event(struct mt792x_dev *dev, struct sk_buff *skb)
3305 {
3306 struct mt76_connac_beacon_loss_event *event;
3307 struct mt76_phy *mphy = &dev->mt76.phy;
3308@@ -202,7 +202,7 @@ mt7921_mcu_connection_loss_event(struct mt7921_dev *dev, struct sk_buff *skb)
3309 }
3310
3311 static void
3312-mt7921_mcu_debug_msg_event(struct mt7921_dev *dev, struct sk_buff *skb)
3313+mt7921_mcu_debug_msg_event(struct mt792x_dev *dev, struct sk_buff *skb)
3314 {
3315 struct mt7921_debug_msg {
3316 __le16 id;
3317@@ -229,7 +229,7 @@ mt7921_mcu_debug_msg_event(struct mt7921_dev *dev, struct sk_buff *skb)
3318 }
3319
3320 static void
3321-mt7921_mcu_low_power_event(struct mt7921_dev *dev, struct sk_buff *skb)
3322+mt7921_mcu_low_power_event(struct mt792x_dev *dev, struct sk_buff *skb)
3323 {
3324 struct mt7921_mcu_lp_event {
3325 u8 state;
3326@@ -243,7 +243,7 @@ mt7921_mcu_low_power_event(struct mt7921_dev *dev, struct sk_buff *skb)
3327 }
3328
3329 static void
3330-mt7921_mcu_tx_done_event(struct mt7921_dev *dev, struct sk_buff *skb)
3331+mt7921_mcu_tx_done_event(struct mt792x_dev *dev, struct sk_buff *skb)
3332 {
3333 struct mt7921_mcu_tx_done_event *event;
3334
3335@@ -254,7 +254,7 @@ mt7921_mcu_tx_done_event(struct mt7921_dev *dev, struct sk_buff *skb)
3336 }
3337
3338 static void
3339-mt7921_mcu_rx_unsolicited_event(struct mt7921_dev *dev, struct sk_buff *skb)
3340+mt7921_mcu_rx_unsolicited_event(struct mt792x_dev *dev, struct sk_buff *skb)
3341 {
3342 struct mt76_connac2_mcu_rxd *rxd;
3343
3344@@ -288,7 +288,7 @@ mt7921_mcu_rx_unsolicited_event(struct mt7921_dev *dev, struct sk_buff *skb)
3345 }
3346
3347 static void
3348-mt7921_mcu_uni_rx_unsolicited_event(struct mt7921_dev *dev,
3349+mt7921_mcu_uni_rx_unsolicited_event(struct mt792x_dev *dev,
3350 struct sk_buff *skb)
3351 {
3352 struct mt76_connac2_mcu_rxd *rxd;
3353@@ -305,7 +305,7 @@ mt7921_mcu_uni_rx_unsolicited_event(struct mt7921_dev *dev,
3354 dev_kfree_skb(skb);
3355 }
3356
3357-void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb)
3358+void mt7921_mcu_rx_event(struct mt792x_dev *dev, struct sk_buff *skb)
3359 {
3360 struct mt76_connac2_mcu_rxd *rxd;
3361
3362@@ -339,11 +339,11 @@ void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb)
3363 }
3364
3365 /** starec & wtbl **/
3366-int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev,
3367+int mt7921_mcu_uni_tx_ba(struct mt792x_dev *dev,
3368 struct ieee80211_ampdu_params *params,
3369 bool enable)
3370 {
3371- struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv;
3372+ struct mt792x_sta *msta = (struct mt792x_sta *)params->sta->drv_priv;
3373
3374 if (enable && !params->amsdu)
3375 msta->wcid.amsdu = false;
3376@@ -353,48 +353,24 @@ int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev,
3377 enable, true);
3378 }
3379
3380-int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev,
3381+int mt7921_mcu_uni_rx_ba(struct mt792x_dev *dev,
3382 struct ieee80211_ampdu_params *params,
3383 bool enable)
3384 {
3385- struct mt7921_sta *msta = (struct mt7921_sta *)params->sta->drv_priv;
3386+ struct mt792x_sta *msta = (struct mt792x_sta *)params->sta->drv_priv;
3387
3388 return mt76_connac_mcu_sta_ba(&dev->mt76, &msta->vif->mt76, params,
3389 MCU_UNI_CMD(STA_REC_UPDATE),
3390 enable, false);
3391 }
3392
3393-static char *mt7921_patch_name(struct mt7921_dev *dev)
3394-{
3395- char *ret;
3396-
3397- if (is_mt7922(&dev->mt76))
3398- ret = MT7922_ROM_PATCH;
3399- else
3400- ret = MT7921_ROM_PATCH;
3401-
3402- return ret;
3403-}
3404-
3405-static char *mt7921_ram_name(struct mt7921_dev *dev)
3406-{
3407- char *ret;
3408-
3409- if (is_mt7922(&dev->mt76))
3410- ret = MT7922_FIRMWARE_WM;
3411- else
3412- ret = MT7921_FIRMWARE_WM;
3413-
3414- return ret;
3415-}
3416-
3417-static int mt7921_load_clc(struct mt7921_dev *dev, const char *fw_name)
3418+static int mt7921_load_clc(struct mt792x_dev *dev, const char *fw_name)
3419 {
3420 const struct mt76_connac2_fw_trailer *hdr;
3421 const struct mt76_connac2_fw_region *region;
3422 const struct mt7921_clc *clc;
3423 struct mt76_dev *mdev = &dev->mt76;
3424- struct mt7921_phy *phy = &dev->phy;
3425+ struct mt792x_phy *phy = &dev->phy;
3426 const struct firmware *fw;
3427 int ret, i, len, offset = 0;
3428 u8 *clc_base = NULL, hw_encap = 0;
3429@@ -472,42 +448,7 @@ out:
3430 return ret;
3431 }
3432
3433-static int mt7921_load_firmware(struct mt7921_dev *dev)
3434-{
3435- int ret;
3436-
3437- ret = mt76_connac2_load_patch(&dev->mt76, mt7921_patch_name(dev));
3438- if (ret)
3439- return ret;
3440-
3441- if (mt76_is_sdio(&dev->mt76)) {
3442- /* activate again */
3443- ret = __mt7921_mcu_fw_pmctrl(dev);
3444- if (!ret)
3445- ret = __mt7921_mcu_drv_pmctrl(dev);
3446- }
3447-
3448- ret = mt76_connac2_load_ram(&dev->mt76, mt7921_ram_name(dev), NULL);
3449- if (ret)
3450- return ret;
3451-
3452- if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY,
3453- MT_TOP_MISC2_FW_N9_RDY, 1500)) {
3454- dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
3455-
3456- return -EIO;
3457- }
3458-
3459-#ifdef CONFIG_PM
3460- dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support;
3461-#endif /* CONFIG_PM */
3462-
3463- dev_dbg(dev->mt76.dev, "Firmware init done\n");
3464-
3465- return 0;
3466-}
3467-
3468-int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl)
3469+int mt7921_mcu_fw_log_2_host(struct mt792x_dev *dev, u8 ctrl)
3470 {
3471 struct {
3472 u8 ctrl_val;
3473@@ -520,11 +461,11 @@ int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl)
3474 &data, sizeof(data), false);
3475 }
3476
3477-int mt7921_run_firmware(struct mt7921_dev *dev)
3478+int mt7921_run_firmware(struct mt792x_dev *dev)
3479 {
3480 int err;
3481
3482- err = mt7921_load_firmware(dev);
3483+ err = mt792x_load_firmware(dev);
3484 if (err)
3485 return err;
3486
3487@@ -533,7 +474,7 @@ int mt7921_run_firmware(struct mt7921_dev *dev)
3488 return err;
3489
3490 set_bit(MT76_STATE_MCU_RUNNING, &dev->mphy.state);
3491- err = mt7921_load_clc(dev, mt7921_ram_name(dev));
3492+ err = mt7921_load_clc(dev, mt792x_ram_name(dev));
3493 if (err)
3494 return err;
3495
3496@@ -541,9 +482,9 @@ int mt7921_run_firmware(struct mt7921_dev *dev)
3497 }
3498 EXPORT_SYMBOL_GPL(mt7921_run_firmware);
3499
3500-int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif)
3501+int mt7921_mcu_set_tx(struct mt792x_dev *dev, struct ieee80211_vif *vif)
3502 {
3503- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3504+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3505 struct edca {
3506 __le16 cw_min;
3507 __le16 cw_max;
3508@@ -635,12 +576,12 @@ int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif)
3509 &req_mu, sizeof(req_mu), false);
3510 }
3511
3512-int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
3513+int mt7921_mcu_set_roc(struct mt792x_phy *phy, struct mt792x_vif *vif,
3514 struct ieee80211_channel *chan, int duration,
3515 enum mt7921_roc_req type, u8 token_id)
3516 {
3517 int center_ch = ieee80211_frequency_to_channel(chan->center_freq);
3518- struct mt7921_dev *dev = phy->dev;
3519+ struct mt792x_dev *dev = phy->dev;
3520 struct {
3521 struct {
3522 u8 rsv[4];
3523@@ -702,10 +643,10 @@ int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
3524 &req, sizeof(req), false);
3525 }
3526
3527-int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
3528+int mt7921_mcu_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif,
3529 u8 token_id)
3530 {
3531- struct mt7921_dev *dev = phy->dev;
3532+ struct mt792x_dev *dev = phy->dev;
3533 struct {
3534 struct {
3535 u8 rsv[4];
3536@@ -732,9 +673,9 @@ int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
3537 &req, sizeof(req), false);
3538 }
3539
3540-int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd)
3541+int mt7921_mcu_set_chan_info(struct mt792x_phy *phy, int cmd)
3542 {
3543- struct mt7921_dev *dev = phy->dev;
3544+ struct mt792x_dev *dev = phy->dev;
3545 struct cfg80211_chan_def *chandef = &phy->mt76->chandef;
3546 int freq1 = chandef->center_freq1;
3547 struct {
3548@@ -791,7 +732,7 @@ int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd)
3549 return mt76_mcu_send_msg(&dev->mt76, cmd, &req, sizeof(req), true);
3550 }
3551
3552-int mt7921_mcu_set_eeprom(struct mt7921_dev *dev)
3553+int mt7921_mcu_set_eeprom(struct mt792x_dev *dev)
3554 {
3555 struct req_hdr {
3556 u8 buffer_mode;
3557@@ -807,9 +748,9 @@ int mt7921_mcu_set_eeprom(struct mt7921_dev *dev)
3558 }
3559 EXPORT_SYMBOL_GPL(mt7921_mcu_set_eeprom);
3560
3561-int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif)
3562+int mt7921_mcu_uni_bss_ps(struct mt792x_dev *dev, struct ieee80211_vif *vif)
3563 {
3564- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3565+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3566 struct {
3567 struct {
3568 u8 bss_idx;
3569@@ -845,10 +786,10 @@ int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif)
3570 }
3571
3572 static int
3573-mt7921_mcu_uni_bss_bcnft(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3574+mt7921_mcu_uni_bss_bcnft(struct mt792x_dev *dev, struct ieee80211_vif *vif,
3575 bool enable)
3576 {
3577- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3578+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3579 struct {
3580 struct {
3581 u8 bss_idx;
3582@@ -881,10 +822,10 @@ mt7921_mcu_uni_bss_bcnft(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3583 }
3584
3585 int
3586-mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3587+mt7921_mcu_set_bss_pm(struct mt792x_dev *dev, struct ieee80211_vif *vif,
3588 bool enable)
3589 {
3590- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3591+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3592 struct {
3593 u8 bss_idx;
3594 u8 dtim_period;
3595@@ -918,11 +859,11 @@ mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3596 &req, sizeof(req), false);
3597 }
3598
3599-int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta,
3600+int mt7921_mcu_sta_update(struct mt792x_dev *dev, struct ieee80211_sta *sta,
3601 struct ieee80211_vif *vif, bool enable,
3602 enum mt76_sta_info_state state)
3603 {
3604- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3605+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3606 int rssi = -ewma_rssi_read(&mvif->rssi);
3607 struct mt76_sta_cmd_info info = {
3608 .sta = sta,
3609@@ -933,60 +874,16 @@ int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta,
3610 .offload_fw = true,
3611 .rcpi = to_rcpi(rssi),
3612 };
3613- struct mt7921_sta *msta;
3614+ struct mt792x_sta *msta;
3615
3616- msta = sta ? (struct mt7921_sta *)sta->drv_priv : NULL;
3617+ msta = sta ? (struct mt792x_sta *)sta->drv_priv : NULL;
3618 info.wcid = msta ? &msta->wcid : &mvif->sta.wcid;
3619 info.newly = msta ? state != MT76_STA_INFO_STATE_ASSOC : true;
3620
3621 return mt76_connac_mcu_sta_cmd(&dev->mphy, &info);
3622 }
3623
3624-int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev)
3625-{
3626- struct mt76_phy *mphy = &dev->mt76.phy;
3627- struct mt76_connac_pm *pm = &dev->pm;
3628- int err = 0;
3629-
3630- mutex_lock(&pm->mutex);
3631-
3632- if (!test_bit(MT76_STATE_PM, &mphy->state))
3633- goto out;
3634-
3635- err = __mt7921_mcu_drv_pmctrl(dev);
3636-out:
3637- mutex_unlock(&pm->mutex);
3638-
3639- if (err)
3640- mt7921_reset(&dev->mt76);
3641-
3642- return err;
3643-}
3644-EXPORT_SYMBOL_GPL(mt7921_mcu_drv_pmctrl);
3645-
3646-int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev)
3647-{
3648- struct mt76_phy *mphy = &dev->mt76.phy;
3649- struct mt76_connac_pm *pm = &dev->pm;
3650- int err = 0;
3651-
3652- mutex_lock(&pm->mutex);
3653-
3654- if (mt76_connac_skip_fw_pmctrl(mphy, pm))
3655- goto out;
3656-
3657- err = __mt7921_mcu_fw_pmctrl(dev);
3658-out:
3659- mutex_unlock(&pm->mutex);
3660-
3661- if (err)
3662- mt7921_reset(&dev->mt76);
3663-
3664- return err;
3665-}
3666-EXPORT_SYMBOL_GPL(mt7921_mcu_fw_pmctrl);
3667-
3668-int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev,
3669+int mt7921_mcu_set_beacon_filter(struct mt792x_dev *dev,
3670 struct ieee80211_vif *vif,
3671 bool enable)
3672 {
3673@@ -1021,7 +918,7 @@ int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev,
3674 return 0;
3675 }
3676
3677-int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr)
3678+int mt7921_get_txpwr_info(struct mt792x_dev *dev, struct mt7921_txpwr *txpwr)
3679 {
3680 struct mt7921_txpwr_event *event;
3681 struct mt7921_txpwr_req req = {
3682@@ -1044,7 +941,7 @@ int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr)
3683 return 0;
3684 }
3685
3686-int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3687+int mt7921_mcu_set_sniffer(struct mt792x_dev *dev, struct ieee80211_vif *vif,
3688 bool enable)
3689 {
3690 struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
3691@@ -1074,7 +971,7 @@ int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif,
3692 true);
3693 }
3694
3695-int mt7921_mcu_config_sniffer(struct mt7921_vif *vif,
3696+int mt7921_mcu_config_sniffer(struct mt792x_vif *vif,
3697 struct ieee80211_chanctx_conf *ctx)
3698 {
3699 struct cfg80211_chan_def *chandef = &ctx->def;
3700@@ -1143,12 +1040,12 @@ int mt7921_mcu_config_sniffer(struct mt7921_vif *vif,
3701 }
3702
3703 int
3704-mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev,
3705+mt7921_mcu_uni_add_beacon_offload(struct mt792x_dev *dev,
3706 struct ieee80211_hw *hw,
3707 struct ieee80211_vif *vif,
3708 bool enable)
3709 {
3710- struct mt7921_vif *mvif = (struct mt7921_vif *)vif->drv_priv;
3711+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
3712 struct mt76_wcid *wcid = &dev->mt76.global_wcid;
3713 struct ieee80211_mutable_offsets offs;
3714 struct {
3715@@ -1221,7 +1118,7 @@ mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev,
3716 }
3717
3718 static
3719-int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
3720+int __mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2,
3721 enum environment_cap env_cap,
3722 struct mt7921_clc *clc,
3723 u8 idx)
3724@@ -1241,7 +1138,7 @@ int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
3725 } __packed req = {
3726 .idx = idx,
3727 .env = env_cap,
3728- .acpi_conf = mt7921_acpi_get_flags(&dev->phy),
3729+ .acpi_conf = mt792x_acpi_get_flags(&dev->phy),
3730 };
3731 int ret, valid_cnt = 0;
3732 u8 i, *pos;
3733@@ -1283,10 +1180,10 @@ int __mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
3734 return 0;
3735 }
3736
3737-int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
3738+int mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2,
3739 enum environment_cap env_cap)
3740 {
3741- struct mt7921_phy *phy = (struct mt7921_phy *)&dev->phy;
3742+ struct mt792x_phy *phy = (struct mt792x_phy *)&dev->phy;
3743 int i, ret;
3744
3745 /* submit all clc config */
3746@@ -1305,9 +1202,9 @@ int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
3747 return 0;
3748 }
3749
3750-int mt7921_mcu_get_temperature(struct mt7921_phy *phy)
3751+int mt7921_mcu_get_temperature(struct mt792x_phy *phy)
3752 {
3753- struct mt7921_dev *dev = phy->dev;
3754+ struct mt792x_dev *dev = phy->dev;
3755 struct {
3756 u8 ctrl_id;
3757 u8 action;
3758@@ -1322,7 +1219,7 @@ int mt7921_mcu_get_temperature(struct mt7921_phy *phy)
3759 sizeof(req), true);
3760 }
3761
3762-int mt7921_mcu_set_rxfilter(struct mt7921_dev *dev, u32 fif,
3763+int mt7921_mcu_set_rxfilter(struct mt792x_dev *dev, u32 fif,
3764 u8 bit_op, u32 bit_map)
3765 {
3766 struct {
3767diff --git a/mt7921/mt7921.h b/mt7921/mt7921.h
3768index ec987965..87dd0685 100644
3769--- a/mt7921/mt7921.h
3770+++ b/mt7921/mt7921.h
3771@@ -4,21 +4,8 @@
3772 #ifndef __MT7921_H
3773 #define __MT7921_H
3774
3775-#include <linux/interrupt.h>
3776-#include <linux/ktime.h>
3777-#include "../mt76_connac_mcu.h"
3778+#include "../mt792x.h"
3779 #include "regs.h"
3780-#include "acpi_sar.h"
3781-
3782-#define MT7921_MAX_INTERFACES 4
3783-#define MT7921_WTBL_SIZE 20
3784-#define MT7921_WTBL_RESERVED (MT7921_WTBL_SIZE - 1)
3785-#define MT7921_WTBL_STA (MT7921_WTBL_RESERVED - \
3786- MT7921_MAX_INTERFACES)
3787-
3788-#define MT7921_PM_TIMEOUT (HZ / 12)
3789-#define MT7921_HW_SCAN_TIMEOUT (HZ / 10)
3790-#define MT7921_WATCHDOG_TIME (HZ / 4)
3791
3792 #define MT7921_TX_RING_SIZE 2048
3793 #define MT7921_TX_MCU_RING_SIZE 256
3794@@ -27,27 +14,11 @@
3795 #define MT7921_RX_RING_SIZE 1536
3796 #define MT7921_RX_MCU_RING_SIZE 512
3797
3798-#define MT7921_DRV_OWN_RETRY_COUNT 10
3799-#define MT7921_MCU_INIT_RETRY_COUNT 10
3800-#define MT7921_WFSYS_INIT_RETRY_COUNT 2
3801-
3802-#define MT7921_FW_TAG_FEATURE 4
3803-#define MT7921_FW_CAP_CNM BIT(7)
3804-
3805-#define MT7921_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7961_1.bin"
3806-#define MT7921_ROM_PATCH "mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin"
3807-
3808-#define MT7922_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7922_1.bin"
3809-#define MT7922_ROM_PATCH "mediatek/WIFI_MT7922_patch_mcu_1_1_hdr.bin"
3810-
3811 #define MT7921_EEPROM_SIZE 3584
3812 #define MT7921_TOKEN_SIZE 8192
3813
3814 #define MT7921_EEPROM_BLOCK_SIZE 16
3815
3816-#define MT7921_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
3817-#define MT7921_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
3818-
3819 #define MT7921_SKU_RATE_NUM 161
3820 #define MT7921_SKU_MAX_DELTA_IDX MT7921_SKU_RATE_NUM
3821 #define MT7921_SKU_TABLE_SIZE (MT7921_SKU_RATE_NUM + 1)
3822@@ -127,9 +98,6 @@ struct mt7921_sdio_intr {
3823 #define to_rssi(field, rxv) ((FIELD_GET(field, rxv) - 220) / 2)
3824 #define to_rcpi(rssi) (2 * (rssi) + 220)
3825
3826-struct mt7921_vif;
3827-struct mt7921_sta;
3828-
3829 enum mt7921_txq_id {
3830 MT7921_TXQ_BAND0,
3831 MT7921_TXQ_BAND1,
3832@@ -143,39 +111,6 @@ enum mt7921_rxq_id {
3833 MT7921_RXQ_MCU_WM = 0,
3834 };
3835
3836-DECLARE_EWMA(avg_signal, 10, 8)
3837-
3838-struct mt7921_sta {
3839- struct mt76_wcid wcid; /* must be first */
3840-
3841- struct mt7921_vif *vif;
3842-
3843- u32 airtime_ac[8];
3844-
3845- int ack_signal;
3846- struct ewma_avg_signal avg_ack_signal;
3847-
3848- unsigned long last_txs;
3849-
3850- struct mt76_connac_sta_key_conf bip;
3851-};
3852-
3853-DECLARE_EWMA(rssi, 10, 8);
3854-
3855-struct mt7921_vif {
3856- struct mt76_vif mt76; /* must be first */
3857-
3858- struct mt7921_sta sta;
3859- struct mt7921_sta *wep_sta;
3860-
3861- struct mt7921_phy *phy;
3862-
3863- struct ewma_rssi rssi;
3864-
3865- struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
3866- struct ieee80211_chanctx_conf *ctx;
3867-};
3868-
3869 enum {
3870 MT7921_CLC_POWER,
3871 MT7921_CLC_CHAN,
3872@@ -199,41 +134,6 @@ struct mt7921_clc {
3873 u8 data[];
3874 } __packed;
3875
3876-struct mt7921_phy {
3877- struct mt76_phy *mt76;
3878- struct mt7921_dev *dev;
3879-
3880- struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
3881-
3882- u64 omac_mask;
3883-
3884- u16 noise;
3885-
3886- s16 coverage_class;
3887- u8 slottime;
3888-
3889- u32 rx_ampdu_ts;
3890- u32 ampdu_ref;
3891-
3892- struct mt76_mib_stats mib;
3893-
3894- u8 sta_work_count;
3895-
3896- struct sk_buff_head scan_event_list;
3897- struct delayed_work scan_work;
3898-#ifdef CONFIG_ACPI
3899- struct mt7921_acpi_sar *acpisar;
3900-#endif
3901-
3902- struct mt7921_clc *clc[MT7921_CLC_MAX_NUM];
3903-
3904- struct work_struct roc_work;
3905- struct timer_list roc_timer;
3906- wait_queue_head_t roc_wait;
3907- u8 roc_token_id;
3908- bool roc_grant;
3909-};
3910-
3911 enum mt7921_eeprom_field {
3912 MT_EE_CHIP_ID = 0x000,
3913 MT_EE_VERSION = 0x002,
3914@@ -245,49 +145,6 @@ enum mt7921_eeprom_field {
3915
3916 #define MT_EE_HW_TYPE_ENCAP BIT(0)
3917
3918-#define mt7921_init_reset(dev) ((dev)->hif_ops->init_reset(dev))
3919-#define mt7921_dev_reset(dev) ((dev)->hif_ops->reset(dev))
3920-#define mt7921_mcu_init(dev) ((dev)->hif_ops->mcu_init(dev))
3921-#define __mt7921_mcu_drv_pmctrl(dev) ((dev)->hif_ops->drv_own(dev))
3922-#define __mt7921_mcu_fw_pmctrl(dev) ((dev)->hif_ops->fw_own(dev))
3923-struct mt7921_hif_ops {
3924- int (*init_reset)(struct mt7921_dev *dev);
3925- int (*reset)(struct mt7921_dev *dev);
3926- int (*mcu_init)(struct mt7921_dev *dev);
3927- int (*drv_own)(struct mt7921_dev *dev);
3928- int (*fw_own)(struct mt7921_dev *dev);
3929-};
3930-
3931-struct mt7921_dev {
3932- union { /* must be first */
3933- struct mt76_dev mt76;
3934- struct mt76_phy mphy;
3935- };
3936-
3937- const struct mt76_bus_ops *bus_ops;
3938- struct mt7921_phy phy;
3939-
3940- struct work_struct reset_work;
3941- bool hw_full_reset:1;
3942- bool hw_init_done:1;
3943- bool fw_assert:1;
3944-
3945- struct work_struct init_work;
3946-
3947- u8 fw_debug;
3948- u8 fw_features;
3949-
3950- struct mt76_connac_pm pm;
3951- struct mt76_connac_coredump coredump;
3952- const struct mt7921_hif_ops *hif_ops;
3953-
3954- struct work_struct ipv6_ns_work;
3955- /* IPv6 addresses for WoWLAN */
3956- struct sk_buff_head ipv6_ns_list;
3957-
3958- enum environment_cap country_ie_env;
3959-};
3960-
3961 enum {
3962 TXPWR_USER,
3963 TXPWR_EEPROM,
3964@@ -318,56 +175,31 @@ struct mt7921_txpwr {
3965 } data[TXPWR_MAX_NUM];
3966 };
3967
3968-static inline struct mt7921_phy *
3969-mt7921_hw_phy(struct ieee80211_hw *hw)
3970-{
3971- struct mt76_phy *phy = hw->priv;
3972-
3973- return phy->priv;
3974-}
3975-
3976-static inline struct mt7921_dev *
3977-mt7921_hw_dev(struct ieee80211_hw *hw)
3978-{
3979- struct mt76_phy *phy = hw->priv;
3980-
3981- return container_of(phy->dev, struct mt7921_dev, mt76);
3982-}
3983-
3984-#define mt7921_mutex_acquire(dev) \
3985- mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
3986-#define mt7921_mutex_release(dev) \
3987- mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
3988-
3989 extern const struct ieee80211_ops mt7921_ops;
3990
3991-u32 mt7921_reg_map(struct mt7921_dev *dev, u32 addr);
3992-
3993-int __mt7921_start(struct mt7921_phy *phy);
3994-int mt7921_register_device(struct mt7921_dev *dev);
3995-void mt7921_unregister_device(struct mt7921_dev *dev);
3996-int mt7921_dma_init(struct mt7921_dev *dev);
3997-int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force);
3998-int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev);
3999-void mt7921_dma_cleanup(struct mt7921_dev *dev);
4000-int mt7921_run_firmware(struct mt7921_dev *dev);
4001-int mt7921_mcu_set_bss_pm(struct mt7921_dev *dev, struct ieee80211_vif *vif,
4002+u32 mt7921_reg_map(struct mt792x_dev *dev, u32 addr);
4003+
4004+int __mt7921_start(struct mt792x_phy *phy);
4005+int mt7921_register_device(struct mt792x_dev *dev);
4006+void mt7921_unregister_device(struct mt792x_dev *dev);
4007+int mt7921_run_firmware(struct mt792x_dev *dev);
4008+int mt7921_mcu_set_bss_pm(struct mt792x_dev *dev, struct ieee80211_vif *vif,
4009 bool enable);
4010-int mt7921_mcu_sta_update(struct mt7921_dev *dev, struct ieee80211_sta *sta,
4011+int mt7921_mcu_sta_update(struct mt792x_dev *dev, struct ieee80211_sta *sta,
4012 struct ieee80211_vif *vif, bool enable,
4013 enum mt76_sta_info_state state);
4014-int mt7921_mcu_set_chan_info(struct mt7921_phy *phy, int cmd);
4015-int mt7921_mcu_set_tx(struct mt7921_dev *dev, struct ieee80211_vif *vif);
4016-int mt7921_mcu_set_eeprom(struct mt7921_dev *dev);
4017-int mt7921_mcu_get_rx_rate(struct mt7921_phy *phy, struct ieee80211_vif *vif,
4018+int mt7921_mcu_set_chan_info(struct mt792x_phy *phy, int cmd);
4019+int mt7921_mcu_set_tx(struct mt792x_dev *dev, struct ieee80211_vif *vif);
4020+int mt7921_mcu_set_eeprom(struct mt792x_dev *dev);
4021+int mt7921_mcu_get_rx_rate(struct mt792x_phy *phy, struct ieee80211_vif *vif,
4022 struct ieee80211_sta *sta, struct rate_info *rate);
4023-int mt7921_mcu_fw_log_2_host(struct mt7921_dev *dev, u8 ctrl);
4024-void mt7921_mcu_rx_event(struct mt7921_dev *dev, struct sk_buff *skb);
4025-int mt7921_mcu_set_rxfilter(struct mt7921_dev *dev, u32 fif,
4026+int mt7921_mcu_fw_log_2_host(struct mt792x_dev *dev, u8 ctrl);
4027+void mt7921_mcu_rx_event(struct mt792x_dev *dev, struct sk_buff *skb);
4028+int mt7921_mcu_set_rxfilter(struct mt792x_dev *dev, u32 fif,
4029 u8 bit_op, u32 bit_map);
4030
4031 static inline u32
4032-mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr)
4033+mt7921_reg_map_l1(struct mt792x_dev *dev, u32 addr)
4034 {
4035 u32 offset = FIELD_GET(MT_HIF_REMAP_L1_OFFSET, addr);
4036 u32 base = FIELD_GET(MT_HIF_REMAP_L1_BASE, addr);
4037@@ -380,19 +212,19 @@ mt7921_reg_map_l1(struct mt7921_dev *dev, u32 addr)
4038 }
4039
4040 static inline u32
4041-mt7921_l1_rr(struct mt7921_dev *dev, u32 addr)
4042+mt7921_l1_rr(struct mt792x_dev *dev, u32 addr)
4043 {
4044 return mt76_rr(dev, mt7921_reg_map_l1(dev, addr));
4045 }
4046
4047 static inline void
4048-mt7921_l1_wr(struct mt7921_dev *dev, u32 addr, u32 val)
4049+mt7921_l1_wr(struct mt792x_dev *dev, u32 addr, u32 val)
4050 {
4051 mt76_wr(dev, mt7921_reg_map_l1(dev, addr), val);
4052 }
4053
4054 static inline u32
4055-mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val)
4056+mt7921_l1_rmw(struct mt792x_dev *dev, u32 addr, u32 mask, u32 val)
4057 {
4058 val |= mt7921_l1_rr(dev, addr) & ~mask;
4059 mt7921_l1_wr(dev, addr, val);
4060@@ -403,13 +235,8 @@ mt7921_l1_rmw(struct mt7921_dev *dev, u32 addr, u32 mask, u32 val)
4061 #define mt7921_l1_set(dev, addr, val) mt7921_l1_rmw(dev, addr, 0, val)
4062 #define mt7921_l1_clear(dev, addr, val) mt7921_l1_rmw(dev, addr, val, 0)
4063
4064-static inline bool mt7921_dma_need_reinit(struct mt7921_dev *dev)
4065-{
4066- return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
4067-}
4068-
4069 static inline void
4070-mt7921_skb_add_usb_sdio_hdr(struct mt7921_dev *dev, struct sk_buff *skb,
4071+mt7921_skb_add_usb_sdio_hdr(struct mt792x_dev *dev, struct sk_buff *skb,
4072 int type)
4073 {
4074 u32 hdr, len;
4075@@ -422,54 +249,41 @@ mt7921_skb_add_usb_sdio_hdr(struct mt7921_dev *dev, struct sk_buff *skb,
4076 }
4077
4078 void mt7921_stop(struct ieee80211_hw *hw);
4079-int mt7921_mac_init(struct mt7921_dev *dev);
4080-bool mt7921_mac_wtbl_update(struct mt7921_dev *dev, int idx, u32 mask);
4081-void mt7921_mac_reset_counters(struct mt7921_phy *phy);
4082-void mt7921_mac_set_timing(struct mt7921_phy *phy);
4083+int mt7921_mac_init(struct mt792x_dev *dev);
4084+bool mt7921_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask);
4085 int mt7921_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
4086 struct ieee80211_sta *sta);
4087 void mt7921_mac_sta_assoc(struct mt76_dev *mdev, struct ieee80211_vif *vif,
4088 struct ieee80211_sta *sta);
4089 void mt7921_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
4090 struct ieee80211_sta *sta);
4091-void mt7921_mac_work(struct work_struct *work);
4092 void mt7921_mac_reset_work(struct work_struct *work);
4093-void mt7921_mac_update_mib_stats(struct mt7921_phy *phy);
4094-void mt7921_reset(struct mt76_dev *mdev);
4095 int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
4096 enum mt76_txq_id qid, struct mt76_wcid *wcid,
4097 struct ieee80211_sta *sta,
4098 struct mt76_tx_info *tx_info);
4099
4100-void mt7921_tx_worker(struct mt76_worker *w);
4101 bool mt7921_rx_check(struct mt76_dev *mdev, void *data, int len);
4102 void mt7921_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
4103 struct sk_buff *skb, u32 *info);
4104 void mt7921_stats_work(struct work_struct *work);
4105-void mt7921_set_stream_he_caps(struct mt7921_phy *phy);
4106-void mt7921_update_channel(struct mt76_phy *mphy);
4107-int mt7921_init_debugfs(struct mt7921_dev *dev);
4108+void mt7921_set_stream_he_caps(struct mt792x_phy *phy);
4109+int mt7921_init_debugfs(struct mt792x_dev *dev);
4110
4111-int mt7921_mcu_set_beacon_filter(struct mt7921_dev *dev,
4112+int mt7921_mcu_set_beacon_filter(struct mt792x_dev *dev,
4113 struct ieee80211_vif *vif,
4114 bool enable);
4115-int mt7921_mcu_uni_tx_ba(struct mt7921_dev *dev,
4116+int mt7921_mcu_uni_tx_ba(struct mt792x_dev *dev,
4117 struct ieee80211_ampdu_params *params,
4118 bool enable);
4119-int mt7921_mcu_uni_rx_ba(struct mt7921_dev *dev,
4120+int mt7921_mcu_uni_rx_ba(struct mt792x_dev *dev,
4121 struct ieee80211_ampdu_params *params,
4122 bool enable);
4123 void mt7921_scan_work(struct work_struct *work);
4124 void mt7921_roc_work(struct work_struct *work);
4125-void mt7921_roc_timer(struct timer_list *timer);
4126-int mt7921_mcu_uni_bss_ps(struct mt7921_dev *dev, struct ieee80211_vif *vif);
4127-int mt7921_mcu_drv_pmctrl(struct mt7921_dev *dev);
4128-int mt7921_mcu_fw_pmctrl(struct mt7921_dev *dev);
4129-void mt7921_pm_wake_work(struct work_struct *work);
4130-void mt7921_pm_power_save_work(struct work_struct *work);
4131+int mt7921_mcu_uni_bss_ps(struct mt792x_dev *dev, struct ieee80211_vif *vif);
4132 void mt7921_coredump_work(struct work_struct *work);
4133-int mt7921_wfsys_reset(struct mt7921_dev *dev);
4134-int mt7921_get_txpwr_info(struct mt7921_dev *dev, struct mt7921_txpwr *txpwr);
4135+int mt7921_get_txpwr_info(struct mt792x_dev *dev, struct mt7921_txpwr *txpwr);
4136 int mt7921_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4137 void *data, int len);
4138 int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg,
4139@@ -477,30 +291,27 @@ int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg,
4140 int mt7921_mcu_parse_response(struct mt76_dev *mdev, int cmd,
4141 struct sk_buff *skb, int seq);
4142
4143-int mt7921e_driver_own(struct mt7921_dev *dev);
4144-int mt7921e_mac_reset(struct mt7921_dev *dev);
4145-int mt7921e_mcu_init(struct mt7921_dev *dev);
4146-int mt7921s_wfsys_reset(struct mt7921_dev *dev);
4147-int mt7921s_mac_reset(struct mt7921_dev *dev);
4148-int mt7921s_init_reset(struct mt7921_dev *dev);
4149-int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev);
4150-int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev);
4151-int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev);
4152-
4153-int mt7921s_mcu_init(struct mt7921_dev *dev);
4154-int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev);
4155-int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev);
4156-void mt7921_mac_add_txs(struct mt7921_dev *dev, void *data);
4157-void mt7921_set_runtime_pm(struct mt7921_dev *dev);
4158+int mt7921e_driver_own(struct mt792x_dev *dev);
4159+int mt7921e_mac_reset(struct mt792x_dev *dev);
4160+int mt7921e_mcu_init(struct mt792x_dev *dev);
4161+int mt7921s_wfsys_reset(struct mt792x_dev *dev);
4162+int mt7921s_mac_reset(struct mt792x_dev *dev);
4163+int mt7921s_init_reset(struct mt792x_dev *dev);
4164+
4165+int mt7921s_mcu_init(struct mt792x_dev *dev);
4166+int mt7921s_mcu_drv_pmctrl(struct mt792x_dev *dev);
4167+int mt7921s_mcu_fw_pmctrl(struct mt792x_dev *dev);
4168+void mt7921_mac_add_txs(struct mt792x_dev *dev, void *data);
4169+void mt7921_set_runtime_pm(struct mt792x_dev *dev);
4170 void mt7921_mcu_set_suspend_iter(void *priv, u8 *mac,
4171 struct ieee80211_vif *vif);
4172 void mt7921_set_ipv6_ns_work(struct work_struct *work);
4173
4174-int mt7921_mcu_set_sniffer(struct mt7921_dev *dev, struct ieee80211_vif *vif,
4175+int mt7921_mcu_set_sniffer(struct mt792x_dev *dev, struct ieee80211_vif *vif,
4176 bool enable);
4177-int mt7921_mcu_config_sniffer(struct mt7921_vif *vif,
4178+int mt7921_mcu_config_sniffer(struct mt792x_vif *vif,
4179 struct ieee80211_chanctx_conf *ctx);
4180-int mt7921_mcu_get_temperature(struct mt7921_phy *phy);
4181+int mt7921_mcu_get_temperature(struct mt792x_phy *phy);
4182
4183 int mt7921_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
4184 enum mt76_txq_id qid, struct mt76_wcid *wcid,
4185@@ -511,51 +322,18 @@ void mt7921_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
4186 bool mt7921_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
4187
4188 /* usb */
4189-#define MT_USB_TYPE_VENDOR (USB_TYPE_VENDOR | 0x1f)
4190-#define MT_USB_TYPE_UHW_VENDOR (USB_TYPE_VENDOR | 0x1e)
4191-
4192-int mt7921u_mcu_power_on(struct mt7921_dev *dev);
4193-int mt7921u_wfsys_reset(struct mt7921_dev *dev);
4194-int mt7921u_dma_init(struct mt7921_dev *dev, bool resume);
4195-int mt7921u_init_reset(struct mt7921_dev *dev);
4196-int mt7921u_mac_reset(struct mt7921_dev *dev);
4197-int mt7921_mcu_uni_add_beacon_offload(struct mt7921_dev *dev,
4198+int mt7921_mcu_uni_add_beacon_offload(struct mt792x_dev *dev,
4199 struct ieee80211_hw *hw,
4200 struct ieee80211_vif *vif,
4201 bool enable);
4202-#ifdef CONFIG_ACPI
4203-int mt7921_init_acpi_sar(struct mt7921_dev *dev);
4204-int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default);
4205-u8 mt7921_acpi_get_flags(struct mt7921_phy *phy);
4206-#else
4207-static inline int
4208-mt7921_init_acpi_sar(struct mt7921_dev *dev)
4209-{
4210- return 0;
4211-}
4212-
4213-static inline int
4214-mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default)
4215-{
4216- return 0;
4217-}
4218-
4219-static inline u8
4220-mt7921_acpi_get_flags(struct mt7921_phy *phy)
4221-{
4222- return 0;
4223-}
4224-#endif
4225 int mt7921_set_tx_sar_pwr(struct ieee80211_hw *hw,
4226 const struct cfg80211_sar_specs *sar);
4227
4228-int mt7921_mcu_set_clc(struct mt7921_dev *dev, u8 *alpha2,
4229+int mt7921_mcu_set_clc(struct mt792x_dev *dev, u8 *alpha2,
4230 enum environment_cap env_cap);
4231-int mt7921_mcu_set_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
4232+int mt7921_mcu_set_roc(struct mt792x_phy *phy, struct mt792x_vif *vif,
4233 struct ieee80211_channel *chan, int duration,
4234 enum mt7921_roc_req type, u8 token_id);
4235-int mt7921_mcu_abort_roc(struct mt7921_phy *phy, struct mt7921_vif *vif,
4236+int mt7921_mcu_abort_roc(struct mt792x_phy *phy, struct mt792x_vif *vif,
4237 u8 token_id);
4238-struct ieee80211_ops *mt7921_get_mac80211_ops(struct device *dev,
4239- void *drv_data, u8 *fw_features);
4240 #endif
4241diff --git a/mt7921/pci.c b/mt7921/pci.c
4242index 7c8bf719..d869aab7 100644
4243--- a/mt7921/pci.c
4244+++ b/mt7921/pci.c
4245@@ -9,8 +9,8 @@
4246
4247 #include "mt7921.h"
4248 #include "../mt76_connac2_mac.h"
4249+#include "../dma.h"
4250 #include "mcu.h"
4251-#include "../trace.h"
4252
4253 static const struct pci_device_id mt7921_pci_device_table[] = {
4254 { PCI_DEVICE(PCI_VENDOR_ID_MEDIATEK, 0x7961),
4255@@ -28,81 +28,12 @@ static bool mt7921_disable_aspm;
4256 module_param_named(disable_aspm, mt7921_disable_aspm, bool, 0644);
4257 MODULE_PARM_DESC(disable_aspm, "disable PCI ASPM support");
4258
4259-static void
4260-mt7921_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
4261+static int mt7921e_init_reset(struct mt792x_dev *dev)
4262 {
4263- if (q == MT_RXQ_MAIN)
4264- mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_DATA);
4265- else if (q == MT_RXQ_MCU_WA)
4266- mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM2);
4267- else
4268- mt76_connac_irq_enable(mdev, MT_INT_RX_DONE_WM);
4269+ return mt792x_wpdma_reset(dev, true);
4270 }
4271
4272-static irqreturn_t mt7921_irq_handler(int irq, void *dev_instance)
4273-{
4274- struct mt7921_dev *dev = dev_instance;
4275-
4276- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
4277-
4278- if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
4279- return IRQ_NONE;
4280-
4281- tasklet_schedule(&dev->mt76.irq_tasklet);
4282-
4283- return IRQ_HANDLED;
4284-}
4285-
4286-static void mt7921_irq_tasklet(unsigned long data)
4287-{
4288- struct mt7921_dev *dev = (struct mt7921_dev *)data;
4289- u32 intr, mask = 0;
4290-
4291- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
4292-
4293- intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA);
4294- intr &= dev->mt76.mmio.irqmask;
4295- mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr);
4296-
4297- trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
4298-
4299- mask |= intr & MT_INT_RX_DONE_ALL;
4300- if (intr & MT_INT_TX_DONE_MCU)
4301- mask |= MT_INT_TX_DONE_MCU;
4302-
4303- if (intr & MT_INT_MCU_CMD) {
4304- u32 intr_sw;
4305-
4306- intr_sw = mt76_rr(dev, MT_MCU_CMD);
4307- /* ack MCU2HOST_SW_INT_STA */
4308- mt76_wr(dev, MT_MCU_CMD, intr_sw);
4309- if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) {
4310- mask |= MT_INT_RX_DONE_DATA;
4311- intr |= MT_INT_RX_DONE_DATA;
4312- }
4313- }
4314-
4315- mt76_set_irq_mask(&dev->mt76, MT_WFDMA0_HOST_INT_ENA, mask, 0);
4316-
4317- if (intr & MT_INT_TX_DONE_ALL)
4318- napi_schedule(&dev->mt76.tx_napi);
4319-
4320- if (intr & MT_INT_RX_DONE_WM)
4321- napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
4322-
4323- if (intr & MT_INT_RX_DONE_WM2)
4324- napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
4325-
4326- if (intr & MT_INT_RX_DONE_DATA)
4327- napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
4328-}
4329-
4330-static int mt7921e_init_reset(struct mt7921_dev *dev)
4331-{
4332- return mt7921_wpdma_reset(dev, true);
4333-}
4334-
4335-static void mt7921e_unregister_device(struct mt7921_dev *dev)
4336+static void mt7921e_unregister_device(struct mt792x_dev *dev)
4337 {
4338 int i;
4339 struct mt76_connac_pm *pm = &dev->pm;
4340@@ -116,15 +47,15 @@ static void mt7921e_unregister_device(struct mt7921_dev *dev)
4341 cancel_work_sync(&dev->reset_work);
4342
4343 mt76_connac2_tx_token_put(&dev->mt76);
4344- __mt7921_mcu_drv_pmctrl(dev);
4345- mt7921_dma_cleanup(dev);
4346- mt7921_wfsys_reset(dev);
4347+ __mt792x_mcu_drv_pmctrl(dev);
4348+ mt792x_dma_cleanup(dev);
4349+ mt792x_wfsys_reset(dev);
4350 skb_queue_purge(&dev->mt76.mcu.res_q);
4351
4352 tasklet_disable(&dev->mt76.irq_tasklet);
4353 }
4354
4355-static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr)
4356+static u32 __mt7921_reg_addr(struct mt792x_dev *dev, u32 addr)
4357 {
4358 static const struct mt76_connac_reg_map fixed_map[] = {
4359 { 0x820d0000, 0x30000, 0x10000 }, /* WF_LMAC_TOP (WF_WTBLON) */
4360@@ -203,7 +134,7 @@ static u32 __mt7921_reg_addr(struct mt7921_dev *dev, u32 addr)
4361
4362 static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset)
4363 {
4364- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4365+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4366 u32 addr = __mt7921_reg_addr(dev, offset);
4367
4368 return dev->bus_ops->rr(mdev, addr);
4369@@ -211,7 +142,7 @@ static u32 mt7921_rr(struct mt76_dev *mdev, u32 offset)
4370
4371 static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val)
4372 {
4373- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4374+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4375 u32 addr = __mt7921_reg_addr(dev, offset);
4376
4377 dev->bus_ops->wr(mdev, addr, val);
4378@@ -219,12 +150,77 @@ static void mt7921_wr(struct mt76_dev *mdev, u32 offset, u32 val)
4379
4380 static u32 mt7921_rmw(struct mt76_dev *mdev, u32 offset, u32 mask, u32 val)
4381 {
4382- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4383+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4384 u32 addr = __mt7921_reg_addr(dev, offset);
4385
4386 return dev->bus_ops->rmw(mdev, addr, mask, val);
4387 }
4388
4389+static int mt7921_dma_init(struct mt792x_dev *dev)
4390+{
4391+ int ret;
4392+
4393+ mt76_dma_attach(&dev->mt76);
4394+
4395+ ret = mt792x_dma_disable(dev, true);
4396+ if (ret)
4397+ return ret;
4398+
4399+ /* init tx queue */
4400+ ret = mt76_connac_init_tx_queues(dev->phy.mt76, MT7921_TXQ_BAND0,
4401+ MT7921_TX_RING_SIZE,
4402+ MT_TX_RING_BASE, 0);
4403+ if (ret)
4404+ return ret;
4405+
4406+ mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, 0x4);
4407+
4408+ /* command to WM */
4409+ ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7921_TXQ_MCU_WM,
4410+ MT7921_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
4411+ if (ret)
4412+ return ret;
4413+
4414+ /* firmware download */
4415+ ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7921_TXQ_FWDL,
4416+ MT7921_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
4417+ if (ret)
4418+ return ret;
4419+
4420+ /* event from WM before firmware download */
4421+ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU],
4422+ MT7921_RXQ_MCU_WM,
4423+ MT7921_RX_MCU_RING_SIZE,
4424+ MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE);
4425+ if (ret)
4426+ return ret;
4427+
4428+ /* Change mcu queue after firmware download */
4429+ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU_WA],
4430+ MT7921_RXQ_MCU_WM,
4431+ MT7921_RX_MCU_RING_SIZE,
4432+ MT_RX_BUF_SIZE, MT_WFDMA0(0x540));
4433+ if (ret)
4434+ return ret;
4435+
4436+ /* rx data */
4437+ ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN],
4438+ MT7921_RXQ_BAND0, MT7921_RX_RING_SIZE,
4439+ MT_RX_BUF_SIZE, MT_RX_DATA_RING_BASE);
4440+ if (ret)
4441+ return ret;
4442+
4443+ ret = mt76_init_queues(dev, mt792x_poll_rx);
4444+ if (ret < 0)
4445+ return ret;
4446+
4447+ netif_napi_add_tx(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi,
4448+ mt792x_poll_tx);
4449+ napi_enable(&dev->mt76.tx_napi);
4450+
4451+ return mt792x_dma_enable(dev);
4452+}
4453+
4454 static int mt7921_pci_probe(struct pci_dev *pdev,
4455 const struct pci_device_id *id)
4456 {
4457@@ -241,22 +237,34 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
4458 .tx_complete_skb = mt76_connac_tx_complete_skb,
4459 .rx_check = mt7921_rx_check,
4460 .rx_skb = mt7921_queue_rx_skb,
4461- .rx_poll_complete = mt7921_rx_poll_complete,
4462+ .rx_poll_complete = mt792x_rx_poll_complete,
4463 .sta_add = mt7921_mac_sta_add,
4464 .sta_assoc = mt7921_mac_sta_assoc,
4465 .sta_remove = mt7921_mac_sta_remove,
4466- .update_survey = mt7921_update_channel,
4467+ .update_survey = mt792x_update_channel,
4468 };
4469- static const struct mt7921_hif_ops mt7921_pcie_ops = {
4470+ static const struct mt792x_hif_ops mt7921_pcie_ops = {
4471 .init_reset = mt7921e_init_reset,
4472 .reset = mt7921e_mac_reset,
4473 .mcu_init = mt7921e_mcu_init,
4474- .drv_own = mt7921e_mcu_drv_pmctrl,
4475- .fw_own = mt7921e_mcu_fw_pmctrl,
4476+ .drv_own = mt792xe_mcu_drv_pmctrl,
4477+ .fw_own = mt792xe_mcu_fw_pmctrl,
4478+ };
4479+ static const struct mt792x_irq_map irq_map = {
4480+ .host_irq_enable = MT_WFDMA0_HOST_INT_ENA,
4481+ .tx = {
4482+ .all_complete_mask = MT_INT_TX_DONE_ALL,
4483+ .mcu_complete_mask = MT_INT_TX_DONE_MCU,
4484+ },
4485+ .rx = {
4486+ .data_complete_mask = MT_INT_RX_DONE_DATA,
4487+ .wm_complete_mask = MT_INT_RX_DONE_WM,
4488+ .wm2_complete_mask = MT_INT_RX_DONE_WM2,
4489+ },
4490 };
4491 struct ieee80211_ops *ops;
4492 struct mt76_bus_ops *bus_ops;
4493- struct mt7921_dev *dev;
4494+ struct mt792x_dev *dev;
4495 struct mt76_dev *mdev;
4496 u8 features;
4497 int ret;
4498@@ -288,8 +296,8 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
4499 if (mt7921_disable_aspm)
4500 mt76_pci_disable_aspm(pdev);
4501
4502- ops = mt7921_get_mac80211_ops(&pdev->dev, (void *)id->driver_data,
4503- &features);
4504+ ops = mt792x_get_mac80211_ops(&pdev->dev, &mt7921_ops,
4505+ (void *)id->driver_data, &features);
4506 if (!ops) {
4507 ret = -ENOMEM;
4508 goto err_free_pci_vec;
4509@@ -303,11 +311,12 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
4510
4511 pci_set_drvdata(pdev, mdev);
4512
4513- dev = container_of(mdev, struct mt7921_dev, mt76);
4514+ dev = container_of(mdev, struct mt792x_dev, mt76);
4515 dev->fw_features = features;
4516 dev->hif_ops = &mt7921_pcie_ops;
4517+ dev->irq_map = &irq_map;
4518 mt76_mmio_init(&dev->mt76, pcim_iomap_table(pdev)[0]);
4519- tasklet_init(&mdev->irq_tasklet, mt7921_irq_tasklet, (unsigned long)dev);
4520+ tasklet_init(&mdev->irq_tasklet, mt792x_irq_tasklet, (unsigned long)dev);
4521
4522 dev->phy.dev = dev;
4523 dev->phy.mt76 = &dev->mt76.phy;
4524@@ -325,11 +334,11 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
4525 bus_ops->rmw = mt7921_rmw;
4526 dev->mt76.bus = bus_ops;
4527
4528- ret = mt7921e_mcu_fw_pmctrl(dev);
4529+ ret = mt792xe_mcu_fw_pmctrl(dev);
4530 if (ret)
4531 goto err_free_dev;
4532
4533- ret = __mt7921e_mcu_drv_pmctrl(dev);
4534+ ret = __mt792xe_mcu_drv_pmctrl(dev);
4535 if (ret)
4536 goto err_free_dev;
4537
4538@@ -337,15 +346,15 @@ static int mt7921_pci_probe(struct pci_dev *pdev,
4539 (mt7921_l1_rr(dev, MT_HW_REV) & 0xff);
4540 dev_info(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
4541
4542- ret = mt7921_wfsys_reset(dev);
4543+ ret = mt792x_wfsys_reset(dev);
4544 if (ret)
4545 goto err_free_dev;
4546
4547- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
4548+ mt76_wr(dev, irq_map.host_irq_enable, 0);
4549
4550 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
4551
4552- ret = devm_request_irq(mdev->dev, pdev->irq, mt7921_irq_handler,
4553+ ret = devm_request_irq(mdev->dev, pdev->irq, mt792x_irq_handler,
4554 IRQF_SHARED, KBUILD_MODNAME, dev);
4555 if (ret)
4556 goto err_free_dev;
4557@@ -373,7 +382,7 @@ err_free_pci_vec:
4558 static void mt7921_pci_remove(struct pci_dev *pdev)
4559 {
4560 struct mt76_dev *mdev = pci_get_drvdata(pdev);
4561- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4562+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4563
4564 mt7921e_unregister_device(dev);
4565 devm_free_irq(&pdev->dev, pdev->irq, dev);
4566@@ -385,7 +394,7 @@ static int mt7921_pci_suspend(struct device *device)
4567 {
4568 struct pci_dev *pdev = to_pci_dev(device);
4569 struct mt76_dev *mdev = pci_get_drvdata(pdev);
4570- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4571+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4572 struct mt76_connac_pm *pm = &dev->pm;
4573 int i, err;
4574
4575@@ -394,7 +403,7 @@ static int mt7921_pci_suspend(struct device *device)
4576 cancel_delayed_work_sync(&pm->ps_work);
4577 cancel_work_sync(&pm->wake_work);
4578
4579- err = mt7921_mcu_drv_pmctrl(dev);
4580+ err = mt792x_mcu_drv_pmctrl(dev);
4581 if (err < 0)
4582 goto restore_suspend;
4583
4584@@ -424,12 +433,12 @@ static int mt7921_pci_suspend(struct device *device)
4585 MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN);
4586
4587 /* disable interrupt */
4588- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
4589+ mt76_wr(dev, dev->irq_map->host_irq_enable, 0);
4590 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
4591 synchronize_irq(pdev->irq);
4592 tasklet_kill(&mdev->irq_tasklet);
4593
4594- err = mt7921_mcu_fw_pmctrl(dev);
4595+ err = mt792x_mcu_fw_pmctrl(dev);
4596 if (err)
4597 goto restore_napi;
4598
4599@@ -450,7 +459,7 @@ restore_suspend:
4600 pm->suspended = false;
4601
4602 if (err < 0)
4603- mt7921_reset(&dev->mt76);
4604+ mt792x_reset(&dev->mt76);
4605
4606 return err;
4607 }
4608@@ -459,21 +468,21 @@ static int mt7921_pci_resume(struct device *device)
4609 {
4610 struct pci_dev *pdev = to_pci_dev(device);
4611 struct mt76_dev *mdev = pci_get_drvdata(pdev);
4612- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4613+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4614 struct mt76_connac_pm *pm = &dev->pm;
4615 int i, err;
4616
4617- err = mt7921_mcu_drv_pmctrl(dev);
4618+ err = mt792x_mcu_drv_pmctrl(dev);
4619 if (err < 0)
4620 goto failed;
4621
4622- mt7921_wpdma_reinit_cond(dev);
4623+ mt792x_wpdma_reinit_cond(dev);
4624
4625 /* enable interrupt */
4626 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
4627 mt76_connac_irq_enable(&dev->mt76,
4628- MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
4629- MT_INT_MCU_CMD);
4630+ dev->irq_map->tx.all_complete_mask |
4631+ MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);
4632 mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
4633
4634 /* put dma enabled */
4635@@ -500,7 +509,7 @@ failed:
4636 pm->suspended = false;
4637
4638 if (err < 0)
4639- mt7921_reset(&dev->mt76);
4640+ mt792x_reset(&dev->mt76);
4641
4642 return err;
4643 }
4644diff --git a/mt7921/pci_mac.c b/mt7921/pci_mac.c
4645index 978c90a0..e7a995e7 100644
4646--- a/mt7921/pci_mac.c
4647+++ b/mt7921/pci_mac.c
4648@@ -10,7 +10,7 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
4649 struct ieee80211_sta *sta,
4650 struct mt76_tx_info *tx_info)
4651 {
4652- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4653+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4654 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb);
4655 struct ieee80211_key_conf *key = info->control.hw_key;
4656 struct mt76_connac_hw_txp *txp;
4657@@ -32,7 +32,7 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
4658 return id;
4659
4660 if (sta) {
4661- struct mt7921_sta *msta = (struct mt7921_sta *)sta->drv_priv;
4662+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
4663
4664 if (time_after(jiffies, msta->last_txs + HZ / 4)) {
4665 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS;
4666@@ -53,15 +53,15 @@ int mt7921e_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
4667 return 0;
4668 }
4669
4670-int mt7921e_mac_reset(struct mt7921_dev *dev)
4671+int mt7921e_mac_reset(struct mt792x_dev *dev)
4672 {
4673 int i, err;
4674
4675- mt7921e_mcu_drv_pmctrl(dev);
4676+ mt792xe_mcu_drv_pmctrl(dev);
4677
4678 mt76_connac_free_pending_tx_skbs(&dev->pm, NULL);
4679
4680- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
4681+ mt76_wr(dev, dev->irq_map->host_irq_enable, 0);
4682 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
4683
4684 set_bit(MT76_RESET, &dev->mphy.state);
4685@@ -80,7 +80,7 @@ int mt7921e_mac_reset(struct mt7921_dev *dev)
4686 mt76_connac2_tx_token_put(&dev->mt76);
4687 idr_init(&dev->mt76.token);
4688
4689- mt7921_wpdma_reset(dev, true);
4690+ mt792x_wpdma_reset(dev, true);
4691
4692 local_bh_disable();
4693 mt76_for_each_q_rx(&dev->mt76, i) {
4694@@ -92,9 +92,9 @@ int mt7921e_mac_reset(struct mt7921_dev *dev)
4695 dev->fw_assert = false;
4696 clear_bit(MT76_MCU_RESET, &dev->mphy.state);
4697
4698- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA,
4699- MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
4700- MT_INT_MCU_CMD);
4701+ mt76_wr(dev, dev->irq_map->host_irq_enable,
4702+ dev->irq_map->tx.all_complete_mask |
4703+ MT_INT_RX_DONE_ALL | MT_INT_MCU_CMD);
4704 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0xff);
4705
4706 err = mt7921e_driver_own(dev);
4707diff --git a/mt7921/pci_mcu.c b/mt7921/pci_mcu.c
4708index 1aefbb6c..4cf1f2f0 100644
4709--- a/mt7921/pci_mcu.c
4710+++ b/mt7921/pci_mcu.c
4711@@ -4,7 +4,7 @@
4712 #include "mt7921.h"
4713 #include "mcu.h"
4714
4715-int mt7921e_driver_own(struct mt7921_dev *dev)
4716+int mt7921e_driver_own(struct mt792x_dev *dev)
4717 {
4718 u32 reg = mt7921_reg_map_l1(dev, MT_TOP_LPCR_HOST_BAND0);
4719
4720@@ -22,7 +22,7 @@ static int
4721 mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
4722 int cmd, int *seq)
4723 {
4724- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
4725+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
4726 enum mt76_mcuq_id txq = MT_MCUQ_WM;
4727 int ret;
4728
4729@@ -38,7 +38,7 @@ mt7921_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
4730 return mt76_tx_queue_skb_raw(dev, mdev->q_mcu[txq], skb, 0);
4731 }
4732
4733-int mt7921e_mcu_init(struct mt7921_dev *dev)
4734+int mt7921e_mcu_init(struct mt792x_dev *dev)
4735 {
4736 static const struct mt76_mcu_ops mt7921_mcu_ops = {
4737 .headroom = sizeof(struct mt76_connac2_mcu_txd),
4738@@ -61,68 +61,3 @@ int mt7921e_mcu_init(struct mt7921_dev *dev)
4739
4740 return err;
4741 }
4742-
4743-int __mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
4744-{
4745- int i, err = 0;
4746-
4747- for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
4748- mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN);
4749- if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL,
4750- PCIE_LPCR_HOST_OWN_SYNC, 0, 50, 1))
4751- break;
4752- }
4753-
4754- if (i == MT7921_DRV_OWN_RETRY_COUNT) {
4755- dev_err(dev->mt76.dev, "driver own failed\n");
4756- err = -EIO;
4757- }
4758-
4759- return err;
4760-}
4761-
4762-int mt7921e_mcu_drv_pmctrl(struct mt7921_dev *dev)
4763-{
4764- struct mt76_phy *mphy = &dev->mt76.phy;
4765- struct mt76_connac_pm *pm = &dev->pm;
4766- int err;
4767-
4768- err = __mt7921e_mcu_drv_pmctrl(dev);
4769- if (err < 0)
4770- goto out;
4771-
4772- mt7921_wpdma_reinit_cond(dev);
4773- clear_bit(MT76_STATE_PM, &mphy->state);
4774-
4775- pm->stats.last_wake_event = jiffies;
4776- pm->stats.doze_time += pm->stats.last_wake_event -
4777- pm->stats.last_doze_event;
4778-out:
4779- return err;
4780-}
4781-
4782-int mt7921e_mcu_fw_pmctrl(struct mt7921_dev *dev)
4783-{
4784- struct mt76_phy *mphy = &dev->mt76.phy;
4785- struct mt76_connac_pm *pm = &dev->pm;
4786- int i;
4787-
4788- for (i = 0; i < MT7921_DRV_OWN_RETRY_COUNT; i++) {
4789- mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN);
4790- if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL,
4791- PCIE_LPCR_HOST_OWN_SYNC, 4, 50, 1))
4792- break;
4793- }
4794-
4795- if (i == MT7921_DRV_OWN_RETRY_COUNT) {
4796- dev_err(dev->mt76.dev, "firmware own failed\n");
4797- clear_bit(MT76_STATE_PM, &mphy->state);
4798- return -EIO;
4799- }
4800-
4801- pm->stats.last_doze_event = jiffies;
4802- pm->stats.awake_time += pm->stats.last_doze_event -
4803- pm->stats.last_wake_event;
4804-
4805- return 0;
4806-}
4807diff --git a/mt7921/regs.h b/mt7921/regs.h
4808index b1801425..43427a3a 100644
4809--- a/mt7921/regs.h
4810+++ b/mt7921/regs.h
4811@@ -4,26 +4,7 @@
4812 #ifndef __MT7921_REGS_H
4813 #define __MT7921_REGS_H
4814
4815-/* MCU WFDMA1 */
4816-#define MT_MCU_WFDMA1_BASE 0x3000
4817-#define MT_MCU_WFDMA1(ofs) (MT_MCU_WFDMA1_BASE + (ofs))
4818-
4819-#define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108)
4820-#define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
4821-#define MT_MCU_INT_EVENT_DMA_INIT BIT(1)
4822-#define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2)
4823-#define MT_MCU_INT_EVENT_RESET_DONE BIT(3)
4824-
4825-#define MT_PLE_BASE 0x820c0000
4826-#define MT_PLE(ofs) (MT_PLE_BASE + (ofs))
4827-
4828-#define MT_PLE_FL_Q0_CTRL MT_PLE(0x3e0)
4829-#define MT_PLE_FL_Q1_CTRL MT_PLE(0x3e4)
4830-#define MT_PLE_FL_Q2_CTRL MT_PLE(0x3e8)
4831-#define MT_PLE_FL_Q3_CTRL MT_PLE(0x3ec)
4832-
4833-#define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n))
4834-#define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2))
4835+#include "../mt792x_regs.h"
4836
4837 #define MT_MDP_BASE 0x820cd000
4838 #define MT_MDP(ofs) (MT_MDP_BASE + (ofs))
4839@@ -47,279 +28,7 @@
4840 #define MT_MDP_TO_HIF 0
4841 #define MT_MDP_TO_WM 1
4842
4843-/* TMAC: band 0(0x21000), band 1(0xa1000) */
4844-#define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000)
4845-#define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs))
4846-
4847-#define MT_TMAC_TCR0(_band) MT_WF_TMAC(_band, 0)
4848-#define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25)
4849-
4850-#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, 0x090)
4851-#define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, 0x094)
4852-#define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0)
4853-#define MT_TIMEOUT_VAL_CCA GENMASK(31, 16)
4854-
4855-#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, 0x0a4)
4856-#define MT_IFS_EIFS GENMASK(8, 0)
4857-#define MT_IFS_RIFS GENMASK(14, 10)
4858-#define MT_IFS_SIFS GENMASK(22, 16)
4859-#define MT_IFS_SLOT GENMASK(30, 24)
4860-
4861-#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, 0x0f4)
4862-#define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0)
4863-#define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17)
4864-#define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18)
4865-
4866-#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, 0x09c)
4867-#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, 0x1e0)
4868-
4869-#define MT_WF_DMA_BASE(_band) ((_band) ? 0x820f7000 : 0x820e7000)
4870-#define MT_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs))
4871-
4872-#define MT_DMA_DCR0(_band) MT_WF_DMA(_band, 0x000)
4873-#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3)
4874-#define MT_DMA_DCR0_RXD_G5_EN BIT(23)
4875-
4876-/* WTBLOFF TOP: band 0(0x820e9000),band 1(0x820f9000) */
4877-#define MT_WTBLOFF_TOP_BASE(_band) ((_band) ? 0x820f9000 : 0x820e9000)
4878-#define MT_WTBLOFF_TOP(_band, ofs) (MT_WTBLOFF_TOP_BASE(_band) + (ofs))
4879-
4880-#define MT_WTBLOFF_TOP_RSCR(_band) MT_WTBLOFF_TOP(_band, 0x008)
4881-#define MT_WTBLOFF_TOP_RSCR_RCPI_MODE GENMASK(31, 30)
4882-#define MT_WTBLOFF_TOP_RSCR_RCPI_PARAM GENMASK(25, 24)
4883-
4884-/* LPON: band 0(0x24200), band 1(0xa4200) */
4885-#define MT_WF_LPON_BASE(_band) ((_band) ? 0x820fb000 : 0x820eb000)
4886-#define MT_WF_LPON(_band, ofs) (MT_WF_LPON_BASE(_band) + (ofs))
4887-
4888-#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, 0x080)
4889-#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, 0x084)
4890-
4891-#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + (n) * 4)
4892-#define MT_LPON_TCR_SW_MODE GENMASK(1, 0)
4893-#define MT_LPON_TCR_SW_WRITE BIT(0)
4894-
4895-/* ETBF: band 0(0x24000), band 1(0xa4000) */
4896-#define MT_WF_ETBF_BASE(_band) ((_band) ? 0x820fa000 : 0x820ea000)
4897-#define MT_WF_ETBF(_band, ofs) (MT_WF_ETBF_BASE(_band) + (ofs))
4898-
4899-#define MT_ETBF_TX_APP_CNT(_band) MT_WF_ETBF(_band, 0x150)
4900-#define MT_ETBF_TX_IBF_CNT GENMASK(31, 16)
4901-#define MT_ETBF_TX_EBF_CNT GENMASK(15, 0)
4902-
4903-#define MT_ETBF_RX_FB_CNT(_band) MT_WF_ETBF(_band, 0x158)
4904-#define MT_ETBF_RX_FB_ALL GENMASK(31, 24)
4905-#define MT_ETBF_RX_FB_HE GENMASK(23, 16)
4906-#define MT_ETBF_RX_FB_VHT GENMASK(15, 8)
4907-#define MT_ETBF_RX_FB_HT GENMASK(7, 0)
4908-
4909-/* MIB: band 0(0x24800), band 1(0xa4800) */
4910-#define MT_WF_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000)
4911-#define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs))
4912-
4913-#define MT_MIB_SCR1(_band) MT_WF_MIB(_band, 0x004)
4914-#define MT_MIB_TXDUR_EN BIT(8)
4915-#define MT_MIB_RXDUR_EN BIT(9)
4916-
4917-#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x698)
4918-#define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(31, 16)
4919-
4920-#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x780)
4921-
4922-#define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c)
4923-#define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0)
4924-
4925-#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x558)
4926-#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x564)
4927-#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x568)
4928-
4929-#define MT_MIB_SDR16(_band) MT_WF_MIB(_band, 0x048)
4930-#define MT_MIB_SDR16_BUSY_MASK GENMASK(23, 0)
4931-
4932-#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x770)
4933-#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x774)
4934-#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x55c)
4935-
4936-#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x7a8)
4937-#define MT_MIB_SDR9_IBF_CNT_MASK GENMASK(31, 16)
4938-#define MT_MIB_SDR9_EBF_CNT_MASK GENMASK(15, 0)
4939-
4940-#define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090)
4941-#define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0)
4942-
4943-#define MT_MIB_SDR36(_band) MT_WF_MIB(_band, 0x054)
4944-#define MT_MIB_SDR36_TXTIME_MASK GENMASK(23, 0)
4945-#define MT_MIB_SDR37(_band) MT_WF_MIB(_band, 0x058)
4946-#define MT_MIB_SDR37_RXTIME_MASK GENMASK(23, 0)
4947-
4948-#define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0)
4949-#define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4)
4950-#define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc)
4951-
4952-#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, 0x100 + ((n) << 4))
4953-#define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16)
4954-
4955-#define MT_MIB_MB_BSDR0(_band) MT_WF_MIB(_band, 0x688)
4956-#define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0)
4957-#define MT_MIB_MB_BSDR1(_band) MT_WF_MIB(_band, 0x690)
4958-#define MT_MIB_RTS_FAIL_COUNT_MASK GENMASK(15, 0)
4959-#define MT_MIB_MB_BSDR2(_band) MT_WF_MIB(_band, 0x518)
4960-#define MT_MIB_BA_FAIL_COUNT_MASK GENMASK(15, 0)
4961-#define MT_MIB_MB_BSDR3(_band) MT_WF_MIB(_band, 0x520)
4962-#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(15, 0)
4963-
4964-#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4))
4965-#define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0)
4966-
4967-#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, 0x7dc + ((n) << 2))
4968-#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, 0x7ec + ((n) << 2))
4969-#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, 0x0b0 + ((n) << 2))
4970-#define MT_MIB_ARNCR_RANGE(val, n) (((val) >> ((n) << 3)) & GENMASK(7, 0))
4971-
4972-#define MT_WTBLON_TOP_BASE 0x820d4000
4973-#define MT_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs))
4974-#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(0x200)
4975-#define MT_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0)
4976-
4977-#define MT_WTBL_UPDATE MT_WTBLON_TOP(0x230)
4978-#define MT_WTBL_UPDATE_WLAN_IDX GENMASK(9, 0)
4979-#define MT_WTBL_UPDATE_ADM_COUNT_CLEAR BIT(12)
4980-#define MT_WTBL_UPDATE_BUSY BIT(31)
4981-
4982-#define MT_WTBL_BASE 0x820d8000
4983-#define MT_WTBL_LMAC_ID GENMASK(14, 8)
4984-#define MT_WTBL_LMAC_DW GENMASK(7, 2)
4985-#define MT_WTBL_LMAC_OFFS(_id, _dw) (MT_WTBL_BASE | \
4986- FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \
4987- FIELD_PREP(MT_WTBL_LMAC_DW, _dw))
4988-
4989-/* AGG: band 0(0x20800), band 1(0xa0800) */
4990-#define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000)
4991-#define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs))
4992-
4993-#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4)
4994-#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4)
4995-#define MT_AGG_PCR0_MM_PROT BIT(0)
4996-#define MT_AGG_PCR0_GF_PROT BIT(1)
4997-#define MT_AGG_PCR0_BW20_PROT BIT(2)
4998-#define MT_AGG_PCR0_BW40_PROT BIT(4)
4999-#define MT_AGG_PCR0_BW80_PROT BIT(6)
5000-#define MT_AGG_PCR0_ERP_PROT GENMASK(12, 8)
5001-#define MT_AGG_PCR0_VHT_PROT BIT(13)
5002-#define MT_AGG_PCR0_PTA_WIN_DIS BIT(15)
5003-
5004-#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23)
5005-#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0)
5006-
5007-#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, 0x084)
5008-#define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0)
5009-#define MT_AGG_ACR_BAR_RATE GENMASK(29, 16)
5010-
5011-#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, 0x098)
5012-#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12)
5013-#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6)
5014-#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7)
5015-#define MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT GENMASK(28, 24)
5016-
5017-#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, 0x0f0)
5018-#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, 0x0f4)
5019-
5020-/* ARB: band 0(0x20c00), band 1(0xa0c00) */
5021-#define MT_WF_ARB_BASE(_band) ((_band) ? 0x820f3000 : 0x820e3000)
5022-#define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs))
5023-
5024-#define MT_ARB_SCR(_band) MT_WF_ARB(_band, 0x080)
5025-#define MT_ARB_SCR_TX_DISABLE BIT(8)
5026-#define MT_ARB_SCR_RX_DISABLE BIT(9)
5027-
5028-#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4)
5029-
5030-/* RMAC: band 0(0x21400), band 1(0xa1400) */
5031-#define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000)
5032-#define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs))
5033-
5034-#define MT_WF_RFCR(_band) MT_WF_RMAC(_band, 0x000)
5035-#define MT_WF_RFCR_DROP_STBC_MULTI BIT(0)
5036-#define MT_WF_RFCR_DROP_FCSFAIL BIT(1)
5037-#define MT_WF_RFCR_DROP_VERSION BIT(3)
5038-#define MT_WF_RFCR_DROP_PROBEREQ BIT(4)
5039-#define MT_WF_RFCR_DROP_MCAST BIT(5)
5040-#define MT_WF_RFCR_DROP_BCAST BIT(6)
5041-#define MT_WF_RFCR_DROP_MCAST_FILTERED BIT(7)
5042-#define MT_WF_RFCR_DROP_A3_MAC BIT(8)
5043-#define MT_WF_RFCR_DROP_A3_BSSID BIT(9)
5044-#define MT_WF_RFCR_DROP_A2_BSSID BIT(10)
5045-#define MT_WF_RFCR_DROP_OTHER_BEACON BIT(11)
5046-#define MT_WF_RFCR_DROP_FRAME_REPORT BIT(12)
5047-#define MT_WF_RFCR_DROP_CTL_RSV BIT(13)
5048-#define MT_WF_RFCR_DROP_CTS BIT(14)
5049-#define MT_WF_RFCR_DROP_RTS BIT(15)
5050-#define MT_WF_RFCR_DROP_DUPLICATE BIT(16)
5051-#define MT_WF_RFCR_DROP_OTHER_BSS BIT(17)
5052-#define MT_WF_RFCR_DROP_OTHER_UC BIT(18)
5053-#define MT_WF_RFCR_DROP_OTHER_TIM BIT(19)
5054-#define MT_WF_RFCR_DROP_NDPA BIT(20)
5055-#define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21)
5056-
5057-#define MT_WF_RFCR1(_band) MT_WF_RMAC(_band, 0x004)
5058-#define MT_WF_RFCR1_DROP_ACK BIT(4)
5059-#define MT_WF_RFCR1_DROP_BF_POLL BIT(5)
5060-#define MT_WF_RFCR1_DROP_BA BIT(6)
5061-#define MT_WF_RFCR1_DROP_CFEND BIT(7)
5062-#define MT_WF_RFCR1_DROP_CFACK BIT(8)
5063-
5064-#define MT_WF_RMAC_MIB_TIME0(_band) MT_WF_RMAC(_band, 0x03c4)
5065-#define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31)
5066-#define MT_WF_RMAC_MIB_RXTIME_EN BIT(30)
5067-
5068-#define MT_WF_RMAC_MIB_AIRTIME14(_band) MT_WF_RMAC(_band, 0x03b8)
5069-#define MT_MIB_OBSSTIME_MASK GENMASK(23, 0)
5070-#define MT_WF_RMAC_MIB_AIRTIME0(_band) MT_WF_RMAC(_band, 0x0380)
5071-
5072-/* WFDMA0 */
5073-#define MT_WFDMA0_BASE 0xd4000
5074-#define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs))
5075-
5076-#define MT_WFDMA0_RST MT_WFDMA0(0x100)
5077-#define MT_WFDMA0_RST_LOGIC_RST BIT(4)
5078-#define MT_WFDMA0_RST_DMASHDL_ALL_RST BIT(5)
5079-
5080-#define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c)
5081-#define MT_WFDMA0_BUSY_ENA_TX_FIFO0 BIT(0)
5082-#define MT_WFDMA0_BUSY_ENA_TX_FIFO1 BIT(1)
5083-#define MT_WFDMA0_BUSY_ENA_RX_FIFO BIT(2)
5084-
5085-#define MT_MCU_CMD MT_WFDMA0(0x1f0)
5086-#define MT_MCU_CMD_WAKE_RX_PCIE BIT(0)
5087-#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1)
5088-#define MT_MCU_CMD_STOP_DMA BIT(2)
5089-#define MT_MCU_CMD_RESET_DONE BIT(3)
5090-#define MT_MCU_CMD_RECOVERY_DONE BIT(4)
5091-#define MT_MCU_CMD_NORMAL_STATE BIT(5)
5092-#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1)
5093-
5094-#define MT_MCU2HOST_SW_INT_ENA MT_WFDMA0(0x1f4)
5095-
5096-#define MT_WFDMA0_HOST_INT_STA MT_WFDMA0(0x200)
5097-#define HOST_RX_DONE_INT_STS0 BIT(0) /* Rx mcu */
5098-#define HOST_RX_DONE_INT_STS2 BIT(2) /* Rx data */
5099-#define HOST_RX_DONE_INT_STS4 BIT(22) /* Rx mcu after fw downloaded */
5100-#define HOST_TX_DONE_INT_STS16 BIT(26)
5101-#define HOST_TX_DONE_INT_STS17 BIT(27) /* MCU tx done*/
5102-
5103 #define MT_WFDMA0_HOST_INT_ENA MT_WFDMA0(0x204)
5104-#define HOST_RX_DONE_INT_ENA0 BIT(0)
5105-#define HOST_RX_DONE_INT_ENA1 BIT(1)
5106-#define HOST_RX_DONE_INT_ENA2 BIT(2)
5107-#define HOST_RX_DONE_INT_ENA3 BIT(3)
5108-#define HOST_TX_DONE_INT_ENA0 BIT(4)
5109-#define HOST_TX_DONE_INT_ENA1 BIT(5)
5110-#define HOST_TX_DONE_INT_ENA2 BIT(6)
5111-#define HOST_TX_DONE_INT_ENA3 BIT(7)
5112-#define HOST_TX_DONE_INT_ENA4 BIT(8)
5113-#define HOST_TX_DONE_INT_ENA5 BIT(9)
5114-#define HOST_TX_DONE_INT_ENA6 BIT(10)
5115-#define HOST_TX_DONE_INT_ENA7 BIT(11)
5116 #define HOST_TX_DONE_INT_ENA8 BIT(12)
5117 #define HOST_TX_DONE_INT_ENA9 BIT(13)
5118 #define HOST_TX_DONE_INT_ENA10 BIT(14)
5119@@ -327,14 +36,10 @@
5120 #define HOST_TX_DONE_INT_ENA12 BIT(16)
5121 #define HOST_TX_DONE_INT_ENA13 BIT(17)
5122 #define HOST_TX_DONE_INT_ENA14 BIT(18)
5123-#define HOST_RX_COHERENT_EN BIT(20)
5124-#define HOST_TX_COHERENT_EN BIT(21)
5125 #define HOST_RX_DONE_INT_ENA4 BIT(22)
5126 #define HOST_RX_DONE_INT_ENA5 BIT(23)
5127 #define HOST_TX_DONE_INT_ENA16 BIT(26)
5128 #define HOST_TX_DONE_INT_ENA17 BIT(27)
5129-#define MCU2HOST_SW_INT_ENA BIT(29)
5130-#define HOST_TX_DONE_INT_ENA18 BIT(30)
5131
5132 /* WFDMA interrupt */
5133 #define MT_INT_RX_DONE_DATA HOST_RX_DONE_INT_ENA2
5134@@ -346,7 +51,6 @@
5135 #define MT_INT_TX_DONE_MCU_WM HOST_TX_DONE_INT_ENA17
5136 #define MT_INT_TX_DONE_FWDL HOST_TX_DONE_INT_ENA16
5137 #define MT_INT_TX_DONE_BAND0 HOST_TX_DONE_INT_ENA0
5138-#define MT_INT_MCU_CMD MCU2HOST_SW_INT_ENA
5139
5140 #define MT_INT_TX_DONE_MCU (MT_INT_TX_DONE_MCU_WM | \
5141 MT_INT_TX_DONE_FWDL)
5142@@ -354,56 +58,8 @@
5143 MT_INT_TX_DONE_BAND0 | \
5144 GENMASK(18, 4))
5145
5146-#define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208)
5147-#define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0)
5148-#define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1)
5149-#define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2)
5150-#define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3)
5151-#define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6)
5152-#define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9)
5153-#define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12)
5154-#define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15)
5155-#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21)
5156-#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27)
5157-#define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28)
5158-#define MT_WFDMA0_GLO_CFG_CLK_GAT_DIS BIT(30)
5159-
5160-#define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c)
5161-#define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0)
5162-#define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6)
5163-#define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0)
5164-
5165 #define MT_RX_DATA_RING_BASE MT_WFDMA0(0x520)
5166
5167-#define MT_WFDMA0_TX_RING0_EXT_CTRL MT_WFDMA0(0x600)
5168-#define MT_WFDMA0_TX_RING1_EXT_CTRL MT_WFDMA0(0x604)
5169-#define MT_WFDMA0_TX_RING2_EXT_CTRL MT_WFDMA0(0x608)
5170-#define MT_WFDMA0_TX_RING3_EXT_CTRL MT_WFDMA0(0x60c)
5171-#define MT_WFDMA0_TX_RING4_EXT_CTRL MT_WFDMA0(0x610)
5172-#define MT_WFDMA0_TX_RING5_EXT_CTRL MT_WFDMA0(0x614)
5173-#define MT_WFDMA0_TX_RING6_EXT_CTRL MT_WFDMA0(0x618)
5174-#define MT_WFDMA0_TX_RING16_EXT_CTRL MT_WFDMA0(0x640)
5175-#define MT_WFDMA0_TX_RING17_EXT_CTRL MT_WFDMA0(0x644)
5176-
5177-#define MT_WPDMA0_MAX_CNT_MASK GENMASK(7, 0)
5178-#define MT_WPDMA0_BASE_PTR_MASK GENMASK(31, 16)
5179-
5180-#define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680)
5181-#define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684)
5182-#define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688)
5183-#define MT_WFDMA0_RX_RING3_EXT_CTRL MT_WFDMA0(0x68c)
5184-#define MT_WFDMA0_RX_RING4_EXT_CTRL MT_WFDMA0(0x690)
5185-#define MT_WFDMA0_RX_RING5_EXT_CTRL MT_WFDMA0(0x694)
5186-
5187-#define MT_TX_RING_BASE MT_WFDMA0(0x300)
5188-#define MT_RX_EVENT_RING_BASE MT_WFDMA0(0x500)
5189-
5190-/* WFDMA CSR */
5191-#define MT_WFDMA_EXT_CSR_BASE 0xd7000
5192-#define MT_WFDMA_EXT_CSR(ofs) (MT_WFDMA_EXT_CSR_BASE + (ofs))
5193-#define MT_WFDMA_EXT_CSR_HIF_MISC MT_WFDMA_EXT_CSR(0x44)
5194-#define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0)
5195-
5196 #define MT_INFRA_CFG_BASE 0xfe000
5197 #define MT_INFRA(ofs) (MT_INFRA_CFG_BASE + (ofs))
5198
5199@@ -413,121 +69,13 @@
5200 #define MT_HIF_REMAP_L1_BASE GENMASK(31, 16)
5201 #define MT_HIF_REMAP_BASE_L1 0x40000
5202
5203-#define MT_SWDEF_BASE 0x41f200
5204-#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs))
5205-#define MT_SWDEF_MODE MT_SWDEF(0x3c)
5206-#define MT_SWDEF_NORMAL_MODE 0
5207-#define MT_SWDEF_ICAP_MODE 1
5208-#define MT_SWDEF_SPECTRUM_MODE 2
5209-
5210-#define MT_TOP_BASE 0x18060000
5211-#define MT_TOP(ofs) (MT_TOP_BASE + (ofs))
5212-
5213-#define MT_TOP_LPCR_HOST_BAND0 MT_TOP(0x10)
5214-#define MT_TOP_LPCR_HOST_FW_OWN BIT(0)
5215-#define MT_TOP_LPCR_HOST_DRV_OWN BIT(1)
5216-
5217-#define MT_TOP_MISC MT_TOP(0xf0)
5218-#define MT_TOP_MISC_FW_STATE GENMASK(2, 0)
5219-
5220-#define MT_MCU_WPDMA0_BASE 0x54000000
5221-#define MT_MCU_WPDMA0(ofs) (MT_MCU_WPDMA0_BASE + (ofs))
5222-
5223-#define MT_WFDMA_DUMMY_CR MT_MCU_WPDMA0(0x120)
5224-#define MT_WFDMA_NEED_REINIT BIT(1)
5225-
5226-#define MT_CBTOP_RGU(ofs) (0x70002000 + (ofs))
5227-#define MT_CBTOP_RGU_WF_SUBSYS_RST MT_CBTOP_RGU(0x600)
5228-#define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0)
5229-
5230-#define MT_HW_BOUND 0x70010020
5231-#define MT_HW_CHIPID 0x70010200
5232-#define MT_HW_REV 0x70010204
5233-
5234-#define MT_PCIE_MAC_BASE 0x10000
5235-#define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs))
5236-#define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188)
5237-#define MT_PCIE_MAC_PM MT_PCIE_MAC(0x194)
5238-#define MT_PCIE_MAC_PM_L0S_DIS BIT(8)
5239-
5240-#define MT_DMA_SHDL(ofs) (0x7c026000 + (ofs))
5241-#define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004)
5242-#define MT_DMASHDL_DMASHDL_BYPASS BIT(28)
5243-#define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008)
5244-#define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c)
5245-#define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16)
5246-#define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010)
5247-#define MT_DMASHDL_REFILL_MASK GENMASK(31, 16)
5248-#define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c)
5249-#define MT_DMASHDL_PKT_MAX_SIZE_PLE GENMASK(11, 0)
5250-#define MT_DMASHDL_PKT_MAX_SIZE_PSE GENMASK(27, 16)
5251-
5252-#define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2))
5253-#define MT_DMASHDL_GROUP_QUOTA_MIN GENMASK(11, 0)
5254-#define MT_DMASHDL_GROUP_QUOTA_MAX GENMASK(27, 16)
5255-
5256-#define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2))
5257-#define MT_DMASHDL_Q_MAP_MASK GENMASK(3, 0)
5258-#define MT_DMASHDL_Q_MAP_SHIFT(_n) (4 * ((_n) % 8))
5259-
5260-#define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2))
5261-
5262-#define MT_WFDMA_HOST_CONFIG 0x7c027030
5263-#define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6)
5264-
5265-#define MT_UMAC(ofs) (0x74000000 + (ofs))
5266-#define MT_UDMA_TX_QSEL MT_UMAC(0x008)
5267-#define MT_FW_DL_EN BIT(3)
5268-
5269-#define MT_UDMA_WLCFG_1 MT_UMAC(0x00c)
5270-#define MT_WL_RX_AGG_PKT_LMT GENMASK(7, 0)
5271-#define MT_WL_TX_TMOUT_LMT GENMASK(27, 8)
5272-
5273-#define MT_UDMA_WLCFG_0 MT_UMAC(0x18)
5274-#define MT_WL_RX_AGG_TO GENMASK(7, 0)
5275-#define MT_WL_RX_AGG_LMT GENMASK(15, 8)
5276-#define MT_WL_TX_TMOUT_FUNC_EN BIT(16)
5277-#define MT_WL_TX_DPH_CHK_EN BIT(17)
5278-#define MT_WL_RX_MPSZ_PAD0 BIT(18)
5279-#define MT_WL_RX_FLUSH BIT(19)
5280-#define MT_TICK_1US_EN BIT(20)
5281-#define MT_WL_RX_AGG_EN BIT(21)
5282-#define MT_WL_RX_EN BIT(22)
5283-#define MT_WL_TX_EN BIT(23)
5284-#define MT_WL_RX_BUSY BIT(30)
5285-#define MT_WL_TX_BUSY BIT(31)
5286-
5287-#define MT_UDMA_CONN_INFRA_STATUS MT_UMAC(0xa20)
5288-#define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22)
5289-#define MT_UDMA_CONN_INFRA_STATUS_SEL MT_UMAC(0xa24)
5290-
5291-#define MT_SSUSB_EPCTL_CSR(ofs) (0x74011800 + (ofs))
5292-#define MT_SSUSB_EPCTL_CSR_EP_RST_OPT MT_SSUSB_EPCTL_CSR(0x090)
5293-
5294-#define MT_UWFDMA0(ofs) (0x7c024000 + (ofs))
5295-#define MT_UWFDMA0_GLO_CFG MT_UWFDMA0(0x208)
5296-#define MT_UWFDMA0_GLO_CFG_EXT0 MT_UWFDMA0(0x2b0)
5297-#define MT_UWFDMA0_TX_RING_EXT_CTRL(_n) MT_UWFDMA0(0x600 + ((_n) << 2))
5298-
5299-#define MT_CONN_STATUS 0x7c053c10
5300-#define MT_WIFI_PATCH_DL_STATE BIT(0)
5301-
5302-#define MT_CONN_ON_LPCTL 0x7c060010
5303-#define PCIE_LPCR_HOST_OWN_SYNC BIT(2)
5304-#define PCIE_LPCR_HOST_CLR_OWN BIT(1)
5305-#define PCIE_LPCR_HOST_SET_OWN BIT(0)
5306-
5307 #define MT_WFSYS_SW_RST_B 0x18000140
5308-#define WFSYS_SW_RST_B BIT(0)
5309-#define WFSYS_SW_INIT_DONE BIT(4)
5310
5311-#define MT_CONN_ON_MISC 0x7c0600f0
5312-#define MT_TOP_MISC2_FW_PWR_ON BIT(0)
5313-#define MT_TOP_MISC2_FW_N9_RDY GENMASK(1, 0)
5314+#define MT_WTBLON_TOP_WDUCR MT_WTBLON_TOP(0x200)
5315+#define MT_WTBLON_TOP_WDUCR_GROUP GENMASK(2, 0)
5316
5317-#define MT_WF_SW_DEF_CR(ofs) (0x401a00 + (ofs))
5318-#define MT_WF_SW_DEF_CR_USB_MCU_EVENT MT_WF_SW_DEF_CR(0x028)
5319-#define MT_WF_SW_SER_TRIGGER_SUSPEND BIT(6)
5320-#define MT_WF_SW_SER_DONE_SUSPEND BIT(7)
5321+#define MT_WTBL_UPDATE MT_WTBLON_TOP(0x230)
5322+#define MT_WTBL_UPDATE_WLAN_IDX GENMASK(9, 0)
5323+#define MT_WTBL_UPDATE_ADM_COUNT_CLEAR BIT(12)
5324
5325 #endif
5326diff --git a/mt7921/sdio.c b/mt7921/sdio.c
5327index e2e4b2c6..b192d2fa 100644
5328--- a/mt7921/sdio.c
5329+++ b/mt7921/sdio.c
5330@@ -27,7 +27,7 @@ static void mt7921s_txrx_worker(struct mt76_worker *w)
5331 struct mt76_sdio *sdio = container_of(w, struct mt76_sdio,
5332 txrx_worker);
5333 struct mt76_dev *mdev = container_of(sdio, struct mt76_dev, sdio);
5334- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
5335+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
5336
5337 if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
5338 queue_work(mdev->wq, &dev->pm.wake_work);
5339@@ -38,7 +38,7 @@ static void mt7921s_txrx_worker(struct mt76_worker *w)
5340 mt76_connac_pm_unref(&dev->mphy, &dev->pm);
5341 }
5342
5343-static void mt7921s_unregister_device(struct mt7921_dev *dev)
5344+static void mt7921s_unregister_device(struct mt792x_dev *dev)
5345 {
5346 struct mt76_connac_pm *pm = &dev->pm;
5347
5348@@ -102,7 +102,7 @@ static int mt7921s_probe(struct sdio_func *func,
5349 .sta_add = mt7921_mac_sta_add,
5350 .sta_assoc = mt7921_mac_sta_assoc,
5351 .sta_remove = mt7921_mac_sta_remove,
5352- .update_survey = mt7921_update_channel,
5353+ .update_survey = mt792x_update_channel,
5354 };
5355 static const struct mt76_bus_ops mt7921s_ops = {
5356 .rr = mt76s_rr,
5357@@ -114,7 +114,7 @@ static int mt7921s_probe(struct sdio_func *func,
5358 .rd_rp = mt76s_rd_rp,
5359 .type = MT76_BUS_SDIO,
5360 };
5361- static const struct mt7921_hif_ops mt7921_sdio_ops = {
5362+ static const struct mt792x_hif_ops mt7921_sdio_ops = {
5363 .init_reset = mt7921s_init_reset,
5364 .reset = mt7921s_mac_reset,
5365 .mcu_init = mt7921s_mcu_init,
5366@@ -122,13 +122,13 @@ static int mt7921s_probe(struct sdio_func *func,
5367 .fw_own = mt7921s_mcu_fw_pmctrl,
5368 };
5369 struct ieee80211_ops *ops;
5370- struct mt7921_dev *dev;
5371+ struct mt792x_dev *dev;
5372 struct mt76_dev *mdev;
5373 u8 features;
5374 int ret;
5375
5376- ops = mt7921_get_mac80211_ops(&func->dev, (void *)id->driver_data,
5377- &features);
5378+ ops = mt792x_get_mac80211_ops(&func->dev, &mt7921_ops,
5379+ (void *)id->driver_data, &features);
5380 if (!ops)
5381 return -ENOMEM;
5382
5383@@ -136,7 +136,7 @@ static int mt7921s_probe(struct sdio_func *func,
5384 if (!mdev)
5385 return -ENOMEM;
5386
5387- dev = container_of(mdev, struct mt7921_dev, mt76);
5388+ dev = container_of(mdev, struct mt792x_dev, mt76);
5389 dev->fw_features = features;
5390 dev->hif_ops = &mt7921_sdio_ops;
5391 sdio_set_drvdata(func, dev);
5392@@ -196,7 +196,7 @@ error:
5393
5394 static void mt7921s_remove(struct sdio_func *func)
5395 {
5396- struct mt7921_dev *dev = sdio_get_drvdata(func);
5397+ struct mt792x_dev *dev = sdio_get_drvdata(func);
5398
5399 mt7921s_unregister_device(dev);
5400 }
5401@@ -205,7 +205,7 @@ static void mt7921s_remove(struct sdio_func *func)
5402 static int mt7921s_suspend(struct device *__dev)
5403 {
5404 struct sdio_func *func = dev_to_sdio_func(__dev);
5405- struct mt7921_dev *dev = sdio_get_drvdata(func);
5406+ struct mt792x_dev *dev = sdio_get_drvdata(func);
5407 struct mt76_connac_pm *pm = &dev->pm;
5408 struct mt76_dev *mdev = &dev->mt76;
5409 int err;
5410@@ -217,7 +217,7 @@ static int mt7921s_suspend(struct device *__dev)
5411 cancel_delayed_work_sync(&pm->ps_work);
5412 cancel_work_sync(&pm->wake_work);
5413
5414- err = mt7921_mcu_drv_pmctrl(dev);
5415+ err = mt792x_mcu_drv_pmctrl(dev);
5416 if (err < 0)
5417 goto restore_suspend;
5418
5419@@ -245,7 +245,7 @@ static int mt7921s_suspend(struct device *__dev)
5420 mt76_worker_disable(&mdev->sdio.txrx_worker);
5421 mt76_worker_disable(&mdev->sdio.net_worker);
5422
5423- err = mt7921_mcu_fw_pmctrl(dev);
5424+ err = mt792x_mcu_fw_pmctrl(dev);
5425 if (err)
5426 goto restore_txrx_worker;
5427
5428@@ -270,7 +270,7 @@ restore_suspend:
5429 pm->suspended = false;
5430
5431 if (err < 0)
5432- mt7921_reset(&dev->mt76);
5433+ mt792x_reset(&dev->mt76);
5434
5435 return err;
5436 }
5437@@ -278,14 +278,14 @@ restore_suspend:
5438 static int mt7921s_resume(struct device *__dev)
5439 {
5440 struct sdio_func *func = dev_to_sdio_func(__dev);
5441- struct mt7921_dev *dev = sdio_get_drvdata(func);
5442+ struct mt792x_dev *dev = sdio_get_drvdata(func);
5443 struct mt76_connac_pm *pm = &dev->pm;
5444 struct mt76_dev *mdev = &dev->mt76;
5445 int err;
5446
5447 clear_bit(MT76_STATE_SUSPEND, &mdev->phy.state);
5448
5449- err = mt7921_mcu_drv_pmctrl(dev);
5450+ err = mt792x_mcu_drv_pmctrl(dev);
5451 if (err < 0)
5452 goto failed;
5453
5454@@ -303,7 +303,7 @@ failed:
5455 pm->suspended = false;
5456
5457 if (err < 0)
5458- mt7921_reset(&dev->mt76);
5459+ mt792x_reset(&dev->mt76);
5460
5461 return err;
5462 }
5463diff --git a/mt7921/sdio_mac.c b/mt7921/sdio_mac.c
5464index cff9925c..8edd0291 100644
5465--- a/mt7921/sdio_mac.c
5466+++ b/mt7921/sdio_mac.c
5467@@ -30,7 +30,7 @@ static u32 mt7921s_read_whcr(struct mt76_dev *dev)
5468 return sdio_readl(dev->sdio.func, MCR_WHCR, NULL);
5469 }
5470
5471-int mt7921s_wfsys_reset(struct mt7921_dev *dev)
5472+int mt7921s_wfsys_reset(struct mt792x_dev *dev)
5473 {
5474 struct mt76_sdio *sdio = &dev->mt76.sdio;
5475 u32 val, status;
5476@@ -71,7 +71,7 @@ int mt7921s_wfsys_reset(struct mt7921_dev *dev)
5477 return 0;
5478 }
5479
5480-int mt7921s_init_reset(struct mt7921_dev *dev)
5481+int mt7921s_init_reset(struct mt792x_dev *dev)
5482 {
5483 set_bit(MT76_MCU_RESET, &dev->mphy.state);
5484
5485@@ -91,7 +91,7 @@ int mt7921s_init_reset(struct mt7921_dev *dev)
5486 return 0;
5487 }
5488
5489-int mt7921s_mac_reset(struct mt7921_dev *dev)
5490+int mt7921s_mac_reset(struct mt792x_dev *dev)
5491 {
5492 int err;
5493
5494diff --git a/mt7921/sdio_mcu.c b/mt7921/sdio_mcu.c
5495index 177679ce..310eeca0 100644
5496--- a/mt7921/sdio_mcu.c
5497+++ b/mt7921/sdio_mcu.c
5498@@ -16,14 +16,14 @@ static int
5499 mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
5500 int cmd, int *seq)
5501 {
5502- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
5503+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
5504 enum mt7921_sdio_pkt_type type = MT7921_SDIO_CMD;
5505 enum mt76_mcuq_id txq = MT_MCUQ_WM;
5506 int ret, pad;
5507
5508 /* We just return in case firmware assertion to avoid blocking the
5509 * common workqueue to run, for example, the coredump work might be
5510- * blocked by mt7921_mac_work that is excuting register access via sdio
5511+ * blocked by mt792x_mac_work that is excuting register access via sdio
5512 * bus.
5513 */
5514 if (dev->fw_assert)
5515@@ -51,14 +51,14 @@ mt7921s_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
5516 return ret;
5517 }
5518
5519-static u32 mt7921s_read_rm3r(struct mt7921_dev *dev)
5520+static u32 mt7921s_read_rm3r(struct mt792x_dev *dev)
5521 {
5522 struct mt76_sdio *sdio = &dev->mt76.sdio;
5523
5524 return sdio_readl(sdio->func, MCR_D2HRM3R, NULL);
5525 }
5526
5527-static u32 mt7921s_clear_rm3r_drv_own(struct mt7921_dev *dev)
5528+static u32 mt7921s_clear_rm3r_drv_own(struct mt792x_dev *dev)
5529 {
5530 struct mt76_sdio *sdio = &dev->mt76.sdio;
5531 u32 val;
5532@@ -71,7 +71,7 @@ static u32 mt7921s_clear_rm3r_drv_own(struct mt7921_dev *dev)
5533 return val;
5534 }
5535
5536-int mt7921s_mcu_init(struct mt7921_dev *dev)
5537+int mt7921s_mcu_init(struct mt792x_dev *dev)
5538 {
5539 static const struct mt76_mcu_ops mt7921s_mcu_ops = {
5540 .headroom = MT_SDIO_HDR_SIZE +
5541@@ -97,7 +97,7 @@ int mt7921s_mcu_init(struct mt7921_dev *dev)
5542 return 0;
5543 }
5544
5545-int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev)
5546+int mt7921s_mcu_drv_pmctrl(struct mt792x_dev *dev)
5547 {
5548 struct sdio_func *func = dev->mt76.sdio.func;
5549 struct mt76_phy *mphy = &dev->mt76.phy;
5550@@ -133,7 +133,7 @@ int mt7921s_mcu_drv_pmctrl(struct mt7921_dev *dev)
5551 return 0;
5552 }
5553
5554-int mt7921s_mcu_fw_pmctrl(struct mt7921_dev *dev)
5555+int mt7921s_mcu_fw_pmctrl(struct mt792x_dev *dev)
5556 {
5557 struct sdio_func *func = dev->mt76.sdio.func;
5558 struct mt76_phy *mphy = &dev->mt76.phy;
5559diff --git a/mt7921/testmode.c b/mt7921/testmode.c
5560index 7f408212..e838d934 100644
5561--- a/mt7921/testmode.c
5562+++ b/mt7921/testmode.c
5563@@ -31,7 +31,7 @@ static const struct nla_policy mt7921_tm_policy[NUM_MT7921_TM_ATTRS] = {
5564 };
5565
5566 static int
5567-mt7921_tm_set(struct mt7921_dev *dev, struct mt7921_tm_cmd *req)
5568+mt7921_tm_set(struct mt792x_dev *dev, struct mt7921_tm_cmd *req)
5569 {
5570 struct mt7921_rftest_cmd cmd = {
5571 .action = req->action,
5572@@ -57,7 +57,7 @@ mt7921_tm_set(struct mt7921_dev *dev, struct mt7921_tm_cmd *req)
5573 pm->enable = false;
5574 cancel_delayed_work_sync(&pm->ps_work);
5575 cancel_work_sync(&pm->wake_work);
5576- __mt7921_mcu_drv_pmctrl(dev);
5577+ __mt792x_mcu_drv_pmctrl(dev);
5578
5579 phy->test.state = MT76_TM_STATE_ON;
5580 }
5581@@ -82,7 +82,7 @@ out:
5582 }
5583
5584 static int
5585-mt7921_tm_query(struct mt7921_dev *dev, struct mt7921_tm_cmd *req,
5586+mt7921_tm_query(struct mt792x_dev *dev, struct mt7921_tm_cmd *req,
5587 struct mt7921_tm_evt *evt_resp)
5588 {
5589 struct mt7921_rftest_cmd cmd = {
5590@@ -113,7 +113,7 @@ int mt7921_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5591 {
5592 struct nlattr *tb[NUM_MT76_TM_ATTRS];
5593 struct mt76_phy *mphy = hw->priv;
5594- struct mt7921_phy *phy = mphy->priv;
5595+ struct mt792x_phy *phy = mphy->priv;
5596 int err;
5597
5598 if (!test_bit(MT76_STATE_RUNNING, &mphy->state) ||
5599@@ -150,7 +150,7 @@ int mt7921_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg,
5600 {
5601 struct nlattr *tb[NUM_MT76_TM_ATTRS];
5602 struct mt76_phy *mphy = hw->priv;
5603- struct mt7921_phy *phy = mphy->priv;
5604+ struct mt792x_phy *phy = mphy->priv;
5605 int err;
5606
5607 if (!test_bit(MT76_STATE_RUNNING, &mphy->state) ||
5608diff --git a/mt7921/trace.c b/mt7921/trace.c
5609deleted file mode 100644
5610index 4dc3c7b8..00000000
5611--- a/mt7921/trace.c
5612+++ /dev/null
5613@@ -1,12 +0,0 @@
5614-// SPDX-License-Identifier: ISC
5615-/*
5616- * Copyright (C) 2021 Lorenzo Bianconi <lorenzo@kernel.org>
5617- */
5618-
5619-#include <linux/module.h>
5620-
5621-#ifndef __CHECKER__
5622-#define CREATE_TRACE_POINTS
5623-#include "mt7921_trace.h"
5624-
5625-#endif
5626diff --git a/mt7921/usb.c b/mt7921/usb.c
5627index 1f302c43..59cd3d98 100644
5628--- a/mt7921/usb.c
5629+++ b/mt7921/usb.c
5630@@ -24,88 +24,11 @@ static const struct usb_device_id mt7921u_device_table[] = {
5631 { },
5632 };
5633
5634-static u32 mt7921u_rr(struct mt76_dev *dev, u32 addr)
5635-{
5636- u32 ret;
5637-
5638- mutex_lock(&dev->usb.usb_ctrl_mtx);
5639- ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
5640- USB_DIR_IN | MT_USB_TYPE_VENDOR, addr);
5641- mutex_unlock(&dev->usb.usb_ctrl_mtx);
5642-
5643- return ret;
5644-}
5645-
5646-static void mt7921u_wr(struct mt76_dev *dev, u32 addr, u32 val)
5647-{
5648- mutex_lock(&dev->usb.usb_ctrl_mtx);
5649- ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
5650- USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
5651- mutex_unlock(&dev->usb.usb_ctrl_mtx);
5652-}
5653-
5654-static u32 mt7921u_rmw(struct mt76_dev *dev, u32 addr,
5655- u32 mask, u32 val)
5656-{
5657- mutex_lock(&dev->usb.usb_ctrl_mtx);
5658- val |= ___mt76u_rr(dev, MT_VEND_READ_EXT,
5659- USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask;
5660- ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
5661- USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
5662- mutex_unlock(&dev->usb.usb_ctrl_mtx);
5663-
5664- return val;
5665-}
5666-
5667-static void mt7921u_copy(struct mt76_dev *dev, u32 offset,
5668- const void *data, int len)
5669-{
5670- struct mt76_usb *usb = &dev->usb;
5671- int ret, i = 0, batch_len;
5672- const u8 *val = data;
5673-
5674- len = round_up(len, 4);
5675-
5676- mutex_lock(&usb->usb_ctrl_mtx);
5677- while (i < len) {
5678- batch_len = min_t(int, usb->data_len, len - i);
5679- memcpy(usb->data, val + i, batch_len);
5680- ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
5681- USB_DIR_OUT | MT_USB_TYPE_VENDOR,
5682- (offset + i) >> 16, offset + i,
5683- usb->data, batch_len);
5684- if (ret < 0)
5685- break;
5686-
5687- i += batch_len;
5688- }
5689- mutex_unlock(&usb->usb_ctrl_mtx);
5690-}
5691-
5692-int mt7921u_mcu_power_on(struct mt7921_dev *dev)
5693-{
5694- int ret;
5695-
5696- ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
5697- USB_DIR_OUT | MT_USB_TYPE_VENDOR,
5698- 0x0, 0x1, NULL, 0);
5699- if (ret)
5700- return ret;
5701-
5702- if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
5703- MT_TOP_MISC2_FW_PWR_ON, 500)) {
5704- dev_err(dev->mt76.dev, "Timeout for power on\n");
5705- ret = -EIO;
5706- }
5707-
5708- return ret;
5709-}
5710-
5711 static int
5712 mt7921u_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
5713 int cmd, int *seq)
5714 {
5715- struct mt7921_dev *dev = container_of(mdev, struct mt7921_dev, mt76);
5716+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
5717 u32 pad, ep;
5718 int ret;
5719
5720@@ -131,7 +54,7 @@ mt7921u_mcu_send_message(struct mt76_dev *mdev, struct sk_buff *skb,
5721 return ret;
5722 }
5723
5724-static int mt7921u_mcu_init(struct mt7921_dev *dev)
5725+static int mt7921u_mcu_init(struct mt792x_dev *dev)
5726 {
5727 static const struct mt76_mcu_ops mcu_ops = {
5728 .headroom = MT_SDIO_HDR_SIZE +
5729@@ -155,20 +78,69 @@ static int mt7921u_mcu_init(struct mt7921_dev *dev)
5730 return 0;
5731 }
5732
5733-static void mt7921u_stop(struct ieee80211_hw *hw)
5734+static int mt7921u_mac_reset(struct mt792x_dev *dev)
5735 {
5736- struct mt7921_dev *dev = mt7921_hw_dev(hw);
5737+ int err;
5738+
5739+ mt76_txq_schedule_all(&dev->mphy);
5740+ mt76_worker_disable(&dev->mt76.tx_worker);
5741
5742+ set_bit(MT76_RESET, &dev->mphy.state);
5743+ set_bit(MT76_MCU_RESET, &dev->mphy.state);
5744+
5745+ wake_up(&dev->mt76.mcu.wait);
5746+ skb_queue_purge(&dev->mt76.mcu.res_q);
5747+
5748+ mt76u_stop_rx(&dev->mt76);
5749 mt76u_stop_tx(&dev->mt76);
5750- mt7921_stop(hw);
5751+
5752+ mt792xu_wfsys_reset(dev);
5753+
5754+ clear_bit(MT76_MCU_RESET, &dev->mphy.state);
5755+ err = mt76u_resume_rx(&dev->mt76);
5756+ if (err)
5757+ goto out;
5758+
5759+ err = mt792xu_mcu_power_on(dev);
5760+ if (err)
5761+ goto out;
5762+
5763+ err = mt792xu_dma_init(dev, false);
5764+ if (err)
5765+ goto out;
5766+
5767+ mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
5768+ mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN);
5769+
5770+ err = mt7921_run_firmware(dev);
5771+ if (err)
5772+ goto out;
5773+
5774+ mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN);
5775+
5776+ err = mt7921_mcu_set_eeprom(dev);
5777+ if (err)
5778+ goto out;
5779+
5780+ err = mt7921_mac_init(dev);
5781+ if (err)
5782+ goto out;
5783+
5784+ err = __mt7921_start(&dev->phy);
5785+out:
5786+ clear_bit(MT76_RESET, &dev->mphy.state);
5787+
5788+ mt76_worker_enable(&dev->mt76.tx_worker);
5789+
5790+ return err;
5791 }
5792
5793-static void mt7921u_cleanup(struct mt7921_dev *dev)
5794+static void mt7921u_stop(struct ieee80211_hw *hw)
5795 {
5796- clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
5797- mt7921u_wfsys_reset(dev);
5798- skb_queue_purge(&dev->mt76.mcu.res_q);
5799- mt76u_queues_deinit(&dev->mt76);
5800+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
5801+
5802+ mt76u_stop_tx(&dev->mt76);
5803+ mt7921_stop(hw);
5804 }
5805
5806 static int mt7921u_probe(struct usb_interface *usb_intf,
5807@@ -189,31 +161,31 @@ static int mt7921u_probe(struct usb_interface *usb_intf,
5808 .sta_add = mt7921_mac_sta_add,
5809 .sta_assoc = mt7921_mac_sta_assoc,
5810 .sta_remove = mt7921_mac_sta_remove,
5811- .update_survey = mt7921_update_channel,
5812+ .update_survey = mt792x_update_channel,
5813 };
5814- static const struct mt7921_hif_ops hif_ops = {
5815+ static const struct mt792x_hif_ops hif_ops = {
5816 .mcu_init = mt7921u_mcu_init,
5817- .init_reset = mt7921u_init_reset,
5818+ .init_reset = mt792xu_init_reset,
5819 .reset = mt7921u_mac_reset,
5820 };
5821 static struct mt76_bus_ops bus_ops = {
5822- .rr = mt7921u_rr,
5823- .wr = mt7921u_wr,
5824- .rmw = mt7921u_rmw,
5825+ .rr = mt792xu_rr,
5826+ .wr = mt792xu_wr,
5827+ .rmw = mt792xu_rmw,
5828 .read_copy = mt76u_read_copy,
5829- .write_copy = mt7921u_copy,
5830+ .write_copy = mt792xu_copy,
5831 .type = MT76_BUS_USB,
5832 };
5833 struct usb_device *udev = interface_to_usbdev(usb_intf);
5834 struct ieee80211_ops *ops;
5835 struct ieee80211_hw *hw;
5836- struct mt7921_dev *dev;
5837+ struct mt792x_dev *dev;
5838 struct mt76_dev *mdev;
5839 u8 features;
5840 int ret;
5841
5842- ops = mt7921_get_mac80211_ops(&usb_intf->dev, (void *)id->driver_info,
5843- &features);
5844+ ops = mt792x_get_mac80211_ops(&usb_intf->dev, &mt7921_ops,
5845+ (void *)id->driver_info, &features);
5846 if (!ops)
5847 return -ENOMEM;
5848
5849@@ -222,7 +194,7 @@ static int mt7921u_probe(struct usb_interface *usb_intf,
5850 if (!mdev)
5851 return -ENOMEM;
5852
5853- dev = container_of(mdev, struct mt7921_dev, mt76);
5854+ dev = container_of(mdev, struct mt792x_dev, mt76);
5855 dev->fw_features = features;
5856 dev->hif_ops = &hif_ops;
5857
5858@@ -240,12 +212,12 @@ static int mt7921u_probe(struct usb_interface *usb_intf,
5859 dev_dbg(mdev->dev, "ASIC revision: %04x\n", mdev->rev);
5860
5861 if (mt76_get_field(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY)) {
5862- ret = mt7921u_wfsys_reset(dev);
5863+ ret = mt792xu_wfsys_reset(dev);
5864 if (ret)
5865 goto error;
5866 }
5867
5868- ret = mt7921u_mcu_power_on(dev);
5869+ ret = mt792xu_mcu_power_on(dev);
5870 if (ret)
5871 goto error;
5872
5873@@ -257,7 +229,7 @@ static int mt7921u_probe(struct usb_interface *usb_intf,
5874 if (ret)
5875 goto error;
5876
5877- ret = mt7921u_dma_init(dev, false);
5878+ ret = mt792xu_dma_init(dev, false);
5879 if (ret)
5880 goto error;
5881
5882@@ -282,27 +254,10 @@ error:
5883 return ret;
5884 }
5885
5886-static void mt7921u_disconnect(struct usb_interface *usb_intf)
5887-{
5888- struct mt7921_dev *dev = usb_get_intfdata(usb_intf);
5889-
5890- cancel_work_sync(&dev->init_work);
5891- if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
5892- return;
5893-
5894- mt76_unregister_device(&dev->mt76);
5895- mt7921u_cleanup(dev);
5896-
5897- usb_set_intfdata(usb_intf, NULL);
5898- usb_put_dev(interface_to_usbdev(usb_intf));
5899-
5900- mt76_free_device(&dev->mt76);
5901-}
5902-
5903 #ifdef CONFIG_PM
5904 static int mt7921u_suspend(struct usb_interface *intf, pm_message_t state)
5905 {
5906- struct mt7921_dev *dev = usb_get_intfdata(intf);
5907+ struct mt792x_dev *dev = usb_get_intfdata(intf);
5908 struct mt76_connac_pm *pm = &dev->pm;
5909 int err;
5910
5911@@ -322,14 +277,14 @@ failed:
5912 pm->suspended = false;
5913
5914 if (err < 0)
5915- mt7921_reset(&dev->mt76);
5916+ mt792x_reset(&dev->mt76);
5917
5918 return err;
5919 }
5920
5921 static int mt7921u_resume(struct usb_interface *intf)
5922 {
5923- struct mt7921_dev *dev = usb_get_intfdata(intf);
5924+ struct mt792x_dev *dev = usb_get_intfdata(intf);
5925 struct mt76_connac_pm *pm = &dev->pm;
5926 bool reinit = true;
5927 int err, i;
5928@@ -349,8 +304,8 @@ static int mt7921u_resume(struct usb_interface *intf)
5929 msleep(20);
5930 }
5931
5932- if (reinit || mt7921_dma_need_reinit(dev)) {
5933- err = mt7921u_dma_init(dev, true);
5934+ if (reinit || mt792x_dma_need_reinit(dev)) {
5935+ err = mt792xu_dma_init(dev, true);
5936 if (err)
5937 goto failed;
5938 }
5939@@ -364,7 +319,7 @@ failed:
5940 pm->suspended = false;
5941
5942 if (err < 0)
5943- mt7921_reset(&dev->mt76);
5944+ mt792x_reset(&dev->mt76);
5945
5946 return err;
5947 }
5948@@ -378,7 +333,7 @@ static struct usb_driver mt7921u_driver = {
5949 .name = KBUILD_MODNAME,
5950 .id_table = mt7921u_device_table,
5951 .probe = mt7921u_probe,
5952- .disconnect = mt7921u_disconnect,
5953+ .disconnect = mt792xu_disconnect,
5954 #ifdef CONFIG_PM
5955 .suspend = mt7921u_suspend,
5956 .resume = mt7921u_resume,
5957diff --git a/mt7921/usb_mac.c b/mt7921/usb_mac.c
5958deleted file mode 100644
5959index 50eb6e7f..00000000
5960--- a/mt7921/usb_mac.c
5961+++ /dev/null
5962@@ -1,255 +0,0 @@
5963-// SPDX-License-Identifier: ISC
5964-/* Copyright (C) 2022 MediaTek Inc.
5965- *
5966- * Author: Lorenzo Bianconi <lorenzo@kernel.org>
5967- */
5968-
5969-#include <linux/kernel.h>
5970-#include <linux/module.h>
5971-#include <linux/usb.h>
5972-
5973-#include "mt7921.h"
5974-#include "mcu.h"
5975-#include "../mt76_connac2_mac.h"
5976-
5977-static u32 mt7921u_uhw_rr(struct mt76_dev *dev, u32 addr)
5978-{
5979- u32 ret;
5980-
5981- mutex_lock(&dev->usb.usb_ctrl_mtx);
5982- ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
5983- USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr);
5984- mutex_unlock(&dev->usb.usb_ctrl_mtx);
5985-
5986- return ret;
5987-}
5988-
5989-static void mt7921u_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
5990-{
5991- mutex_lock(&dev->usb.usb_ctrl_mtx);
5992- ___mt76u_wr(dev, MT_VEND_WRITE,
5993- USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val);
5994- mutex_unlock(&dev->usb.usb_ctrl_mtx);
5995-}
5996-
5997-static void mt7921u_dma_prefetch(struct mt7921_dev *dev)
5998-{
5999- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
6000- MT_WPDMA0_MAX_CNT_MASK, 4);
6001- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
6002- MT_WPDMA0_BASE_PTR_MASK, 0x80);
6003-
6004- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
6005- MT_WPDMA0_MAX_CNT_MASK, 4);
6006- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
6007- MT_WPDMA0_BASE_PTR_MASK, 0xc0);
6008-
6009- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
6010- MT_WPDMA0_MAX_CNT_MASK, 4);
6011- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
6012- MT_WPDMA0_BASE_PTR_MASK, 0x100);
6013-
6014- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
6015- MT_WPDMA0_MAX_CNT_MASK, 4);
6016- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
6017- MT_WPDMA0_BASE_PTR_MASK, 0x140);
6018-
6019- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
6020- MT_WPDMA0_MAX_CNT_MASK, 4);
6021- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
6022- MT_WPDMA0_BASE_PTR_MASK, 0x180);
6023-
6024- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
6025- MT_WPDMA0_MAX_CNT_MASK, 4);
6026- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
6027- MT_WPDMA0_BASE_PTR_MASK, 0x280);
6028-
6029- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
6030- MT_WPDMA0_MAX_CNT_MASK, 4);
6031- mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
6032- MT_WPDMA0_BASE_PTR_MASK, 0x2c0);
6033-}
6034-
6035-static void mt7921u_wfdma_init(struct mt7921_dev *dev)
6036-{
6037- mt7921u_dma_prefetch(dev);
6038-
6039- mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
6040- mt76_set(dev, MT_UWFDMA0_GLO_CFG,
6041- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
6042- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 |
6043- MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL |
6044- MT_WFDMA0_GLO_CFG_TX_DMA_EN |
6045- MT_WFDMA0_GLO_CFG_RX_DMA_EN);
6046-
6047- /* disable dmashdl */
6048- mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0,
6049- MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
6050- mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
6051-
6052- mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
6053-}
6054-
6055-static int mt7921u_dma_rx_evt_ep4(struct mt7921_dev *dev)
6056-{
6057- if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
6058- MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
6059- return -ETIMEDOUT;
6060-
6061- mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
6062- mt76_set(dev, MT_WFDMA_HOST_CONFIG,
6063- MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
6064- mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
6065-
6066- return 0;
6067-}
6068-
6069-static void mt7921u_epctl_rst_opt(struct mt7921_dev *dev, bool reset)
6070-{
6071- u32 val;
6072-
6073- /* usb endpoint reset opt
6074- * bits[4,9]: out blk ep 4-9
6075- * bits[20,21]: in blk ep 4-5
6076- * bits[22]: in int ep 6
6077- */
6078- val = mt7921u_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
6079- if (reset)
6080- val |= GENMASK(9, 4) | GENMASK(22, 20);
6081- else
6082- val &= ~(GENMASK(9, 4) | GENMASK(22, 20));
6083- mt7921u_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
6084-}
6085-
6086-int mt7921u_dma_init(struct mt7921_dev *dev, bool resume)
6087-{
6088- int err;
6089-
6090- mt7921u_wfdma_init(dev);
6091-
6092- mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
6093-
6094- mt76_set(dev, MT_UDMA_WLCFG_0,
6095- MT_WL_RX_EN | MT_WL_TX_EN |
6096- MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN);
6097- mt76_clear(dev, MT_UDMA_WLCFG_0,
6098- MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT);
6099- mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);
6100-
6101- if (resume)
6102- return 0;
6103-
6104- err = mt7921u_dma_rx_evt_ep4(dev);
6105- if (err)
6106- return err;
6107-
6108- mt7921u_epctl_rst_opt(dev, false);
6109-
6110- return 0;
6111-}
6112-
6113-int mt7921u_wfsys_reset(struct mt7921_dev *dev)
6114-{
6115- u32 val;
6116- int i;
6117-
6118- mt7921u_epctl_rst_opt(dev, false);
6119-
6120- val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
6121- val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
6122- mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
6123-
6124- usleep_range(10, 20);
6125-
6126- val = mt7921u_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
6127- val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
6128- mt7921u_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
6129-
6130- mt7921u_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
6131- for (i = 0; i < MT7921_WFSYS_INIT_RETRY_COUNT; i++) {
6132- val = mt7921u_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
6133- if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
6134- break;
6135-
6136- msleep(100);
6137- }
6138-
6139- if (i == MT7921_WFSYS_INIT_RETRY_COUNT)
6140- return -ETIMEDOUT;
6141-
6142- return 0;
6143-}
6144-
6145-int mt7921u_init_reset(struct mt7921_dev *dev)
6146-{
6147- set_bit(MT76_RESET, &dev->mphy.state);
6148-
6149- wake_up(&dev->mt76.mcu.wait);
6150- skb_queue_purge(&dev->mt76.mcu.res_q);
6151-
6152- mt76u_stop_rx(&dev->mt76);
6153- mt76u_stop_tx(&dev->mt76);
6154-
6155- mt7921u_wfsys_reset(dev);
6156-
6157- clear_bit(MT76_RESET, &dev->mphy.state);
6158-
6159- return mt76u_resume_rx(&dev->mt76);
6160-}
6161-
6162-int mt7921u_mac_reset(struct mt7921_dev *dev)
6163-{
6164- int err;
6165-
6166- mt76_txq_schedule_all(&dev->mphy);
6167- mt76_worker_disable(&dev->mt76.tx_worker);
6168-
6169- set_bit(MT76_RESET, &dev->mphy.state);
6170- set_bit(MT76_MCU_RESET, &dev->mphy.state);
6171-
6172- wake_up(&dev->mt76.mcu.wait);
6173- skb_queue_purge(&dev->mt76.mcu.res_q);
6174-
6175- mt76u_stop_rx(&dev->mt76);
6176- mt76u_stop_tx(&dev->mt76);
6177-
6178- mt7921u_wfsys_reset(dev);
6179-
6180- clear_bit(MT76_MCU_RESET, &dev->mphy.state);
6181- err = mt76u_resume_rx(&dev->mt76);
6182- if (err)
6183- goto out;
6184-
6185- err = mt7921u_mcu_power_on(dev);
6186- if (err)
6187- goto out;
6188-
6189- err = mt7921u_dma_init(dev, false);
6190- if (err)
6191- goto out;
6192-
6193- mt76_wr(dev, MT_SWDEF_MODE, MT_SWDEF_NORMAL_MODE);
6194- mt76_set(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN);
6195-
6196- err = mt7921_run_firmware(dev);
6197- if (err)
6198- goto out;
6199-
6200- mt76_clear(dev, MT_UDMA_TX_QSEL, MT_FW_DL_EN);
6201-
6202- err = mt7921_mcu_set_eeprom(dev);
6203- if (err)
6204- goto out;
6205-
6206- err = mt7921_mac_init(dev);
6207- if (err)
6208- goto out;
6209-
6210- err = __mt7921_start(&dev->phy);
6211-out:
6212- clear_bit(MT76_RESET, &dev->mphy.state);
6213-
6214- mt76_worker_enable(&dev->mt76.tx_worker);
6215-
6216- return err;
6217-}
6218diff --git a/mt792x.h b/mt792x.h
6219new file mode 100644
6220index 00000000..5d5ab863
6221--- /dev/null
6222+++ b/mt792x.h
6223@@ -0,0 +1,367 @@
6224+/* SPDX-License-Identifier: ISC */
6225+/* Copyright (C) 2023 MediaTek Inc. */
6226+
6227+#ifndef __MT792X_H
6228+#define __MT792X_H
6229+
6230+#include <linux/interrupt.h>
6231+#include <linux/ktime.h>
6232+
6233+#include "mt76_connac_mcu.h"
6234+#include "mt792x_regs.h"
6235+#include "mt792x_acpi_sar.h"
6236+
6237+#define MT792x_PM_TIMEOUT (HZ / 12)
6238+#define MT792x_HW_SCAN_TIMEOUT (HZ / 10)
6239+
6240+#define MT792x_MAX_INTERFACES 4
6241+#define MT792x_WTBL_SIZE 20
6242+#define MT792x_WTBL_RESERVED (MT792x_WTBL_SIZE - 1)
6243+#define MT792x_WTBL_STA (MT792x_WTBL_RESERVED - MT792x_MAX_INTERFACES)
6244+
6245+#define MT792x_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
6246+#define MT792x_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
6247+
6248+#define MT792x_FW_TAG_FEATURE 4
6249+#define MT792x_FW_CAP_CNM BIT(7)
6250+
6251+/* NOTE: used to map mt76_rates. idx may change if firmware expands table */
6252+#define MT792x_BASIC_RATES_TBL 11
6253+
6254+#define MT792x_WATCHDOG_TIME (HZ / 4)
6255+
6256+#define MT792x_DRV_OWN_RETRY_COUNT 10
6257+#define MT792x_MCU_INIT_RETRY_COUNT 10
6258+#define MT792x_WFSYS_INIT_RETRY_COUNT 2
6259+
6260+#define MT7921_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7961_1.bin"
6261+#define MT7922_FIRMWARE_WM "mediatek/WIFI_RAM_CODE_MT7922_1.bin"
6262+
6263+#define MT7921_ROM_PATCH "mediatek/WIFI_MT7961_patch_mcu_1_2_hdr.bin"
6264+#define MT7922_ROM_PATCH "mediatek/WIFI_MT7922_patch_mcu_1_1_hdr.bin"
6265+
6266+struct mt792x_vif;
6267+struct mt792x_sta;
6268+
6269+struct mt792x_realease_info {
6270+ __le16 len;
6271+ u8 pad_len;
6272+ u8 tag;
6273+} __packed;
6274+
6275+struct mt792x_fw_features {
6276+ u8 segment;
6277+ u8 data;
6278+ u8 rsv[14];
6279+} __packed;
6280+
6281+enum {
6282+ MT792x_CLC_POWER,
6283+ MT792x_CLC_CHAN,
6284+ MT792x_CLC_MAX_NUM,
6285+};
6286+
6287+DECLARE_EWMA(avg_signal, 10, 8)
6288+
6289+struct mt792x_sta {
6290+ struct mt76_wcid wcid; /* must be first */
6291+
6292+ struct mt792x_vif *vif;
6293+
6294+ u32 airtime_ac[8];
6295+
6296+ int ack_signal;
6297+ struct ewma_avg_signal avg_ack_signal;
6298+
6299+ unsigned long last_txs;
6300+
6301+ struct mt76_connac_sta_key_conf bip;
6302+};
6303+
6304+DECLARE_EWMA(rssi, 10, 8);
6305+
6306+struct mt792x_vif {
6307+ struct mt76_vif mt76; /* must be first */
6308+
6309+ struct mt792x_sta sta;
6310+ struct mt792x_sta *wep_sta;
6311+
6312+ struct mt792x_phy *phy;
6313+
6314+ struct ewma_rssi rssi;
6315+
6316+ struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
6317+ struct ieee80211_chanctx_conf *ctx;
6318+};
6319+
6320+struct mt792x_phy {
6321+ struct mt76_phy *mt76;
6322+ struct mt792x_dev *dev;
6323+
6324+ struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
6325+
6326+ u64 omac_mask;
6327+
6328+ u16 noise;
6329+
6330+ s16 coverage_class;
6331+ u8 slottime;
6332+
6333+ u32 rx_ampdu_ts;
6334+ u32 ampdu_ref;
6335+
6336+ struct mt76_mib_stats mib;
6337+
6338+ u8 sta_work_count;
6339+
6340+ struct sk_buff_head scan_event_list;
6341+ struct delayed_work scan_work;
6342+#ifdef CONFIG_ACPI
6343+ void *acpisar;
6344+#endif
6345+ void *clc[MT792x_CLC_MAX_NUM];
6346+
6347+ struct work_struct roc_work;
6348+ struct timer_list roc_timer;
6349+ wait_queue_head_t roc_wait;
6350+ u8 roc_token_id;
6351+ bool roc_grant;
6352+};
6353+
6354+struct mt792x_irq_map {
6355+ u32 host_irq_enable;
6356+ struct {
6357+ u32 all_complete_mask;
6358+ u32 mcu_complete_mask;
6359+ } tx;
6360+ struct {
6361+ u32 data_complete_mask;
6362+ u32 wm_complete_mask;
6363+ u32 wm2_complete_mask;
6364+ } rx;
6365+};
6366+
6367+#define mt792x_init_reset(dev) ((dev)->hif_ops->init_reset(dev))
6368+#define mt792x_dev_reset(dev) ((dev)->hif_ops->reset(dev))
6369+#define mt792x_mcu_init(dev) ((dev)->hif_ops->mcu_init(dev))
6370+#define __mt792x_mcu_drv_pmctrl(dev) ((dev)->hif_ops->drv_own(dev))
6371+#define __mt792x_mcu_fw_pmctrl(dev) ((dev)->hif_ops->fw_own(dev))
6372+
6373+struct mt792x_hif_ops {
6374+ int (*init_reset)(struct mt792x_dev *dev);
6375+ int (*reset)(struct mt792x_dev *dev);
6376+ int (*mcu_init)(struct mt792x_dev *dev);
6377+ int (*drv_own)(struct mt792x_dev *dev);
6378+ int (*fw_own)(struct mt792x_dev *dev);
6379+};
6380+
6381+struct mt792x_dev {
6382+ union { /* must be first */
6383+ struct mt76_dev mt76;
6384+ struct mt76_phy mphy;
6385+ };
6386+
6387+ const struct mt76_bus_ops *bus_ops;
6388+ struct mt792x_phy phy;
6389+
6390+ struct work_struct reset_work;
6391+ bool hw_full_reset:1;
6392+ bool hw_init_done:1;
6393+ bool fw_assert:1;
6394+ bool has_eht:1;
6395+
6396+ struct work_struct init_work;
6397+
6398+ u8 fw_debug;
6399+ u8 fw_features;
6400+
6401+ struct mt76_connac_pm pm;
6402+ struct mt76_connac_coredump coredump;
6403+ const struct mt792x_hif_ops *hif_ops;
6404+ const struct mt792x_irq_map *irq_map;
6405+
6406+ struct work_struct ipv6_ns_work;
6407+ /* IPv6 addresses for WoWLAN */
6408+ struct sk_buff_head ipv6_ns_list;
6409+
6410+ enum environment_cap country_ie_env;
6411+ u32 backup_l1;
6412+ u32 backup_l2;
6413+};
6414+
6415+static inline struct mt792x_dev *
6416+mt792x_hw_dev(struct ieee80211_hw *hw)
6417+{
6418+ struct mt76_phy *phy = hw->priv;
6419+
6420+ return container_of(phy->dev, struct mt792x_dev, mt76);
6421+}
6422+
6423+static inline struct mt792x_phy *
6424+mt792x_hw_phy(struct ieee80211_hw *hw)
6425+{
6426+ struct mt76_phy *phy = hw->priv;
6427+
6428+ return phy->priv;
6429+}
6430+
6431+static inline void
6432+mt792x_get_status_freq_info(struct mt76_rx_status *status, u8 chfreq)
6433+{
6434+ if (chfreq > 180) {
6435+ status->band = NL80211_BAND_6GHZ;
6436+ chfreq = (chfreq - 181) * 4 + 1;
6437+ } else if (chfreq > 14) {
6438+ status->band = NL80211_BAND_5GHZ;
6439+ } else {
6440+ status->band = NL80211_BAND_2GHZ;
6441+ }
6442+ status->freq = ieee80211_channel_to_frequency(chfreq, status->band);
6443+}
6444+
6445+static inline bool mt792x_dma_need_reinit(struct mt792x_dev *dev)
6446+{
6447+ return !mt76_get_field(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
6448+}
6449+
6450+#define mt792x_mutex_acquire(dev) \
6451+ mt76_connac_mutex_acquire(&(dev)->mt76, &(dev)->pm)
6452+#define mt792x_mutex_release(dev) \
6453+ mt76_connac_mutex_release(&(dev)->mt76, &(dev)->pm)
6454+
6455+void mt792x_pm_wake_work(struct work_struct *work);
6456+void mt792x_pm_power_save_work(struct work_struct *work);
6457+void mt792x_reset(struct mt76_dev *mdev);
6458+void mt792x_update_channel(struct mt76_phy *mphy);
6459+void mt792x_mac_reset_counters(struct mt792x_phy *phy);
6460+void mt792x_mac_init_band(struct mt792x_dev *dev, u8 band);
6461+void mt792x_mac_assoc_rssi(struct mt792x_dev *dev, struct sk_buff *skb);
6462+struct mt76_wcid *mt792x_rx_get_wcid(struct mt792x_dev *dev, u16 idx,
6463+ bool unicast);
6464+void mt792x_mac_update_mib_stats(struct mt792x_phy *phy);
6465+void mt792x_mac_set_timeing(struct mt792x_phy *phy);
6466+void mt792x_mac_work(struct work_struct *work);
6467+void mt792x_remove_interface(struct ieee80211_hw *hw,
6468+ struct ieee80211_vif *vif);
6469+void mt792x_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
6470+ struct sk_buff *skb);
6471+int mt792x_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6472+ unsigned int link_id, u16 queue,
6473+ const struct ieee80211_tx_queue_params *params);
6474+int mt792x_get_stats(struct ieee80211_hw *hw,
6475+ struct ieee80211_low_level_stats *stats);
6476+u64 mt792x_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
6477+void mt792x_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6478+ u64 timestamp);
6479+void mt792x_tx_worker(struct mt76_worker *w);
6480+void mt792x_roc_timer(struct timer_list *timer);
6481+void mt792x_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6482+ u32 queues, bool drop);
6483+int mt792x_assign_vif_chanctx(struct ieee80211_hw *hw,
6484+ struct ieee80211_vif *vif,
6485+ struct ieee80211_bss_conf *link_conf,
6486+ struct ieee80211_chanctx_conf *ctx);
6487+void mt792x_unassign_vif_chanctx(struct ieee80211_hw *hw,
6488+ struct ieee80211_vif *vif,
6489+ struct ieee80211_bss_conf *link_conf,
6490+ struct ieee80211_chanctx_conf *ctx);
6491+void mt792x_set_wakeup(struct ieee80211_hw *hw, bool enabled);
6492+void mt792x_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6493+ u32 sset, u8 *data);
6494+int mt792x_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6495+ int sset);
6496+void mt792x_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
6497+ struct ethtool_stats *stats, u64 *data);
6498+void mt792x_sta_statistics(struct ieee80211_hw *hw,
6499+ struct ieee80211_vif *vif,
6500+ struct ieee80211_sta *sta,
6501+ struct station_info *sinfo);
6502+void mt792x_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class);
6503+void mt792x_dma_cleanup(struct mt792x_dev *dev);
6504+int mt792x_dma_enable(struct mt792x_dev *dev);
6505+int mt792x_wpdma_reset(struct mt792x_dev *dev, bool force);
6506+int mt792x_wpdma_reinit_cond(struct mt792x_dev *dev);
6507+int mt792x_dma_disable(struct mt792x_dev *dev, bool force);
6508+irqreturn_t mt792x_irq_handler(int irq, void *dev_instance);
6509+void mt792x_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
6510+int mt792x_poll_tx(struct napi_struct *napi, int budget);
6511+int mt792x_poll_rx(struct napi_struct *napi, int budget);
6512+void mt792x_irq_tasklet(unsigned long data);
6513+int mt792x_wfsys_reset(struct mt792x_dev *dev);
6514+int mt792x_tx_stats_show(struct seq_file *file, void *data);
6515+int mt792x_queues_acq(struct seq_file *s, void *data);
6516+int mt792x_queues_read(struct seq_file *s, void *data);
6517+int mt792x_pm_stats(struct seq_file *s, void *data);
6518+int mt792x_pm_idle_timeout_set(void *data, u64 val);
6519+int mt792x_pm_idle_timeout_get(void *data, u64 *val);
6520+int mt792x_init_wiphy(struct ieee80211_hw *hw);
6521+struct ieee80211_ops *
6522+mt792x_get_mac80211_ops(struct device *dev,
6523+ const struct ieee80211_ops *mac80211_ops,
6524+ void *drv_data, u8 *fw_features);
6525+int mt792x_init_wcid(struct mt792x_dev *dev);
6526+int mt792x_mcu_drv_pmctrl(struct mt792x_dev *dev);
6527+int mt792x_mcu_fw_pmctrl(struct mt792x_dev *dev);
6528+
6529+static inline char *mt792x_ram_name(struct mt792x_dev *dev)
6530+{
6531+ switch (mt76_chip(&dev->mt76)) {
6532+ case 0x7922:
6533+ return MT7922_FIRMWARE_WM;
6534+ default:
6535+ return MT7921_FIRMWARE_WM;
6536+ }
6537+}
6538+
6539+static inline char *mt792x_patch_name(struct mt792x_dev *dev)
6540+{
6541+ switch (mt76_chip(&dev->mt76)) {
6542+ case 0x7922:
6543+ return MT7922_ROM_PATCH;
6544+ default:
6545+ return MT7921_ROM_PATCH;
6546+ }
6547+}
6548+
6549+int mt792x_load_firmware(struct mt792x_dev *dev);
6550+
6551+/* usb */
6552+#define MT_USB_TYPE_VENDOR (USB_TYPE_VENDOR | 0x1f)
6553+#define MT_USB_TYPE_UHW_VENDOR (USB_TYPE_VENDOR | 0x1e)
6554+int mt792xu_dma_init(struct mt792x_dev *dev, bool resume);
6555+int mt792xu_mcu_power_on(struct mt792x_dev *dev);
6556+int mt792xu_wfsys_reset(struct mt792x_dev *dev);
6557+int mt792xu_init_reset(struct mt792x_dev *dev);
6558+u32 mt792xu_rr(struct mt76_dev *dev, u32 addr);
6559+void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val);
6560+u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val);
6561+void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len);
6562+void mt792xu_disconnect(struct usb_interface *usb_intf);
6563+
6564+int __mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev);
6565+int mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev);
6566+int mt792xe_mcu_fw_pmctrl(struct mt792x_dev *dev);
6567+
6568+#ifdef CONFIG_ACPI
6569+int mt792x_init_acpi_sar(struct mt792x_dev *dev);
6570+int mt792x_init_acpi_sar_power(struct mt792x_phy *phy, bool set_default);
6571+u8 mt792x_acpi_get_flags(struct mt792x_phy *phy);
6572+#else
6573+static inline int mt792x_init_acpi_sar(struct mt792x_dev *dev)
6574+{
6575+ return 0;
6576+}
6577+
6578+static inline int mt792x_init_acpi_sar_power(struct mt792x_phy *phy,
6579+ bool set_default)
6580+{
6581+ return 0;
6582+}
6583+
6584+static inline u8 mt792x_acpi_get_flags(struct mt792x_phy *phy)
6585+{
6586+ return 0;
6587+}
6588+#endif
6589+
6590+#endif /* __MT7925_H */
6591diff --git a/mt7921/acpi_sar.c b/mt792x_acpi_sar.c
6592similarity index 64%
6593rename from mt7921/acpi_sar.c
6594rename to mt792x_acpi_sar.c
6595index 48dd0dec..303c0f5c 100644
6596--- a/mt7921/acpi_sar.c
6597+++ b/mt792x_acpi_sar.c
6598@@ -1,15 +1,15 @@
6599 // SPDX-License-Identifier: ISC
6600-/* Copyright (C) 2022 MediaTek Inc. */
6601+/* Copyright (C) 2023 MediaTek Inc. */
6602
6603 #include <linux/acpi.h>
6604-#include "mt7921.h"
6605+#include "mt792x.h"
6606
6607 static int
6608-mt7921_acpi_read(struct mt7921_dev *dev, u8 *method, u8 **tbl, u32 *len)
6609+mt792x_acpi_read(struct mt792x_dev *dev, u8 *method, u8 **tbl, u32 *len)
6610 {
6611 struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
6612- union acpi_object *sar_root, *sar_unit;
6613 struct mt76_dev *mdev = &dev->mt76;
6614+ union acpi_object *sar_root;
6615 acpi_handle root, handle;
6616 acpi_status status;
6617 u32 i = 0;
6618@@ -45,18 +45,20 @@ mt7921_acpi_read(struct mt7921_dev *dev, u8 *method, u8 **tbl, u32 *len)
6619 goto free;
6620 }
6621 }
6622+
6623 if (len)
6624 *len = sar_root->package.count;
6625
6626 for (i = 0; i < sar_root->package.count; i++) {
6627- sar_unit = &sar_root->package.elements[i];
6628+ union acpi_object *sar_unit = &sar_root->package.elements[i];
6629
6630 if (sar_unit->type != ACPI_TYPE_INTEGER)
6631 break;
6632+
6633 *(*tbl + i) = (u8)sar_unit->integer.value;
6634 }
6635- ret = (i == sar_root->package.count) ? 0 : -EINVAL;
6636
6637+ ret = i == sar_root->package.count ? 0 : -EINVAL;
6638 free:
6639 kfree(sar_root);
6640
6641@@ -64,36 +66,37 @@ free:
6642 }
6643
6644 /* MTCL : Country List Table for 6G band */
6645-static int
6646-mt7921_asar_acpi_read_mtcl(struct mt7921_dev *dev, u8 **table, u8 *version)
6647+static void
6648+mt792x_asar_acpi_read_mtcl(struct mt792x_dev *dev, u8 **table, u8 *version)
6649 {
6650- *version = (mt7921_acpi_read(dev, MT7921_ACPI_MTCL, table, NULL) < 0)
6651- ? 1 : 2;
6652- return 0;
6653+ if (mt792x_acpi_read(dev, MT792x_ACPI_MTCL, table, NULL) < 0)
6654+ *version = 1;
6655+ else
6656+ *version = 2;
6657 }
6658
6659 /* MTDS : Dynamic SAR Power Table */
6660 static int
6661-mt7921_asar_acpi_read_mtds(struct mt7921_dev *dev, u8 **table, u8 version)
6662+mt792x_asar_acpi_read_mtds(struct mt792x_dev *dev, u8 **table, u8 version)
6663 {
6664 int len, ret, sarlen, prelen, tblcnt;
6665 bool enable;
6666
6667- ret = mt7921_acpi_read(dev, MT7921_ACPI_MTDS, table, &len);
6668+ ret = mt792x_acpi_read(dev, MT792x_ACPI_MTDS, table, &len);
6669 if (ret)
6670 return ret;
6671
6672 /* Table content validation */
6673 switch (version) {
6674 case 1:
6675- enable = ((struct mt7921_asar_dyn *)*table)->enable;
6676- sarlen = sizeof(struct mt7921_asar_dyn_limit);
6677- prelen = sizeof(struct mt7921_asar_dyn);
6678+ enable = ((struct mt792x_asar_dyn *)*table)->enable;
6679+ sarlen = sizeof(struct mt792x_asar_dyn_limit);
6680+ prelen = sizeof(struct mt792x_asar_dyn);
6681 break;
6682 case 2:
6683- enable = ((struct mt7921_asar_dyn_v2 *)*table)->enable;
6684- sarlen = sizeof(struct mt7921_asar_dyn_limit_v2);
6685- prelen = sizeof(struct mt7921_asar_dyn_v2);
6686+ enable = ((struct mt792x_asar_dyn_v2 *)*table)->enable;
6687+ sarlen = sizeof(struct mt792x_asar_dyn_limit_v2);
6688+ prelen = sizeof(struct mt792x_asar_dyn_v2);
6689 break;
6690 default:
6691 return -EINVAL;
6692@@ -101,88 +104,89 @@ mt7921_asar_acpi_read_mtds(struct mt7921_dev *dev, u8 **table, u8 version)
6693
6694 tblcnt = (len - prelen) / sarlen;
6695 if (!enable ||
6696- tblcnt > MT7921_ASAR_MAX_DYN || tblcnt < MT7921_ASAR_MIN_DYN)
6697- ret = -EINVAL;
6698+ tblcnt > MT792x_ASAR_MAX_DYN || tblcnt < MT792x_ASAR_MIN_DYN)
6699+ return -EINVAL;
6700
6701- return ret;
6702+ return 0;
6703 }
6704
6705 /* MTGS : Geo SAR Power Table */
6706 static int
6707-mt7921_asar_acpi_read_mtgs(struct mt7921_dev *dev, u8 **table, u8 version)
6708+mt792x_asar_acpi_read_mtgs(struct mt792x_dev *dev, u8 **table, u8 version)
6709 {
6710- int len, ret = 0, sarlen, prelen, tblcnt;
6711+ int len, ret, sarlen, prelen, tblcnt;
6712
6713- ret = mt7921_acpi_read(dev, MT7921_ACPI_MTGS, table, &len);
6714+ ret = mt792x_acpi_read(dev, MT792x_ACPI_MTGS, table, &len);
6715 if (ret)
6716 return ret;
6717
6718 /* Table content validation */
6719 switch (version) {
6720 case 1:
6721- sarlen = sizeof(struct mt7921_asar_geo_limit);
6722- prelen = sizeof(struct mt7921_asar_geo);
6723+ sarlen = sizeof(struct mt792x_asar_geo_limit);
6724+ prelen = sizeof(struct mt792x_asar_geo);
6725 break;
6726 case 2:
6727- sarlen = sizeof(struct mt7921_asar_geo_limit_v2);
6728- prelen = sizeof(struct mt7921_asar_geo_v2);
6729+ sarlen = sizeof(struct mt792x_asar_geo_limit_v2);
6730+ prelen = sizeof(struct mt792x_asar_geo_v2);
6731 break;
6732 default:
6733 return -EINVAL;
6734 }
6735
6736 tblcnt = (len - prelen) / sarlen;
6737- if (tblcnt > MT7921_ASAR_MAX_GEO || tblcnt < MT7921_ASAR_MIN_GEO)
6738- ret = -EINVAL;
6739+ if (tblcnt > MT792x_ASAR_MAX_GEO || tblcnt < MT792x_ASAR_MIN_GEO)
6740+ return -EINVAL;
6741
6742- return ret;
6743+ return 0;
6744 }
6745
6746 /* MTFG : Flag Table */
6747 static int
6748-mt7921_asar_acpi_read_mtfg(struct mt7921_dev *dev, u8 **table)
6749+mt792x_asar_acpi_read_mtfg(struct mt792x_dev *dev, u8 **table)
6750 {
6751 int len, ret;
6752
6753- ret = mt7921_acpi_read(dev, MT7921_ACPI_MTFG, table, &len);
6754+ ret = mt792x_acpi_read(dev, MT792x_ACPI_MTFG, table, &len);
6755 if (ret)
6756 return ret;
6757
6758- if (len < MT7921_ASAR_MIN_FG)
6759- ret = -EINVAL;
6760+ if (len < MT792x_ASAR_MIN_FG)
6761+ return -EINVAL;
6762
6763- return ret;
6764+ return 0;
6765 }
6766
6767-int mt7921_init_acpi_sar(struct mt7921_dev *dev)
6768+int mt792x_init_acpi_sar(struct mt792x_dev *dev)
6769 {
6770- struct mt7921_acpi_sar *asar;
6771+ struct mt792x_acpi_sar *asar;
6772 int ret;
6773
6774 asar = devm_kzalloc(dev->mt76.dev, sizeof(*asar), GFP_KERNEL);
6775 if (!asar)
6776 return -ENOMEM;
6777
6778- mt7921_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver);
6779+ mt792x_asar_acpi_read_mtcl(dev, (u8 **)&asar->countrylist, &asar->ver);
6780
6781 /* MTDS is mandatory. Return error if table is invalid */
6782- ret = mt7921_asar_acpi_read_mtds(dev, (u8 **)&asar->dyn, asar->ver);
6783+ ret = mt792x_asar_acpi_read_mtds(dev, (u8 **)&asar->dyn, asar->ver);
6784 if (ret) {
6785 devm_kfree(dev->mt76.dev, asar->dyn);
6786 devm_kfree(dev->mt76.dev, asar->countrylist);
6787 devm_kfree(dev->mt76.dev, asar);
6788+
6789 return ret;
6790 }
6791
6792 /* MTGS is optional */
6793- ret = mt7921_asar_acpi_read_mtgs(dev, (u8 **)&asar->geo, asar->ver);
6794+ ret = mt792x_asar_acpi_read_mtgs(dev, (u8 **)&asar->geo, asar->ver);
6795 if (ret) {
6796 devm_kfree(dev->mt76.dev, asar->geo);
6797 asar->geo = NULL;
6798 }
6799
6800 /* MTFG is optional */
6801- ret = mt7921_asar_acpi_read_mtfg(dev, (u8 **)&asar->fg);
6802+ ret = mt792x_asar_acpi_read_mtfg(dev, (u8 **)&asar->fg);
6803 if (ret) {
6804 devm_kfree(dev->mt76.dev, asar->fg);
6805 asar->fg = NULL;
6806@@ -191,13 +195,14 @@ int mt7921_init_acpi_sar(struct mt7921_dev *dev)
6807
6808 return 0;
6809 }
6810+EXPORT_SYMBOL_GPL(mt792x_init_acpi_sar);
6811
6812 static s8
6813-mt7921_asar_get_geo_pwr(struct mt7921_phy *phy,
6814+mt792x_asar_get_geo_pwr(struct mt792x_phy *phy,
6815 enum nl80211_band band, s8 dyn_power)
6816 {
6817- struct mt7921_acpi_sar *asar = phy->acpisar;
6818- struct mt7921_asar_geo_band *band_pwr;
6819+ struct mt792x_acpi_sar *asar = phy->acpisar;
6820+ struct mt792x_asar_geo_band *band_pwr;
6821 s8 geo_power;
6822 u8 idx, max;
6823
6824@@ -248,12 +253,12 @@ mt7921_asar_get_geo_pwr(struct mt7921_phy *phy,
6825 }
6826
6827 static s8
6828-mt7921_asar_range_pwr(struct mt7921_phy *phy,
6829+mt792x_asar_range_pwr(struct mt792x_phy *phy,
6830 const struct cfg80211_sar_freq_ranges *range,
6831 u8 idx)
6832 {
6833 const struct cfg80211_sar_capa *capa = phy->mt76->hw->wiphy->sar_capa;
6834- struct mt7921_acpi_sar *asar = phy->acpisar;
6835+ struct mt792x_acpi_sar *asar = phy->acpisar;
6836 u8 *limit, band, max;
6837
6838 if (!capa)
6839@@ -277,10 +282,10 @@ mt7921_asar_range_pwr(struct mt7921_phy *phy,
6840 else
6841 band = NL80211_BAND_2GHZ;
6842
6843- return mt7921_asar_get_geo_pwr(phy, band, limit[idx]);
6844+ return mt792x_asar_get_geo_pwr(phy, band, limit[idx]);
6845 }
6846
6847-int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default)
6848+int mt792x_init_acpi_sar_power(struct mt792x_phy *phy, bool set_default)
6849 {
6850 const struct cfg80211_sar_capa *capa = phy->mt76->hw->wiphy->sar_capa;
6851 int i;
6852@@ -300,41 +305,46 @@ int mt7921_init_acpi_sar_power(struct mt7921_phy *phy, bool set_default)
6853 continue;
6854
6855 frp->power = min_t(s8, set_default ? 127 : frp->power,
6856- mt7921_asar_range_pwr(phy, frp->range, i));
6857+ mt792x_asar_range_pwr(phy, frp->range, i));
6858 }
6859
6860 return 0;
6861 }
6862+EXPORT_SYMBOL_GPL(mt792x_init_acpi_sar_power);
6863
6864-u8 mt7921_acpi_get_flags(struct mt7921_phy *phy)
6865+u8 mt792x_acpi_get_flags(struct mt792x_phy *phy)
6866 {
6867- struct mt7921_asar_fg *fg;
6868+ struct mt792x_acpi_sar *acpisar = phy->acpisar;
6869+ struct mt792x_asar_fg *fg;
6870 struct {
6871 u8 acpi_idx;
6872 u8 chip_idx;
6873 } map[] = {
6874- {1, 1},
6875- {4, 2},
6876+ { 1, 1 },
6877+ { 4, 2 },
6878 };
6879 u8 flags = BIT(0);
6880 int i, j;
6881
6882- if (!phy->acpisar)
6883+ if (!acpisar)
6884 return 0;
6885
6886- fg = phy->acpisar->fg;
6887+ fg = acpisar->fg;
6888 if (!fg)
6889 return flags;
6890
6891 /* pickup necessary settings per device and
6892 * translate the index of bitmap for chip command.
6893 */
6894- for (i = 0; i < fg->nr_flag; i++)
6895- for (j = 0; j < ARRAY_SIZE(map); j++)
6896+ for (i = 0; i < fg->nr_flag; i++) {
6897+ for (j = 0; j < ARRAY_SIZE(map); j++) {
6898 if (fg->flag[i] == map[j].acpi_idx) {
6899 flags |= BIT(map[j].chip_idx);
6900 break;
6901 }
6902+ }
6903+ }
6904
6905 return flags;
6906 }
6907+EXPORT_SYMBOL_GPL(mt792x_acpi_get_flags);
6908diff --git a/mt792x_acpi_sar.h b/mt792x_acpi_sar.h
6909new file mode 100644
6910index 00000000..d6d332e8
6911--- /dev/null
6912+++ b/mt792x_acpi_sar.h
6913@@ -0,0 +1,105 @@
6914+/* SPDX-License-Identifier: ISC */
6915+/* Copyright (C) 2023 MediaTek Inc. */
6916+
6917+#ifndef __MT7921_ACPI_SAR_H
6918+#define __MT7921_ACPI_SAR_H
6919+
6920+#define MT792x_ASAR_MIN_DYN 1
6921+#define MT792x_ASAR_MAX_DYN 8
6922+#define MT792x_ASAR_MIN_GEO 3
6923+#define MT792x_ASAR_MAX_GEO 8
6924+#define MT792x_ASAR_MIN_FG 8
6925+
6926+#define MT792x_ACPI_MTCL "MTCL"
6927+#define MT792x_ACPI_MTDS "MTDS"
6928+#define MT792x_ACPI_MTGS "MTGS"
6929+#define MT792x_ACPI_MTFG "MTFG"
6930+
6931+struct mt792x_asar_dyn_limit {
6932+ u8 idx;
6933+ u8 frp[5];
6934+} __packed;
6935+
6936+struct mt792x_asar_dyn {
6937+ u8 names[4];
6938+ u8 enable;
6939+ u8 nr_tbl;
6940+ DECLARE_FLEX_ARRAY(struct mt792x_asar_dyn_limit, tbl);
6941+} __packed;
6942+
6943+struct mt792x_asar_dyn_limit_v2 {
6944+ u8 idx;
6945+ u8 frp[11];
6946+} __packed;
6947+
6948+struct mt792x_asar_dyn_v2 {
6949+ u8 names[4];
6950+ u8 enable;
6951+ u8 rsvd;
6952+ u8 nr_tbl;
6953+ DECLARE_FLEX_ARRAY(struct mt792x_asar_dyn_limit_v2, tbl);
6954+} __packed;
6955+
6956+struct mt792x_asar_geo_band {
6957+ u8 pwr;
6958+ u8 offset;
6959+} __packed;
6960+
6961+struct mt792x_asar_geo_limit {
6962+ u8 idx;
6963+ /* 0:2G, 1:5G */
6964+ struct mt792x_asar_geo_band band[2];
6965+} __packed;
6966+
6967+struct mt792x_asar_geo {
6968+ u8 names[4];
6969+ u8 version;
6970+ u8 nr_tbl;
6971+ DECLARE_FLEX_ARRAY(struct mt792x_asar_geo_limit, tbl);
6972+} __packed;
6973+
6974+struct mt792x_asar_geo_limit_v2 {
6975+ u8 idx;
6976+ /* 0:2G, 1:5G, 2:6G */
6977+ struct mt792x_asar_geo_band band[3];
6978+} __packed;
6979+
6980+struct mt792x_asar_geo_v2 {
6981+ u8 names[4];
6982+ u8 version;
6983+ u8 rsvd;
6984+ u8 nr_tbl;
6985+ DECLARE_FLEX_ARRAY(struct mt792x_asar_geo_limit_v2, tbl);
6986+} __packed;
6987+
6988+struct mt792x_asar_cl {
6989+ u8 names[4];
6990+ u8 version;
6991+ u8 mode_6g;
6992+ u8 cl6g[6];
6993+} __packed;
6994+
6995+struct mt792x_asar_fg {
6996+ u8 names[4];
6997+ u8 version;
6998+ u8 rsvd;
6999+ u8 nr_flag;
7000+ u8 rsvd1;
7001+ u8 flag[];
7002+} __packed;
7003+
7004+struct mt792x_acpi_sar {
7005+ u8 ver;
7006+ union {
7007+ struct mt792x_asar_dyn *dyn;
7008+ struct mt792x_asar_dyn_v2 *dyn_v2;
7009+ };
7010+ union {
7011+ struct mt792x_asar_geo *geo;
7012+ struct mt792x_asar_geo_v2 *geo_v2;
7013+ };
7014+ struct mt792x_asar_cl *countrylist;
7015+ struct mt792x_asar_fg *fg;
7016+};
7017+
7018+#endif
7019diff --git a/mt792x_core.c b/mt792x_core.c
7020new file mode 100644
7021index 00000000..46be7f99
7022--- /dev/null
7023+++ b/mt792x_core.c
7024@@ -0,0 +1,844 @@
7025+// SPDX-License-Identifier: ISC
7026+/* Copyright (C) 2023 MediaTek Inc. */
7027+
7028+#include <linux/module.h>
7029+#include <linux/firmware.h>
7030+
7031+#include "mt792x.h"
7032+#include "dma.h"
7033+
7034+static const struct ieee80211_iface_limit if_limits[] = {
7035+ {
7036+ .max = MT792x_MAX_INTERFACES,
7037+ .types = BIT(NL80211_IFTYPE_STATION)
7038+ },
7039+ {
7040+ .max = 1,
7041+ .types = BIT(NL80211_IFTYPE_AP)
7042+ }
7043+};
7044+
7045+static const struct ieee80211_iface_combination if_comb[] = {
7046+ {
7047+ .limits = if_limits,
7048+ .n_limits = ARRAY_SIZE(if_limits),
7049+ .max_interfaces = MT792x_MAX_INTERFACES,
7050+ .num_different_channels = 1,
7051+ .beacon_int_infra_match = true,
7052+ },
7053+};
7054+
7055+static const struct ieee80211_iface_limit if_limits_chanctx[] = {
7056+ {
7057+ .max = 2,
7058+ .types = BIT(NL80211_IFTYPE_STATION) |
7059+ BIT(NL80211_IFTYPE_P2P_CLIENT)
7060+ },
7061+ {
7062+ .max = 1,
7063+ .types = BIT(NL80211_IFTYPE_AP) |
7064+ BIT(NL80211_IFTYPE_P2P_GO)
7065+ }
7066+};
7067+
7068+static const struct ieee80211_iface_combination if_comb_chanctx[] = {
7069+ {
7070+ .limits = if_limits_chanctx,
7071+ .n_limits = ARRAY_SIZE(if_limits_chanctx),
7072+ .max_interfaces = 2,
7073+ .num_different_channels = 2,
7074+ .beacon_int_infra_match = false,
7075+ }
7076+};
7077+
7078+void mt792x_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
7079+ struct sk_buff *skb)
7080+{
7081+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7082+ struct mt76_phy *mphy = hw->priv;
7083+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
7084+ struct ieee80211_vif *vif = info->control.vif;
7085+ struct mt76_wcid *wcid = &dev->mt76.global_wcid;
7086+ int qid;
7087+
7088+ if (control->sta) {
7089+ struct mt792x_sta *sta;
7090+
7091+ sta = (struct mt792x_sta *)control->sta->drv_priv;
7092+ wcid = &sta->wcid;
7093+ }
7094+
7095+ if (vif && !control->sta) {
7096+ struct mt792x_vif *mvif;
7097+
7098+ mvif = (struct mt792x_vif *)vif->drv_priv;
7099+ wcid = &mvif->sta.wcid;
7100+ }
7101+
7102+ if (mt76_connac_pm_ref(mphy, &dev->pm)) {
7103+ mt76_tx(mphy, control->sta, wcid, skb);
7104+ mt76_connac_pm_unref(mphy, &dev->pm);
7105+ return;
7106+ }
7107+
7108+ qid = skb_get_queue_mapping(skb);
7109+ if (qid >= MT_TXQ_PSD) {
7110+ qid = IEEE80211_AC_BE;
7111+ skb_set_queue_mapping(skb, qid);
7112+ }
7113+
7114+ mt76_connac_pm_queue_skb(hw, &dev->pm, wcid, skb);
7115+}
7116+EXPORT_SYMBOL_GPL(mt792x_tx);
7117+
7118+void mt792x_remove_interface(struct ieee80211_hw *hw,
7119+ struct ieee80211_vif *vif)
7120+{
7121+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7122+ struct mt792x_sta *msta = &mvif->sta;
7123+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7124+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
7125+ int idx = msta->wcid.idx;
7126+
7127+ mt792x_mutex_acquire(dev);
7128+ mt76_connac_free_pending_tx_skbs(&dev->pm, &msta->wcid);
7129+ mt76_connac_mcu_uni_add_dev(&dev->mphy, vif, &mvif->sta.wcid, false);
7130+
7131+ rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
7132+
7133+ dev->mt76.vif_mask &= ~BIT_ULL(mvif->mt76.idx);
7134+ phy->omac_mask &= ~BIT_ULL(mvif->mt76.omac_idx);
7135+ mt792x_mutex_release(dev);
7136+
7137+ spin_lock_bh(&dev->mt76.sta_poll_lock);
7138+ if (!list_empty(&msta->wcid.poll_list))
7139+ list_del_init(&msta->wcid.poll_list);
7140+ spin_unlock_bh(&dev->mt76.sta_poll_lock);
7141+
7142+ mt76_packet_id_flush(&dev->mt76, &msta->wcid);
7143+}
7144+EXPORT_SYMBOL_GPL(mt792x_remove_interface);
7145+
7146+int mt792x_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7147+ unsigned int link_id, u16 queue,
7148+ const struct ieee80211_tx_queue_params *params)
7149+{
7150+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7151+
7152+ /* no need to update right away, we'll get BSS_CHANGED_QOS */
7153+ queue = mt76_connac_lmac_mapping(queue);
7154+ mvif->queue_params[queue] = *params;
7155+
7156+ return 0;
7157+}
7158+EXPORT_SYMBOL_GPL(mt792x_conf_tx);
7159+
7160+int mt792x_get_stats(struct ieee80211_hw *hw,
7161+ struct ieee80211_low_level_stats *stats)
7162+{
7163+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
7164+ struct mt76_mib_stats *mib = &phy->mib;
7165+
7166+ mt792x_mutex_acquire(phy->dev);
7167+
7168+ stats->dot11RTSSuccessCount = mib->rts_cnt;
7169+ stats->dot11RTSFailureCount = mib->rts_retries_cnt;
7170+ stats->dot11FCSErrorCount = mib->fcs_err_cnt;
7171+ stats->dot11ACKFailureCount = mib->ack_fail_cnt;
7172+
7173+ mt792x_mutex_release(phy->dev);
7174+
7175+ return 0;
7176+}
7177+EXPORT_SYMBOL_GPL(mt792x_get_stats);
7178+
7179+u64 mt792x_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
7180+{
7181+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7182+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7183+ u8 omac_idx = mvif->mt76.omac_idx;
7184+ union {
7185+ u64 t64;
7186+ u32 t32[2];
7187+ } tsf;
7188+ u16 n;
7189+
7190+ mt792x_mutex_acquire(dev);
7191+
7192+ n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx;
7193+ /* TSF software read */
7194+ mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_MODE);
7195+ tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0(0));
7196+ tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1(0));
7197+
7198+ mt792x_mutex_release(dev);
7199+
7200+ return tsf.t64;
7201+}
7202+EXPORT_SYMBOL_GPL(mt792x_get_tsf);
7203+
7204+void mt792x_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7205+ u64 timestamp)
7206+{
7207+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7208+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7209+ u8 omac_idx = mvif->mt76.omac_idx;
7210+ union {
7211+ u64 t64;
7212+ u32 t32[2];
7213+ } tsf = { .t64 = timestamp, };
7214+ u16 n;
7215+
7216+ mt792x_mutex_acquire(dev);
7217+
7218+ n = omac_idx > HW_BSSID_MAX ? HW_BSSID_0 : omac_idx;
7219+ mt76_wr(dev, MT_LPON_UTTR0(0), tsf.t32[0]);
7220+ mt76_wr(dev, MT_LPON_UTTR1(0), tsf.t32[1]);
7221+ /* TSF software overwrite */
7222+ mt76_set(dev, MT_LPON_TCR(0, n), MT_LPON_TCR_SW_WRITE);
7223+
7224+ mt792x_mutex_release(dev);
7225+}
7226+EXPORT_SYMBOL_GPL(mt792x_set_tsf);
7227+
7228+void mt792x_tx_worker(struct mt76_worker *w)
7229+{
7230+ struct mt792x_dev *dev = container_of(w, struct mt792x_dev,
7231+ mt76.tx_worker);
7232+
7233+ if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
7234+ queue_work(dev->mt76.wq, &dev->pm.wake_work);
7235+ return;
7236+ }
7237+
7238+ mt76_txq_schedule_all(&dev->mphy);
7239+ mt76_connac_pm_unref(&dev->mphy, &dev->pm);
7240+}
7241+EXPORT_SYMBOL_GPL(mt792x_tx_worker);
7242+
7243+void mt792x_roc_timer(struct timer_list *timer)
7244+{
7245+ struct mt792x_phy *phy = from_timer(phy, timer, roc_timer);
7246+
7247+ ieee80211_queue_work(phy->mt76->hw, &phy->roc_work);
7248+}
7249+EXPORT_SYMBOL_GPL(mt792x_roc_timer);
7250+
7251+void mt792x_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7252+ u32 queues, bool drop)
7253+{
7254+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7255+
7256+ wait_event_timeout(dev->mt76.tx_wait,
7257+ !mt76_has_tx_pending(&dev->mphy), HZ / 2);
7258+}
7259+EXPORT_SYMBOL_GPL(mt792x_flush);
7260+
7261+int mt792x_assign_vif_chanctx(struct ieee80211_hw *hw,
7262+ struct ieee80211_vif *vif,
7263+ struct ieee80211_bss_conf *link_conf,
7264+ struct ieee80211_chanctx_conf *ctx)
7265+{
7266+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7267+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7268+
7269+ mutex_lock(&dev->mt76.mutex);
7270+ mvif->ctx = ctx;
7271+ mutex_unlock(&dev->mt76.mutex);
7272+
7273+ return 0;
7274+}
7275+EXPORT_SYMBOL_GPL(mt792x_assign_vif_chanctx);
7276+
7277+void mt792x_unassign_vif_chanctx(struct ieee80211_hw *hw,
7278+ struct ieee80211_vif *vif,
7279+ struct ieee80211_bss_conf *link_conf,
7280+ struct ieee80211_chanctx_conf *ctx)
7281+{
7282+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7283+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7284+
7285+ mutex_lock(&dev->mt76.mutex);
7286+ mvif->ctx = NULL;
7287+ mutex_unlock(&dev->mt76.mutex);
7288+}
7289+EXPORT_SYMBOL_GPL(mt792x_unassign_vif_chanctx);
7290+
7291+void mt792x_set_wakeup(struct ieee80211_hw *hw, bool enabled)
7292+{
7293+ struct mt792x_dev *dev = mt792x_hw_dev(hw);
7294+ struct mt76_dev *mdev = &dev->mt76;
7295+
7296+ device_set_wakeup_enable(mdev->dev, enabled);
7297+}
7298+EXPORT_SYMBOL_GPL(mt792x_set_wakeup);
7299+
7300+static const char mt792x_gstrings_stats[][ETH_GSTRING_LEN] = {
7301+ /* tx counters */
7302+ "tx_ampdu_cnt",
7303+ "tx_mpdu_attempts",
7304+ "tx_mpdu_success",
7305+ "tx_pkt_ebf_cnt",
7306+ "tx_pkt_ibf_cnt",
7307+ "tx_ampdu_len:0-1",
7308+ "tx_ampdu_len:2-10",
7309+ "tx_ampdu_len:11-19",
7310+ "tx_ampdu_len:20-28",
7311+ "tx_ampdu_len:29-37",
7312+ "tx_ampdu_len:38-46",
7313+ "tx_ampdu_len:47-55",
7314+ "tx_ampdu_len:56-79",
7315+ "tx_ampdu_len:80-103",
7316+ "tx_ampdu_len:104-127",
7317+ "tx_ampdu_len:128-151",
7318+ "tx_ampdu_len:152-175",
7319+ "tx_ampdu_len:176-199",
7320+ "tx_ampdu_len:200-223",
7321+ "tx_ampdu_len:224-247",
7322+ "ba_miss_count",
7323+ "tx_beamformer_ppdu_iBF",
7324+ "tx_beamformer_ppdu_eBF",
7325+ "tx_beamformer_rx_feedback_all",
7326+ "tx_beamformer_rx_feedback_he",
7327+ "tx_beamformer_rx_feedback_vht",
7328+ "tx_beamformer_rx_feedback_ht",
7329+ "tx_msdu_pack_1",
7330+ "tx_msdu_pack_2",
7331+ "tx_msdu_pack_3",
7332+ "tx_msdu_pack_4",
7333+ "tx_msdu_pack_5",
7334+ "tx_msdu_pack_6",
7335+ "tx_msdu_pack_7",
7336+ "tx_msdu_pack_8",
7337+ /* rx counters */
7338+ "rx_mpdu_cnt",
7339+ "rx_ampdu_cnt",
7340+ "rx_ampdu_bytes_cnt",
7341+ "rx_ba_cnt",
7342+ /* per vif counters */
7343+ "v_tx_mode_cck",
7344+ "v_tx_mode_ofdm",
7345+ "v_tx_mode_ht",
7346+ "v_tx_mode_ht_gf",
7347+ "v_tx_mode_vht",
7348+ "v_tx_mode_he_su",
7349+ "v_tx_mode_he_ext_su",
7350+ "v_tx_mode_he_tb",
7351+ "v_tx_mode_he_mu",
7352+ "v_tx_mode_eht_su",
7353+ "v_tx_mode_eht_trig",
7354+ "v_tx_mode_eht_mu",
7355+ "v_tx_bw_20",
7356+ "v_tx_bw_40",
7357+ "v_tx_bw_80",
7358+ "v_tx_bw_160",
7359+ "v_tx_mcs_0",
7360+ "v_tx_mcs_1",
7361+ "v_tx_mcs_2",
7362+ "v_tx_mcs_3",
7363+ "v_tx_mcs_4",
7364+ "v_tx_mcs_5",
7365+ "v_tx_mcs_6",
7366+ "v_tx_mcs_7",
7367+ "v_tx_mcs_8",
7368+ "v_tx_mcs_9",
7369+ "v_tx_mcs_10",
7370+ "v_tx_mcs_11",
7371+ "v_tx_mcs_12",
7372+ "v_tx_mcs_13",
7373+ "v_tx_nss_1",
7374+ "v_tx_nss_2",
7375+ "v_tx_nss_3",
7376+ "v_tx_nss_4",
7377+};
7378+
7379+void mt792x_get_et_strings(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7380+ u32 sset, u8 *data)
7381+{
7382+ if (sset != ETH_SS_STATS)
7383+ return;
7384+
7385+ memcpy(data, *mt792x_gstrings_stats, sizeof(mt792x_gstrings_stats));
7386+
7387+ data += sizeof(mt792x_gstrings_stats);
7388+ page_pool_ethtool_stats_get_strings(data);
7389+}
7390+EXPORT_SYMBOL_GPL(mt792x_get_et_strings);
7391+
7392+int mt792x_get_et_sset_count(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7393+ int sset)
7394+{
7395+ if (sset != ETH_SS_STATS)
7396+ return 0;
7397+
7398+ return ARRAY_SIZE(mt792x_gstrings_stats) +
7399+ page_pool_ethtool_stats_get_count();
7400+}
7401+EXPORT_SYMBOL_GPL(mt792x_get_et_sset_count);
7402+
7403+static void
7404+mt792x_ethtool_worker(void *wi_data, struct ieee80211_sta *sta)
7405+{
7406+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
7407+ struct mt76_ethtool_worker_info *wi = wi_data;
7408+
7409+ if (msta->vif->mt76.idx != wi->idx)
7410+ return;
7411+
7412+ mt76_ethtool_worker(wi, &msta->wcid.stats, true);
7413+}
7414+
7415+void mt792x_get_et_stats(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
7416+ struct ethtool_stats *stats, u64 *data)
7417+{
7418+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
7419+ int stats_size = ARRAY_SIZE(mt792x_gstrings_stats);
7420+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
7421+ struct mt792x_dev *dev = phy->dev;
7422+ struct mt76_mib_stats *mib = &phy->mib;
7423+ struct mt76_ethtool_worker_info wi = {
7424+ .data = data,
7425+ .idx = mvif->mt76.idx,
7426+ };
7427+ int i, ei = 0;
7428+
7429+ mt792x_mutex_acquire(dev);
7430+
7431+ mt792x_mac_update_mib_stats(phy);
7432+
7433+ data[ei++] = mib->tx_ampdu_cnt;
7434+ data[ei++] = mib->tx_mpdu_attempts_cnt;
7435+ data[ei++] = mib->tx_mpdu_success_cnt;
7436+ data[ei++] = mib->tx_pkt_ebf_cnt;
7437+ data[ei++] = mib->tx_pkt_ibf_cnt;
7438+
7439+ /* Tx ampdu stat */
7440+ for (i = 0; i < 15; i++)
7441+ data[ei++] = phy->mt76->aggr_stats[i];
7442+
7443+ data[ei++] = phy->mib.ba_miss_cnt;
7444+
7445+ /* Tx Beamformer monitor */
7446+ data[ei++] = mib->tx_bf_ibf_ppdu_cnt;
7447+ data[ei++] = mib->tx_bf_ebf_ppdu_cnt;
7448+
7449+ /* Tx Beamformer Rx feedback monitor */
7450+ data[ei++] = mib->tx_bf_rx_fb_all_cnt;
7451+ data[ei++] = mib->tx_bf_rx_fb_he_cnt;
7452+ data[ei++] = mib->tx_bf_rx_fb_vht_cnt;
7453+ data[ei++] = mib->tx_bf_rx_fb_ht_cnt;
7454+
7455+ /* Tx amsdu info (pack-count histogram) */
7456+ for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++)
7457+ data[ei++] = mib->tx_amsdu[i];
7458+
7459+ /* rx counters */
7460+ data[ei++] = mib->rx_mpdu_cnt;
7461+ data[ei++] = mib->rx_ampdu_cnt;
7462+ data[ei++] = mib->rx_ampdu_bytes_cnt;
7463+ data[ei++] = mib->rx_ba_cnt;
7464+
7465+ /* Add values for all stations owned by this vif */
7466+ wi.initial_stat_idx = ei;
7467+ ieee80211_iterate_stations_atomic(hw, mt792x_ethtool_worker, &wi);
7468+
7469+ mt792x_mutex_release(dev);
7470+
7471+ if (!wi.sta_count)
7472+ return;
7473+
7474+ ei += wi.worker_stat_count;
7475+
7476+ mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei);
7477+ stats_size += page_pool_ethtool_stats_get_count();
7478+
7479+ if (ei != stats_size)
7480+ dev_err(dev->mt76.dev, "ei: %d SSTATS_LEN: %d", ei,
7481+ stats_size);
7482+}
7483+EXPORT_SYMBOL_GPL(mt792x_get_et_stats);
7484+
7485+void mt792x_sta_statistics(struct ieee80211_hw *hw,
7486+ struct ieee80211_vif *vif,
7487+ struct ieee80211_sta *sta,
7488+ struct station_info *sinfo)
7489+{
7490+ struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv;
7491+ struct rate_info *txrate = &msta->wcid.rate;
7492+
7493+ if (!txrate->legacy && !txrate->flags)
7494+ return;
7495+
7496+ if (txrate->legacy) {
7497+ sinfo->txrate.legacy = txrate->legacy;
7498+ } else {
7499+ sinfo->txrate.mcs = txrate->mcs;
7500+ sinfo->txrate.nss = txrate->nss;
7501+ sinfo->txrate.bw = txrate->bw;
7502+ sinfo->txrate.he_gi = txrate->he_gi;
7503+ sinfo->txrate.he_dcm = txrate->he_dcm;
7504+ sinfo->txrate.he_ru_alloc = txrate->he_ru_alloc;
7505+ }
7506+ sinfo->tx_failed = msta->wcid.stats.tx_failed;
7507+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_FAILED);
7508+
7509+ sinfo->tx_retries = msta->wcid.stats.tx_retries;
7510+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_RETRIES);
7511+
7512+ sinfo->txrate.flags = txrate->flags;
7513+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
7514+
7515+ sinfo->ack_signal = (s8)msta->ack_signal;
7516+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL);
7517+
7518+ sinfo->avg_ack_signal = -(s8)ewma_avg_signal_read(&msta->avg_ack_signal);
7519+ sinfo->filled |= BIT_ULL(NL80211_STA_INFO_ACK_SIGNAL_AVG);
7520+}
7521+EXPORT_SYMBOL_GPL(mt792x_sta_statistics);
7522+
7523+void mt792x_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
7524+{
7525+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
7526+ struct mt792x_dev *dev = phy->dev;
7527+
7528+ mt792x_mutex_acquire(dev);
7529+
7530+ phy->coverage_class = max_t(s16, coverage_class, 0);
7531+ mt792x_mac_set_timeing(phy);
7532+
7533+ mt792x_mutex_release(dev);
7534+}
7535+EXPORT_SYMBOL_GPL(mt792x_set_coverage_class);
7536+
7537+int mt792x_init_wiphy(struct ieee80211_hw *hw)
7538+{
7539+ struct mt792x_phy *phy = mt792x_hw_phy(hw);
7540+ struct mt792x_dev *dev = phy->dev;
7541+ struct wiphy *wiphy = hw->wiphy;
7542+
7543+ hw->queues = 4;
7544+ if (dev->has_eht) {
7545+ hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_EHT;
7546+ hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_EHT;
7547+ } else {
7548+ hw->max_rx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
7549+ hw->max_tx_aggregation_subframes = IEEE80211_MAX_AMPDU_BUF_HE;
7550+ }
7551+ hw->netdev_features = NETIF_F_RXCSUM;
7552+
7553+ hw->radiotap_timestamp.units_pos =
7554+ IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US;
7555+
7556+ phy->slottime = 9;
7557+
7558+ hw->sta_data_size = sizeof(struct mt792x_sta);
7559+ hw->vif_data_size = sizeof(struct mt792x_vif);
7560+
7561+ if (dev->fw_features & MT792x_FW_CAP_CNM) {
7562+ wiphy->flags |= WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
7563+ wiphy->iface_combinations = if_comb_chanctx;
7564+ wiphy->n_iface_combinations = ARRAY_SIZE(if_comb_chanctx);
7565+ } else {
7566+ wiphy->flags &= ~WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
7567+ wiphy->iface_combinations = if_comb;
7568+ wiphy->n_iface_combinations = ARRAY_SIZE(if_comb);
7569+ }
7570+ wiphy->flags &= ~(WIPHY_FLAG_IBSS_RSN | WIPHY_FLAG_4ADDR_AP |
7571+ WIPHY_FLAG_4ADDR_STATION);
7572+ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
7573+ BIT(NL80211_IFTYPE_AP) |
7574+ BIT(NL80211_IFTYPE_P2P_CLIENT) |
7575+ BIT(NL80211_IFTYPE_P2P_GO);
7576+ wiphy->max_remain_on_channel_duration = 5000;
7577+ wiphy->max_scan_ie_len = MT76_CONNAC_SCAN_IE_LEN;
7578+ wiphy->max_scan_ssids = 4;
7579+ wiphy->max_sched_scan_plan_interval =
7580+ MT76_CONNAC_MAX_TIME_SCHED_SCAN_INTERVAL;
7581+ wiphy->max_sched_scan_ie_len = IEEE80211_MAX_DATA_LEN;
7582+ wiphy->max_sched_scan_ssids = MT76_CONNAC_MAX_SCHED_SCAN_SSID;
7583+ wiphy->max_match_sets = MT76_CONNAC_MAX_SCAN_MATCH;
7584+ wiphy->max_sched_scan_reqs = 1;
7585+ wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH |
7586+ WIPHY_FLAG_SPLIT_SCAN_6GHZ;
7587+
7588+ wiphy->features |= NL80211_FEATURE_SCHED_SCAN_RANDOM_MAC_ADDR |
7589+ NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
7590+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
7591+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_LEGACY);
7592+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HT);
7593+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_VHT);
7594+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_BEACON_RATE_HE);
7595+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_ACK_SIGNAL_SUPPORT);
7596+ wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
7597+
7598+ ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS);
7599+ ieee80211_hw_set(hw, HAS_RATE_CONTROL);
7600+ ieee80211_hw_set(hw, SUPPORTS_TX_ENCAP_OFFLOAD);
7601+ ieee80211_hw_set(hw, SUPPORTS_RX_DECAP_OFFLOAD);
7602+ ieee80211_hw_set(hw, WANT_MONITOR_VIF);
7603+ ieee80211_hw_set(hw, SUPPORTS_PS);
7604+ ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
7605+ ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
7606+ ieee80211_hw_set(hw, CONNECTION_MONITOR);
7607+
7608+ if (dev->pm.enable)
7609+ ieee80211_hw_set(hw, CONNECTION_MONITOR);
7610+
7611+ hw->max_tx_fragments = 4;
7612+
7613+ return 0;
7614+}
7615+EXPORT_SYMBOL_GPL(mt792x_init_wiphy);
7616+
7617+static u8
7618+mt792x_get_offload_capability(struct device *dev, const char *fw_wm)
7619+{
7620+ const struct mt76_connac2_fw_trailer *hdr;
7621+ struct mt792x_realease_info *rel_info;
7622+ const struct firmware *fw;
7623+ int ret, i, offset = 0;
7624+ const u8 *data, *end;
7625+ u8 offload_caps = 0;
7626+
7627+ ret = request_firmware(&fw, fw_wm, dev);
7628+ if (ret)
7629+ return ret;
7630+
7631+ if (!fw || !fw->data || fw->size < sizeof(*hdr)) {
7632+ dev_err(dev, "Invalid firmware\n");
7633+ goto out;
7634+ }
7635+
7636+ data = fw->data;
7637+ hdr = (const void *)(fw->data + fw->size - sizeof(*hdr));
7638+
7639+ for (i = 0; i < hdr->n_region; i++) {
7640+ const struct mt76_connac2_fw_region *region;
7641+
7642+ region = (const void *)((const u8 *)hdr -
7643+ (hdr->n_region - i) * sizeof(*region));
7644+ offset += le32_to_cpu(region->len);
7645+ }
7646+
7647+ data += offset + 16;
7648+ rel_info = (struct mt792x_realease_info *)data;
7649+ data += sizeof(*rel_info);
7650+ end = data + le16_to_cpu(rel_info->len);
7651+
7652+ while (data < end) {
7653+ rel_info = (struct mt792x_realease_info *)data;
7654+ data += sizeof(*rel_info);
7655+
7656+ if (rel_info->tag == MT792x_FW_TAG_FEATURE) {
7657+ struct mt792x_fw_features *features;
7658+
7659+ features = (struct mt792x_fw_features *)data;
7660+ offload_caps = features->data;
7661+ break;
7662+ }
7663+
7664+ data += le16_to_cpu(rel_info->len) + rel_info->pad_len;
7665+ }
7666+
7667+out:
7668+ release_firmware(fw);
7669+
7670+ return offload_caps;
7671+}
7672+
7673+struct ieee80211_ops *
7674+mt792x_get_mac80211_ops(struct device *dev,
7675+ const struct ieee80211_ops *mac80211_ops,
7676+ void *drv_data, u8 *fw_features)
7677+{
7678+ struct ieee80211_ops *ops;
7679+
7680+ ops = devm_kmemdup(dev, mac80211_ops, sizeof(struct ieee80211_ops),
7681+ GFP_KERNEL);
7682+ if (!ops)
7683+ return NULL;
7684+
7685+ *fw_features = mt792x_get_offload_capability(dev, drv_data);
7686+ if (!(*fw_features & MT792x_FW_CAP_CNM)) {
7687+ ops->remain_on_channel = NULL;
7688+ ops->cancel_remain_on_channel = NULL;
7689+ ops->add_chanctx = NULL;
7690+ ops->remove_chanctx = NULL;
7691+ ops->change_chanctx = NULL;
7692+ ops->assign_vif_chanctx = NULL;
7693+ ops->unassign_vif_chanctx = NULL;
7694+ ops->mgd_prepare_tx = NULL;
7695+ ops->mgd_complete_tx = NULL;
7696+ }
7697+ return ops;
7698+}
7699+EXPORT_SYMBOL_GPL(mt792x_get_mac80211_ops);
7700+
7701+int mt792x_init_wcid(struct mt792x_dev *dev)
7702+{
7703+ int idx;
7704+
7705+ /* Beacon and mgmt frames should occupy wcid 0 */
7706+ idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT792x_WTBL_STA - 1);
7707+ if (idx)
7708+ return -ENOSPC;
7709+
7710+ dev->mt76.global_wcid.idx = idx;
7711+ dev->mt76.global_wcid.hw_key_idx = -1;
7712+ dev->mt76.global_wcid.tx_info |= MT_WCID_TX_INFO_SET;
7713+ rcu_assign_pointer(dev->mt76.wcid[idx], &dev->mt76.global_wcid);
7714+
7715+ return 0;
7716+}
7717+EXPORT_SYMBOL_GPL(mt792x_init_wcid);
7718+
7719+int mt792x_mcu_drv_pmctrl(struct mt792x_dev *dev)
7720+{
7721+ struct mt76_phy *mphy = &dev->mt76.phy;
7722+ struct mt76_connac_pm *pm = &dev->pm;
7723+ int err = 0;
7724+
7725+ mutex_lock(&pm->mutex);
7726+
7727+ if (!test_bit(MT76_STATE_PM, &mphy->state))
7728+ goto out;
7729+
7730+ err = __mt792x_mcu_drv_pmctrl(dev);
7731+out:
7732+ mutex_unlock(&pm->mutex);
7733+
7734+ if (err)
7735+ mt792x_reset(&dev->mt76);
7736+
7737+ return err;
7738+}
7739+EXPORT_SYMBOL_GPL(mt792x_mcu_drv_pmctrl);
7740+
7741+int mt792x_mcu_fw_pmctrl(struct mt792x_dev *dev)
7742+{
7743+ struct mt76_phy *mphy = &dev->mt76.phy;
7744+ struct mt76_connac_pm *pm = &dev->pm;
7745+ int err = 0;
7746+
7747+ mutex_lock(&pm->mutex);
7748+
7749+ if (mt76_connac_skip_fw_pmctrl(mphy, pm))
7750+ goto out;
7751+
7752+ err = __mt792x_mcu_fw_pmctrl(dev);
7753+out:
7754+ mutex_unlock(&pm->mutex);
7755+
7756+ if (err)
7757+ mt792x_reset(&dev->mt76);
7758+
7759+ return err;
7760+}
7761+EXPORT_SYMBOL_GPL(mt792x_mcu_fw_pmctrl);
7762+
7763+int __mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev)
7764+{
7765+ int i, err = 0;
7766+
7767+ for (i = 0; i < MT792x_DRV_OWN_RETRY_COUNT; i++) {
7768+ mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_CLR_OWN);
7769+ if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL,
7770+ PCIE_LPCR_HOST_OWN_SYNC, 0, 50, 1))
7771+ break;
7772+ }
7773+
7774+ if (i == MT792x_DRV_OWN_RETRY_COUNT) {
7775+ dev_err(dev->mt76.dev, "driver own failed\n");
7776+ err = -EIO;
7777+ }
7778+
7779+ return err;
7780+}
7781+EXPORT_SYMBOL_GPL(__mt792xe_mcu_drv_pmctrl);
7782+
7783+int mt792xe_mcu_drv_pmctrl(struct mt792x_dev *dev)
7784+{
7785+ struct mt76_phy *mphy = &dev->mt76.phy;
7786+ struct mt76_connac_pm *pm = &dev->pm;
7787+ int err;
7788+
7789+ err = __mt792xe_mcu_drv_pmctrl(dev);
7790+ if (err < 0)
7791+ goto out;
7792+
7793+ mt792x_wpdma_reinit_cond(dev);
7794+ clear_bit(MT76_STATE_PM, &mphy->state);
7795+
7796+ pm->stats.last_wake_event = jiffies;
7797+ pm->stats.doze_time += pm->stats.last_wake_event -
7798+ pm->stats.last_doze_event;
7799+out:
7800+ return err;
7801+}
7802+EXPORT_SYMBOL_GPL(mt792xe_mcu_drv_pmctrl);
7803+
7804+int mt792xe_mcu_fw_pmctrl(struct mt792x_dev *dev)
7805+{
7806+ struct mt76_phy *mphy = &dev->mt76.phy;
7807+ struct mt76_connac_pm *pm = &dev->pm;
7808+ int i;
7809+
7810+ for (i = 0; i < MT792x_DRV_OWN_RETRY_COUNT; i++) {
7811+ mt76_wr(dev, MT_CONN_ON_LPCTL, PCIE_LPCR_HOST_SET_OWN);
7812+ if (mt76_poll_msec_tick(dev, MT_CONN_ON_LPCTL,
7813+ PCIE_LPCR_HOST_OWN_SYNC, 4, 50, 1))
7814+ break;
7815+ }
7816+
7817+ if (i == MT792x_DRV_OWN_RETRY_COUNT) {
7818+ dev_err(dev->mt76.dev, "firmware own failed\n");
7819+ clear_bit(MT76_STATE_PM, &mphy->state);
7820+ return -EIO;
7821+ }
7822+
7823+ pm->stats.last_doze_event = jiffies;
7824+ pm->stats.awake_time += pm->stats.last_doze_event -
7825+ pm->stats.last_wake_event;
7826+
7827+ return 0;
7828+}
7829+EXPORT_SYMBOL_GPL(mt792xe_mcu_fw_pmctrl);
7830+
7831+int mt792x_load_firmware(struct mt792x_dev *dev)
7832+{
7833+ int ret;
7834+
7835+ ret = mt76_connac2_load_patch(&dev->mt76, mt792x_patch_name(dev));
7836+ if (ret)
7837+ return ret;
7838+
7839+ if (mt76_is_sdio(&dev->mt76)) {
7840+ /* activate again */
7841+ ret = __mt792x_mcu_fw_pmctrl(dev);
7842+ if (!ret)
7843+ ret = __mt792x_mcu_drv_pmctrl(dev);
7844+ }
7845+
7846+ ret = mt76_connac2_load_ram(&dev->mt76, mt792x_ram_name(dev), NULL);
7847+ if (ret)
7848+ return ret;
7849+
7850+ if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_N9_RDY,
7851+ MT_TOP_MISC2_FW_N9_RDY, 1500)) {
7852+ dev_err(dev->mt76.dev, "Timeout for initializing firmware\n");
7853+
7854+ return -EIO;
7855+ }
7856+
7857+#ifdef CONFIG_PM
7858+ dev->mt76.hw->wiphy->wowlan = &mt76_connac_wowlan_support;
7859+#endif /* CONFIG_PM */
7860+
7861+ dev_dbg(dev->mt76.dev, "Firmware init done\n");
7862+
7863+ return 0;
7864+}
7865+EXPORT_SYMBOL_GPL(mt792x_load_firmware);
7866+
7867+MODULE_LICENSE("Dual BSD/GPL");
7868+MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
7869diff --git a/mt792x_debugfs.c b/mt792x_debugfs.c
7870new file mode 100644
7871index 00000000..9858d9a9
7872--- /dev/null
7873+++ b/mt792x_debugfs.c
7874@@ -0,0 +1,168 @@
7875+// SPDX-License-Identifier: ISC
7876+/* Copyright (C) 2023 MediaTek Inc. */
7877+
7878+#include "mt792x.h"
7879+
7880+static void
7881+mt792x_ampdu_stat_read_phy(struct mt792x_phy *phy,
7882+ struct seq_file *file)
7883+{
7884+ struct mt792x_dev *dev = file->private;
7885+ int bound[15], range[4], i;
7886+
7887+ if (!phy)
7888+ return;
7889+
7890+ mt792x_mac_update_mib_stats(phy);
7891+
7892+ /* Tx ampdu stat */
7893+ for (i = 0; i < ARRAY_SIZE(range); i++)
7894+ range[i] = mt76_rr(dev, MT_MIB_ARNG(0, i));
7895+
7896+ for (i = 0; i < ARRAY_SIZE(bound); i++)
7897+ bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1;
7898+
7899+ seq_puts(file, "\nPhy0\n");
7900+
7901+ seq_printf(file, "Length: %8d | ", bound[0]);
7902+ for (i = 0; i < ARRAY_SIZE(bound) - 1; i++)
7903+ seq_printf(file, "%3d %3d | ", bound[i] + 1, bound[i + 1]);
7904+
7905+ seq_puts(file, "\nCount: ");
7906+ for (i = 0; i < ARRAY_SIZE(bound); i++)
7907+ seq_printf(file, "%8d | ", phy->mt76->aggr_stats[i]);
7908+ seq_puts(file, "\n");
7909+
7910+ seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt);
7911+}
7912+
7913+int mt792x_tx_stats_show(struct seq_file *file, void *data)
7914+{
7915+ struct mt792x_dev *dev = file->private;
7916+ struct mt792x_phy *phy = &dev->phy;
7917+ struct mt76_mib_stats *mib = &phy->mib;
7918+ int i;
7919+
7920+ mt792x_mutex_acquire(dev);
7921+
7922+ mt792x_ampdu_stat_read_phy(phy, file);
7923+
7924+ seq_puts(file, "Tx MSDU stat:\n");
7925+ for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
7926+ seq_printf(file, "AMSDU pack count of %d MSDU in TXD: %8d ",
7927+ i + 1, mib->tx_amsdu[i]);
7928+ if (mib->tx_amsdu_cnt)
7929+ seq_printf(file, "(%3d%%)\n",
7930+ mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt);
7931+ else
7932+ seq_puts(file, "\n");
7933+ }
7934+
7935+ mt792x_mutex_release(dev);
7936+
7937+ return 0;
7938+}
7939+EXPORT_SYMBOL_GPL(mt792x_tx_stats_show);
7940+
7941+int mt792x_queues_acq(struct seq_file *s, void *data)
7942+{
7943+ struct mt792x_dev *dev = dev_get_drvdata(s->private);
7944+ int i;
7945+
7946+ mt792x_mutex_acquire(dev);
7947+
7948+ for (i = 0; i < 4; i++) {
7949+ u32 ctrl, val, qlen = 0;
7950+ int j;
7951+
7952+ val = mt76_rr(dev, MT_PLE_AC_QEMPTY(i));
7953+ ctrl = BIT(31) | BIT(11) | (i << 24);
7954+
7955+ for (j = 0; j < 32; j++) {
7956+ if (val & BIT(j))
7957+ continue;
7958+
7959+ mt76_wr(dev, MT_PLE_FL_Q0_CTRL, ctrl | j);
7960+ qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
7961+ GENMASK(11, 0));
7962+ }
7963+ seq_printf(s, "AC%d: queued=%d\n", i, qlen);
7964+ }
7965+
7966+ mt792x_mutex_release(dev);
7967+
7968+ return 0;
7969+}
7970+EXPORT_SYMBOL_GPL(mt792x_queues_acq);
7971+
7972+int mt792x_queues_read(struct seq_file *s, void *data)
7973+{
7974+ struct mt792x_dev *dev = dev_get_drvdata(s->private);
7975+ struct {
7976+ struct mt76_queue *q;
7977+ char *queue;
7978+ } queue_map[] = {
7979+ { dev->mphy.q_tx[MT_TXQ_BE], "WFDMA0" },
7980+ { dev->mt76.q_mcu[MT_MCUQ_WM], "MCUWM" },
7981+ { dev->mt76.q_mcu[MT_MCUQ_FWDL], "MCUFWQ" },
7982+ };
7983+ int i;
7984+
7985+ for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
7986+ struct mt76_queue *q = queue_map[i].q;
7987+
7988+ if (!q)
7989+ continue;
7990+
7991+ seq_printf(s,
7992+ "%s: queued=%d head=%d tail=%d\n",
7993+ queue_map[i].queue, q->queued, q->head,
7994+ q->tail);
7995+ }
7996+
7997+ return 0;
7998+}
7999+EXPORT_SYMBOL_GPL(mt792x_queues_read);
8000+
8001+int mt792x_pm_stats(struct seq_file *s, void *data)
8002+{
8003+ struct mt792x_dev *dev = dev_get_drvdata(s->private);
8004+ struct mt76_connac_pm *pm = &dev->pm;
8005+
8006+ unsigned long awake_time = pm->stats.awake_time;
8007+ unsigned long doze_time = pm->stats.doze_time;
8008+
8009+ if (!test_bit(MT76_STATE_PM, &dev->mphy.state))
8010+ awake_time += jiffies - pm->stats.last_wake_event;
8011+ else
8012+ doze_time += jiffies - pm->stats.last_doze_event;
8013+
8014+ seq_printf(s, "awake time: %14u\ndoze time: %15u\n",
8015+ jiffies_to_msecs(awake_time),
8016+ jiffies_to_msecs(doze_time));
8017+
8018+ seq_printf(s, "low power wakes: %9d\n", pm->stats.lp_wake);
8019+
8020+ return 0;
8021+}
8022+EXPORT_SYMBOL_GPL(mt792x_pm_stats);
8023+
8024+int mt792x_pm_idle_timeout_set(void *data, u64 val)
8025+{
8026+ struct mt792x_dev *dev = data;
8027+
8028+ dev->pm.idle_timeout = msecs_to_jiffies(val);
8029+
8030+ return 0;
8031+}
8032+EXPORT_SYMBOL_GPL(mt792x_pm_idle_timeout_set);
8033+
8034+int mt792x_pm_idle_timeout_get(void *data, u64 *val)
8035+{
8036+ struct mt792x_dev *dev = data;
8037+
8038+ *val = jiffies_to_msecs(dev->pm.idle_timeout);
8039+
8040+ return 0;
8041+}
8042+EXPORT_SYMBOL_GPL(mt792x_pm_idle_timeout_get);
8043diff --git a/mt7921/dma.c b/mt792x_dma.c
8044similarity index 55%
8045rename from mt7921/dma.c
8046rename to mt792x_dma.c
8047index 4153cd6c..a3dbd386 100644
8048--- a/mt7921/dma.c
8049+++ b/mt792x_dma.c
8050@@ -1,52 +1,93 @@
8051 // SPDX-License-Identifier: ISC
8052-/* Copyright (C) 2020 MediaTek Inc. */
8053+/* Copyright (C) 2023 MediaTek Inc. */
8054
8055-#include "mt7921.h"
8056-#include "../dma.h"
8057-#include "../mt76_connac2_mac.h"
8058+#include <linux/module.h>
8059+#include <linux/firmware.h>
8060
8061-static int mt7921_poll_tx(struct napi_struct *napi, int budget)
8062+#include "mt792x.h"
8063+#include "dma.h"
8064+#include "trace.h"
8065+
8066+irqreturn_t mt792x_irq_handler(int irq, void *dev_instance)
8067 {
8068- struct mt7921_dev *dev;
8069+ struct mt792x_dev *dev = dev_instance;
8070
8071- dev = container_of(napi, struct mt7921_dev, mt76.tx_napi);
8072+ mt76_wr(dev, dev->irq_map->host_irq_enable, 0);
8073
8074- if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
8075- napi_complete(napi);
8076- queue_work(dev->mt76.wq, &dev->pm.wake_work);
8077- return 0;
8078- }
8079+ if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
8080+ return IRQ_NONE;
8081
8082- mt76_connac_tx_cleanup(&dev->mt76);
8083- if (napi_complete(napi))
8084- mt76_connac_irq_enable(&dev->mt76, MT_INT_TX_DONE_ALL);
8085- mt76_connac_pm_unref(&dev->mphy, &dev->pm);
8086+ tasklet_schedule(&dev->mt76.irq_tasklet);
8087
8088- return 0;
8089+ return IRQ_HANDLED;
8090 }
8091+EXPORT_SYMBOL_GPL(mt792x_irq_handler);
8092
8093-static int mt7921_poll_rx(struct napi_struct *napi, int budget)
8094+void mt792x_irq_tasklet(unsigned long data)
8095 {
8096- struct mt7921_dev *dev;
8097- int done;
8098+ struct mt792x_dev *dev = (struct mt792x_dev *)data;
8099+ const struct mt792x_irq_map *irq_map = dev->irq_map;
8100+ u32 intr, mask = 0;
8101
8102- dev = container_of(napi->dev, struct mt7921_dev, mt76.napi_dev);
8103+ mt76_wr(dev, irq_map->host_irq_enable, 0);
8104
8105- if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
8106- napi_complete(napi);
8107- queue_work(dev->mt76.wq, &dev->pm.wake_work);
8108- return 0;
8109+ intr = mt76_rr(dev, MT_WFDMA0_HOST_INT_STA);
8110+ intr &= dev->mt76.mmio.irqmask;
8111+ mt76_wr(dev, MT_WFDMA0_HOST_INT_STA, intr);
8112+
8113+ trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
8114+
8115+ mask |= intr & (irq_map->rx.data_complete_mask |
8116+ irq_map->rx.wm_complete_mask |
8117+ irq_map->rx.wm2_complete_mask);
8118+ if (intr & dev->irq_map->tx.mcu_complete_mask)
8119+ mask |= dev->irq_map->tx.mcu_complete_mask;
8120+
8121+ if (intr & MT_INT_MCU_CMD) {
8122+ u32 intr_sw;
8123+
8124+ intr_sw = mt76_rr(dev, MT_MCU_CMD);
8125+ /* ack MCU2HOST_SW_INT_STA */
8126+ mt76_wr(dev, MT_MCU_CMD, intr_sw);
8127+ if (intr_sw & MT_MCU_CMD_WAKE_RX_PCIE) {
8128+ mask |= irq_map->rx.data_complete_mask;
8129+ intr |= irq_map->rx.data_complete_mask;
8130+ }
8131 }
8132- done = mt76_dma_rx_poll(napi, budget);
8133- mt76_connac_pm_unref(&dev->mphy, &dev->pm);
8134
8135- return done;
8136+ mt76_set_irq_mask(&dev->mt76, irq_map->host_irq_enable, mask, 0);
8137+
8138+ if (intr & dev->irq_map->tx.all_complete_mask)
8139+ napi_schedule(&dev->mt76.tx_napi);
8140+
8141+ if (intr & irq_map->rx.wm_complete_mask)
8142+ napi_schedule(&dev->mt76.napi[MT_RXQ_MCU]);
8143+
8144+ if (intr & irq_map->rx.wm2_complete_mask)
8145+ napi_schedule(&dev->mt76.napi[MT_RXQ_MCU_WA]);
8146+
8147+ if (intr & irq_map->rx.data_complete_mask)
8148+ napi_schedule(&dev->mt76.napi[MT_RXQ_MAIN]);
8149 }
8150+EXPORT_SYMBOL_GPL(mt792x_irq_tasklet);
8151
8152-static void mt7921_dma_prefetch(struct mt7921_dev *dev)
8153+void mt792x_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q)
8154 {
8155-#define PREFETCH(base, depth) ((base) << 16 | (depth))
8156+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
8157+ const struct mt792x_irq_map *irq_map = dev->irq_map;
8158+
8159+ if (q == MT_RXQ_MAIN)
8160+ mt76_connac_irq_enable(mdev, irq_map->rx.data_complete_mask);
8161+ else if (q == MT_RXQ_MCU_WA)
8162+ mt76_connac_irq_enable(mdev, irq_map->rx.wm2_complete_mask);
8163+ else
8164+ mt76_connac_irq_enable(mdev, irq_map->rx.wm_complete_mask);
8165+}
8166+EXPORT_SYMBOL_GPL(mt792x_rx_poll_complete);
8167
8168+#define PREFETCH(base, depth) ((base) << 16 | (depth))
8169+static void mt792x_dma_prefetch(struct mt792x_dev *dev)
8170+{
8171 mt76_wr(dev, MT_WFDMA0_RX_RING0_EXT_CTRL, PREFETCH(0x0, 0x4));
8172 mt76_wr(dev, MT_WFDMA0_RX_RING2_EXT_CTRL, PREFETCH(0x40, 0x4));
8173 mt76_wr(dev, MT_WFDMA0_RX_RING3_EXT_CTRL, PREFETCH(0x80, 0x4));
8174@@ -64,44 +105,10 @@ static void mt7921_dma_prefetch(struct mt7921_dev *dev)
8175 mt76_wr(dev, MT_WFDMA0_TX_RING17_EXT_CTRL, PREFETCH(0x380, 0x4));
8176 }
8177
8178-static int mt7921_dma_disable(struct mt7921_dev *dev, bool force)
8179-{
8180- /* disable WFDMA0 */
8181- mt76_clear(dev, MT_WFDMA0_GLO_CFG,
8182- MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN |
8183- MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN |
8184- MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
8185- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO |
8186- MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
8187-
8188- if (!mt76_poll_msec_tick(dev, MT_WFDMA0_GLO_CFG,
8189- MT_WFDMA0_GLO_CFG_TX_DMA_BUSY |
8190- MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 100, 1))
8191- return -ETIMEDOUT;
8192-
8193- /* disable dmashdl */
8194- mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0,
8195- MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
8196- mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
8197-
8198- if (force) {
8199- /* reset */
8200- mt76_clear(dev, MT_WFDMA0_RST,
8201- MT_WFDMA0_RST_DMASHDL_ALL_RST |
8202- MT_WFDMA0_RST_LOGIC_RST);
8203-
8204- mt76_set(dev, MT_WFDMA0_RST,
8205- MT_WFDMA0_RST_DMASHDL_ALL_RST |
8206- MT_WFDMA0_RST_LOGIC_RST);
8207- }
8208-
8209- return 0;
8210-}
8211-
8212-static int mt7921_dma_enable(struct mt7921_dev *dev)
8213+int mt792x_dma_enable(struct mt792x_dev *dev)
8214 {
8215 /* configure perfetch settings */
8216- mt7921_dma_prefetch(dev);
8217+ mt792x_dma_prefetch(dev);
8218
8219 /* reset dma idx */
8220 mt76_wr(dev, MT_WFDMA0_RST_DTX_PTR, ~0);
8221@@ -124,18 +131,23 @@ static int mt7921_dma_enable(struct mt7921_dev *dev)
8222
8223 /* enable interrupts for TX/RX rings */
8224 mt76_connac_irq_enable(&dev->mt76,
8225- MT_INT_RX_DONE_ALL | MT_INT_TX_DONE_ALL |
8226+ dev->irq_map->tx.all_complete_mask |
8227+ dev->irq_map->rx.data_complete_mask |
8228+ dev->irq_map->rx.wm2_complete_mask |
8229+ dev->irq_map->rx.wm_complete_mask |
8230 MT_INT_MCU_CMD);
8231 mt76_set(dev, MT_MCU2HOST_SW_INT_ENA, MT_MCU_CMD_WAKE_RX_PCIE);
8232
8233 return 0;
8234 }
8235+EXPORT_SYMBOL_GPL(mt792x_dma_enable);
8236
8237-static int mt7921_dma_reset(struct mt7921_dev *dev, bool force)
8238+static int
8239+mt792x_dma_reset(struct mt792x_dev *dev, bool force)
8240 {
8241 int i, err;
8242
8243- err = mt7921_dma_disable(dev, force);
8244+ err = mt792x_dma_disable(dev, force);
8245 if (err)
8246 return err;
8247
8248@@ -151,23 +163,10 @@ static int mt7921_dma_reset(struct mt7921_dev *dev, bool force)
8249
8250 mt76_tx_status_check(&dev->mt76, true);
8251
8252- return mt7921_dma_enable(dev);
8253-}
8254-
8255-int mt7921_wfsys_reset(struct mt7921_dev *dev)
8256-{
8257- mt76_clear(dev, MT_WFSYS_SW_RST_B, WFSYS_SW_RST_B);
8258- msleep(50);
8259- mt76_set(dev, MT_WFSYS_SW_RST_B, WFSYS_SW_RST_B);
8260-
8261- if (!__mt76_poll_msec(&dev->mt76, MT_WFSYS_SW_RST_B,
8262- WFSYS_SW_INIT_DONE, WFSYS_SW_INIT_DONE, 500))
8263- return -ETIMEDOUT;
8264-
8265- return 0;
8266+ return mt792x_dma_enable(dev);
8267 }
8268
8269-int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force)
8270+int mt792x_wpdma_reset(struct mt792x_dev *dev, bool force)
8271 {
8272 int i, err;
8273
8274@@ -182,11 +181,11 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force)
8275 mt76_queue_rx_cleanup(dev, &dev->mt76.q_rx[i]);
8276
8277 if (force) {
8278- err = mt7921_wfsys_reset(dev);
8279+ err = mt792x_wfsys_reset(dev);
8280 if (err)
8281 return err;
8282 }
8283- err = mt7921_dma_reset(dev, force);
8284+ err = mt792x_dma_reset(dev, force);
8285 if (err)
8286 return err;
8287
8288@@ -195,19 +194,20 @@ int mt7921_wpdma_reset(struct mt7921_dev *dev, bool force)
8289
8290 return 0;
8291 }
8292+EXPORT_SYMBOL_GPL(mt792x_wpdma_reset);
8293
8294-int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev)
8295+int mt792x_wpdma_reinit_cond(struct mt792x_dev *dev)
8296 {
8297 struct mt76_connac_pm *pm = &dev->pm;
8298 int err;
8299
8300 /* check if the wpdma must be reinitialized */
8301- if (mt7921_dma_need_reinit(dev)) {
8302+ if (mt792x_dma_need_reinit(dev)) {
8303 /* disable interrutpts */
8304- mt76_wr(dev, MT_WFDMA0_HOST_INT_ENA, 0);
8305+ mt76_wr(dev, dev->irq_map->host_irq_enable, 0);
8306 mt76_wr(dev, MT_PCIE_MAC_INT_ENABLE, 0x0);
8307
8308- err = mt7921_wpdma_reset(dev, false);
8309+ err = mt792x_wpdma_reset(dev, false);
8310 if (err) {
8311 dev_err(dev->mt76.dev, "wpdma reset failed\n");
8312 return err;
8313@@ -220,73 +220,44 @@ int mt7921_wpdma_reinit_cond(struct mt7921_dev *dev)
8314
8315 return 0;
8316 }
8317+EXPORT_SYMBOL_GPL(mt792x_wpdma_reinit_cond);
8318
8319-int mt7921_dma_init(struct mt7921_dev *dev)
8320+int mt792x_dma_disable(struct mt792x_dev *dev, bool force)
8321 {
8322- int ret;
8323-
8324- mt76_dma_attach(&dev->mt76);
8325-
8326- ret = mt7921_dma_disable(dev, true);
8327- if (ret)
8328- return ret;
8329-
8330- /* init tx queue */
8331- ret = mt76_connac_init_tx_queues(dev->phy.mt76, MT7921_TXQ_BAND0,
8332- MT7921_TX_RING_SIZE,
8333- MT_TX_RING_BASE, 0);
8334- if (ret)
8335- return ret;
8336-
8337- mt76_wr(dev, MT_WFDMA0_TX_RING0_EXT_CTRL, 0x4);
8338-
8339- /* command to WM */
8340- ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_WM, MT7921_TXQ_MCU_WM,
8341- MT7921_TX_MCU_RING_SIZE, MT_TX_RING_BASE);
8342- if (ret)
8343- return ret;
8344-
8345- /* firmware download */
8346- ret = mt76_init_mcu_queue(&dev->mt76, MT_MCUQ_FWDL, MT7921_TXQ_FWDL,
8347- MT7921_TX_FWDL_RING_SIZE, MT_TX_RING_BASE);
8348- if (ret)
8349- return ret;
8350-
8351- /* event from WM before firmware download */
8352- ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU],
8353- MT7921_RXQ_MCU_WM,
8354- MT7921_RX_MCU_RING_SIZE,
8355- MT_RX_BUF_SIZE, MT_RX_EVENT_RING_BASE);
8356- if (ret)
8357- return ret;
8358-
8359- /* Change mcu queue after firmware download */
8360- ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MCU_WA],
8361- MT7921_RXQ_MCU_WM,
8362- MT7921_RX_MCU_RING_SIZE,
8363- MT_RX_BUF_SIZE, MT_WFDMA0(0x540));
8364- if (ret)
8365- return ret;
8366-
8367- /* rx data */
8368- ret = mt76_queue_alloc(dev, &dev->mt76.q_rx[MT_RXQ_MAIN],
8369- MT7921_RXQ_BAND0, MT7921_RX_RING_SIZE,
8370- MT_RX_BUF_SIZE, MT_RX_DATA_RING_BASE);
8371- if (ret)
8372- return ret;
8373-
8374- ret = mt76_init_queues(dev, mt7921_poll_rx);
8375- if (ret < 0)
8376- return ret;
8377-
8378- netif_napi_add_tx(&dev->mt76.tx_napi_dev, &dev->mt76.tx_napi,
8379- mt7921_poll_tx);
8380- napi_enable(&dev->mt76.tx_napi);
8381-
8382- return mt7921_dma_enable(dev);
8383+ /* disable WFDMA0 */
8384+ mt76_clear(dev, MT_WFDMA0_GLO_CFG,
8385+ MT_WFDMA0_GLO_CFG_TX_DMA_EN | MT_WFDMA0_GLO_CFG_RX_DMA_EN |
8386+ MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN |
8387+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
8388+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO |
8389+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2);
8390+
8391+ if (!mt76_poll_msec_tick(dev, MT_WFDMA0_GLO_CFG,
8392+ MT_WFDMA0_GLO_CFG_TX_DMA_BUSY |
8393+ MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 100, 1))
8394+ return -ETIMEDOUT;
8395+
8396+ /* disable dmashdl */
8397+ mt76_clear(dev, MT_WFDMA0_GLO_CFG_EXT0,
8398+ MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
8399+ mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
8400+
8401+ if (force) {
8402+ /* reset */
8403+ mt76_clear(dev, MT_WFDMA0_RST,
8404+ MT_WFDMA0_RST_DMASHDL_ALL_RST |
8405+ MT_WFDMA0_RST_LOGIC_RST);
8406+
8407+ mt76_set(dev, MT_WFDMA0_RST,
8408+ MT_WFDMA0_RST_DMASHDL_ALL_RST |
8409+ MT_WFDMA0_RST_LOGIC_RST);
8410+ }
8411+
8412+ return 0;
8413 }
8414+EXPORT_SYMBOL_GPL(mt792x_dma_disable);
8415
8416-void mt7921_dma_cleanup(struct mt7921_dev *dev)
8417+void mt792x_dma_cleanup(struct mt792x_dev *dev)
8418 {
8419 /* disable */
8420 mt76_clear(dev, MT_WFDMA0_GLO_CFG,
8421@@ -312,3 +283,62 @@ void mt7921_dma_cleanup(struct mt7921_dev *dev)
8422
8423 mt76_dma_cleanup(&dev->mt76);
8424 }
8425+EXPORT_SYMBOL_GPL(mt792x_dma_cleanup);
8426+
8427+int mt792x_poll_tx(struct napi_struct *napi, int budget)
8428+{
8429+ struct mt792x_dev *dev;
8430+
8431+ dev = container_of(napi, struct mt792x_dev, mt76.tx_napi);
8432+
8433+ if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
8434+ napi_complete(napi);
8435+ queue_work(dev->mt76.wq, &dev->pm.wake_work);
8436+ return 0;
8437+ }
8438+
8439+ mt76_connac_tx_cleanup(&dev->mt76);
8440+ if (napi_complete(napi))
8441+ mt76_connac_irq_enable(&dev->mt76,
8442+ dev->irq_map->tx.all_complete_mask);
8443+ mt76_connac_pm_unref(&dev->mphy, &dev->pm);
8444+
8445+ return 0;
8446+}
8447+EXPORT_SYMBOL_GPL(mt792x_poll_tx);
8448+
8449+int mt792x_poll_rx(struct napi_struct *napi, int budget)
8450+{
8451+ struct mt792x_dev *dev;
8452+ int done;
8453+
8454+ dev = container_of(napi->dev, struct mt792x_dev, mt76.napi_dev);
8455+
8456+ if (!mt76_connac_pm_ref(&dev->mphy, &dev->pm)) {
8457+ napi_complete(napi);
8458+ queue_work(dev->mt76.wq, &dev->pm.wake_work);
8459+ return 0;
8460+ }
8461+ done = mt76_dma_rx_poll(napi, budget);
8462+ mt76_connac_pm_unref(&dev->mphy, &dev->pm);
8463+
8464+ return done;
8465+}
8466+EXPORT_SYMBOL_GPL(mt792x_poll_rx);
8467+
8468+int mt792x_wfsys_reset(struct mt792x_dev *dev)
8469+{
8470+ u32 addr = is_mt7921(&dev->mt76) ? 0x18000140 : 0x7c000140;
8471+
8472+ mt76_clear(dev, addr, WFSYS_SW_RST_B);
8473+ msleep(50);
8474+ mt76_set(dev, addr, WFSYS_SW_RST_B);
8475+
8476+ if (!__mt76_poll_msec(&dev->mt76, addr, WFSYS_SW_INIT_DONE,
8477+ WFSYS_SW_INIT_DONE, 500))
8478+ return -ETIMEDOUT;
8479+
8480+ return 0;
8481+}
8482+EXPORT_SYMBOL_GPL(mt792x_wfsys_reset);
8483+
8484diff --git a/mt792x_mac.c b/mt792x_mac.c
8485new file mode 100644
8486index 00000000..5d1f8229
8487--- /dev/null
8488+++ b/mt792x_mac.c
8489@@ -0,0 +1,385 @@
8490+// SPDX-License-Identifier: ISC
8491+/* Copyright (C) 2023 MediaTek Inc. */
8492+
8493+#include <linux/module.h>
8494+
8495+#include "mt792x.h"
8496+#include "mt792x_regs.h"
8497+
8498+void mt792x_mac_work(struct work_struct *work)
8499+{
8500+ struct mt792x_phy *phy;
8501+ struct mt76_phy *mphy;
8502+
8503+ mphy = (struct mt76_phy *)container_of(work, struct mt76_phy,
8504+ mac_work.work);
8505+ phy = mphy->priv;
8506+
8507+ mt792x_mutex_acquire(phy->dev);
8508+
8509+ mt76_update_survey(mphy);
8510+ if (++mphy->mac_work_count == 2) {
8511+ mphy->mac_work_count = 0;
8512+
8513+ mt792x_mac_update_mib_stats(phy);
8514+ }
8515+
8516+ mt792x_mutex_release(phy->dev);
8517+
8518+ mt76_tx_status_check(mphy->dev, false);
8519+ ieee80211_queue_delayed_work(phy->mt76->hw, &mphy->mac_work,
8520+ MT792x_WATCHDOG_TIME);
8521+}
8522+EXPORT_SYMBOL_GPL(mt792x_mac_work);
8523+
8524+void mt792x_mac_set_timeing(struct mt792x_phy *phy)
8525+{
8526+ s16 coverage_class = phy->coverage_class;
8527+ struct mt792x_dev *dev = phy->dev;
8528+ u32 val, reg_offset;
8529+ u32 cck = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 231) |
8530+ FIELD_PREP(MT_TIMEOUT_VAL_CCA, 48);
8531+ u32 ofdm = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, 60) |
8532+ FIELD_PREP(MT_TIMEOUT_VAL_CCA, 28);
8533+ bool is_2ghz = phy->mt76->chandef.chan->band == NL80211_BAND_2GHZ;
8534+ int sifs = is_2ghz ? 10 : 16, offset;
8535+
8536+ if (!test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
8537+ return;
8538+
8539+ mt76_set(dev, MT_ARB_SCR(0),
8540+ MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
8541+ udelay(1);
8542+
8543+ offset = 3 * coverage_class;
8544+ reg_offset = FIELD_PREP(MT_TIMEOUT_VAL_PLCP, offset) |
8545+ FIELD_PREP(MT_TIMEOUT_VAL_CCA, offset);
8546+
8547+ mt76_wr(dev, MT_TMAC_CDTR(0), cck + reg_offset);
8548+ mt76_wr(dev, MT_TMAC_ODTR(0), ofdm + reg_offset);
8549+ mt76_wr(dev, MT_TMAC_ICR0(0),
8550+ FIELD_PREP(MT_IFS_EIFS, 360) |
8551+ FIELD_PREP(MT_IFS_RIFS, 2) |
8552+ FIELD_PREP(MT_IFS_SIFS, sifs) |
8553+ FIELD_PREP(MT_IFS_SLOT, phy->slottime));
8554+
8555+ if (phy->slottime < 20 || !is_2ghz)
8556+ val = MT792x_CFEND_RATE_DEFAULT;
8557+ else
8558+ val = MT792x_CFEND_RATE_11B;
8559+
8560+ mt76_rmw_field(dev, MT_AGG_ACR0(0), MT_AGG_ACR_CFEND_RATE, val);
8561+ mt76_clear(dev, MT_ARB_SCR(0),
8562+ MT_ARB_SCR_TX_DISABLE | MT_ARB_SCR_RX_DISABLE);
8563+}
8564+EXPORT_SYMBOL_GPL(mt792x_mac_set_timeing);
8565+
8566+void mt792x_mac_update_mib_stats(struct mt792x_phy *phy)
8567+{
8568+ struct mt76_mib_stats *mib = &phy->mib;
8569+ struct mt792x_dev *dev = phy->dev;
8570+ int i, aggr0 = 0, aggr1;
8571+ u32 val;
8572+
8573+ mib->fcs_err_cnt += mt76_get_field(dev, MT_MIB_SDR3(0),
8574+ MT_MIB_SDR3_FCS_ERR_MASK);
8575+ mib->ack_fail_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR3(0),
8576+ MT_MIB_ACK_FAIL_COUNT_MASK);
8577+ mib->ba_miss_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR2(0),
8578+ MT_MIB_BA_FAIL_COUNT_MASK);
8579+ mib->rts_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR0(0),
8580+ MT_MIB_RTS_COUNT_MASK);
8581+ mib->rts_retries_cnt += mt76_get_field(dev, MT_MIB_MB_BSDR1(0),
8582+ MT_MIB_RTS_FAIL_COUNT_MASK);
8583+
8584+ mib->tx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR12(0));
8585+ mib->tx_mpdu_attempts_cnt += mt76_rr(dev, MT_MIB_SDR14(0));
8586+ mib->tx_mpdu_success_cnt += mt76_rr(dev, MT_MIB_SDR15(0));
8587+
8588+ val = mt76_rr(dev, MT_MIB_SDR32(0));
8589+ mib->tx_pkt_ebf_cnt += FIELD_GET(MT_MIB_SDR9_EBF_CNT_MASK, val);
8590+ mib->tx_pkt_ibf_cnt += FIELD_GET(MT_MIB_SDR9_IBF_CNT_MASK, val);
8591+
8592+ val = mt76_rr(dev, MT_ETBF_TX_APP_CNT(0));
8593+ mib->tx_bf_ibf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_IBF_CNT, val);
8594+ mib->tx_bf_ebf_ppdu_cnt += FIELD_GET(MT_ETBF_TX_EBF_CNT, val);
8595+
8596+ val = mt76_rr(dev, MT_ETBF_RX_FB_CNT(0));
8597+ mib->tx_bf_rx_fb_all_cnt += FIELD_GET(MT_ETBF_RX_FB_ALL, val);
8598+ mib->tx_bf_rx_fb_he_cnt += FIELD_GET(MT_ETBF_RX_FB_HE, val);
8599+ mib->tx_bf_rx_fb_vht_cnt += FIELD_GET(MT_ETBF_RX_FB_VHT, val);
8600+ mib->tx_bf_rx_fb_ht_cnt += FIELD_GET(MT_ETBF_RX_FB_HT, val);
8601+
8602+ mib->rx_mpdu_cnt += mt76_rr(dev, MT_MIB_SDR5(0));
8603+ mib->rx_ampdu_cnt += mt76_rr(dev, MT_MIB_SDR22(0));
8604+ mib->rx_ampdu_bytes_cnt += mt76_rr(dev, MT_MIB_SDR23(0));
8605+ mib->rx_ba_cnt += mt76_rr(dev, MT_MIB_SDR31(0));
8606+
8607+ for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) {
8608+ val = mt76_rr(dev, MT_PLE_AMSDU_PACK_MSDU_CNT(i));
8609+ mib->tx_amsdu[i] += val;
8610+ mib->tx_amsdu_cnt += val;
8611+ }
8612+
8613+ for (i = 0, aggr1 = aggr0 + 8; i < 4; i++) {
8614+ u32 val2;
8615+
8616+ val = mt76_rr(dev, MT_TX_AGG_CNT(0, i));
8617+ val2 = mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
8618+
8619+ phy->mt76->aggr_stats[aggr0++] += val & 0xffff;
8620+ phy->mt76->aggr_stats[aggr0++] += val >> 16;
8621+ phy->mt76->aggr_stats[aggr1++] += val2 & 0xffff;
8622+ phy->mt76->aggr_stats[aggr1++] += val2 >> 16;
8623+ }
8624+}
8625+EXPORT_SYMBOL_GPL(mt792x_mac_update_mib_stats);
8626+
8627+struct mt76_wcid *mt792x_rx_get_wcid(struct mt792x_dev *dev, u16 idx,
8628+ bool unicast)
8629+{
8630+ struct mt792x_sta *sta;
8631+ struct mt76_wcid *wcid;
8632+
8633+ if (idx >= ARRAY_SIZE(dev->mt76.wcid))
8634+ return NULL;
8635+
8636+ wcid = rcu_dereference(dev->mt76.wcid[idx]);
8637+ if (unicast || !wcid)
8638+ return wcid;
8639+
8640+ if (!wcid->sta)
8641+ return NULL;
8642+
8643+ sta = container_of(wcid, struct mt792x_sta, wcid);
8644+ if (!sta->vif)
8645+ return NULL;
8646+
8647+ return &sta->vif->sta.wcid;
8648+}
8649+EXPORT_SYMBOL_GPL(mt792x_rx_get_wcid);
8650+
8651+static void
8652+mt792x_mac_rssi_iter(void *priv, u8 *mac, struct ieee80211_vif *vif)
8653+{
8654+ struct sk_buff *skb = priv;
8655+ struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb;
8656+ struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv;
8657+ struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
8658+
8659+ if (status->signal > 0)
8660+ return;
8661+
8662+ if (!ether_addr_equal(vif->addr, hdr->addr1))
8663+ return;
8664+
8665+ ewma_rssi_add(&mvif->rssi, -status->signal);
8666+}
8667+
8668+void mt792x_mac_assoc_rssi(struct mt792x_dev *dev, struct sk_buff *skb)
8669+{
8670+ struct ieee80211_hdr *hdr = mt76_skb_get_hdr(skb);
8671+
8672+ if (!ieee80211_is_assoc_resp(hdr->frame_control) &&
8673+ !ieee80211_is_auth(hdr->frame_control))
8674+ return;
8675+
8676+ ieee80211_iterate_active_interfaces_atomic(mt76_hw(dev),
8677+ IEEE80211_IFACE_ITER_RESUME_ALL,
8678+ mt792x_mac_rssi_iter, skb);
8679+}
8680+EXPORT_SYMBOL_GPL(mt792x_mac_assoc_rssi);
8681+
8682+void mt792x_mac_reset_counters(struct mt792x_phy *phy)
8683+{
8684+ struct mt792x_dev *dev = phy->dev;
8685+ int i;
8686+
8687+ for (i = 0; i < 4; i++) {
8688+ mt76_rr(dev, MT_TX_AGG_CNT(0, i));
8689+ mt76_rr(dev, MT_TX_AGG_CNT2(0, i));
8690+ }
8691+
8692+ dev->mt76.phy.survey_time = ktime_get_boottime();
8693+ memset(phy->mt76->aggr_stats, 0, sizeof(phy->mt76->aggr_stats));
8694+
8695+ /* reset airtime counters */
8696+ mt76_rr(dev, MT_MIB_SDR9(0));
8697+ mt76_rr(dev, MT_MIB_SDR36(0));
8698+ mt76_rr(dev, MT_MIB_SDR37(0));
8699+
8700+ mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
8701+ mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
8702+}
8703+EXPORT_SYMBOL_GPL(mt792x_mac_reset_counters);
8704+
8705+static u8
8706+mt792x_phy_get_nf(struct mt792x_phy *phy, int idx)
8707+{
8708+ return 0;
8709+}
8710+
8711+static void
8712+mt792x_phy_update_channel(struct mt76_phy *mphy, int idx)
8713+{
8714+ struct mt792x_dev *dev = container_of(mphy->dev, struct mt792x_dev, mt76);
8715+ struct mt792x_phy *phy = (struct mt792x_phy *)mphy->priv;
8716+ struct mt76_channel_state *state;
8717+ u64 busy_time, tx_time, rx_time, obss_time;
8718+ int nf;
8719+
8720+ busy_time = mt76_get_field(dev, MT_MIB_SDR9(idx),
8721+ MT_MIB_SDR9_BUSY_MASK);
8722+ tx_time = mt76_get_field(dev, MT_MIB_SDR36(idx),
8723+ MT_MIB_SDR36_TXTIME_MASK);
8724+ rx_time = mt76_get_field(dev, MT_MIB_SDR37(idx),
8725+ MT_MIB_SDR37_RXTIME_MASK);
8726+ obss_time = mt76_get_field(dev, MT_WF_RMAC_MIB_AIRTIME14(idx),
8727+ MT_MIB_OBSSTIME_MASK);
8728+
8729+ nf = mt792x_phy_get_nf(phy, idx);
8730+ if (!phy->noise)
8731+ phy->noise = nf << 4;
8732+ else if (nf)
8733+ phy->noise += nf - (phy->noise >> 4);
8734+
8735+ state = mphy->chan_state;
8736+ state->cc_busy += busy_time;
8737+ state->cc_tx += tx_time;
8738+ state->cc_rx += rx_time + obss_time;
8739+ state->cc_bss_rx += rx_time;
8740+ state->noise = -(phy->noise >> 4);
8741+}
8742+
8743+void mt792x_update_channel(struct mt76_phy *mphy)
8744+{
8745+ struct mt792x_dev *dev = container_of(mphy->dev, struct mt792x_dev, mt76);
8746+
8747+ if (mt76_connac_pm_wake(mphy, &dev->pm))
8748+ return;
8749+
8750+ mt792x_phy_update_channel(mphy, 0);
8751+ /* reset obss airtime */
8752+ mt76_set(dev, MT_WF_RMAC_MIB_TIME0(0), MT_WF_RMAC_MIB_RXTIME_CLR);
8753+ mt76_connac_power_save_sched(mphy, &dev->pm);
8754+}
8755+EXPORT_SYMBOL_GPL(mt792x_update_channel);
8756+
8757+void mt792x_reset(struct mt76_dev *mdev)
8758+{
8759+ struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76);
8760+ struct mt76_connac_pm *pm = &dev->pm;
8761+
8762+ if (!dev->hw_init_done)
8763+ return;
8764+
8765+ if (dev->hw_full_reset)
8766+ return;
8767+
8768+ if (pm->suspended)
8769+ return;
8770+
8771+ queue_work(dev->mt76.wq, &dev->reset_work);
8772+}
8773+EXPORT_SYMBOL_GPL(mt792x_reset);
8774+
8775+void mt792x_mac_init_band(struct mt792x_dev *dev, u8 band)
8776+{
8777+ u32 mask, set;
8778+
8779+ mt76_rmw_field(dev, MT_TMAC_CTCR0(band),
8780+ MT_TMAC_CTCR0_INS_DDLMT_REFTIME, 0x3f);
8781+ mt76_set(dev, MT_TMAC_CTCR0(band),
8782+ MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN |
8783+ MT_TMAC_CTCR0_INS_DDLMT_EN);
8784+
8785+ mt76_set(dev, MT_WF_RMAC_MIB_TIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
8786+ mt76_set(dev, MT_WF_RMAC_MIB_AIRTIME0(band), MT_WF_RMAC_MIB_RXTIME_EN);
8787+
8788+ /* enable MIB tx-rx time reporting */
8789+ mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_TXDUR_EN);
8790+ mt76_set(dev, MT_MIB_SCR1(band), MT_MIB_RXDUR_EN);
8791+
8792+ mt76_rmw_field(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_MAX_RX_LEN, 1536);
8793+ /* disable rx rate report by default due to hw issues */
8794+ mt76_clear(dev, MT_DMA_DCR0(band), MT_DMA_DCR0_RXD_G5_EN);
8795+
8796+ /* filter out non-resp frames and get instantaneous signal reporting */
8797+ mask = MT_WTBLOFF_TOP_RSCR_RCPI_MODE | MT_WTBLOFF_TOP_RSCR_RCPI_PARAM;
8798+ set = FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_MODE, 0) |
8799+ FIELD_PREP(MT_WTBLOFF_TOP_RSCR_RCPI_PARAM, 0x3);
8800+ mt76_rmw(dev, MT_WTBLOFF_TOP_RSCR(band), mask, set);
8801+}
8802+EXPORT_SYMBOL_GPL(mt792x_mac_init_band);
8803+
8804+void mt792x_pm_wake_work(struct work_struct *work)
8805+{
8806+ struct mt792x_dev *dev;
8807+ struct mt76_phy *mphy;
8808+
8809+ dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,
8810+ pm.wake_work);
8811+ mphy = dev->phy.mt76;
8812+
8813+ if (!mt792x_mcu_drv_pmctrl(dev)) {
8814+ struct mt76_dev *mdev = &dev->mt76;
8815+ int i;
8816+
8817+ if (mt76_is_sdio(mdev)) {
8818+ mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
8819+ mt76_worker_schedule(&mdev->sdio.txrx_worker);
8820+ } else {
8821+ local_bh_disable();
8822+ mt76_for_each_q_rx(mdev, i)
8823+ napi_schedule(&mdev->napi[i]);
8824+ local_bh_enable();
8825+ mt76_connac_pm_dequeue_skbs(mphy, &dev->pm);
8826+ mt76_connac_tx_cleanup(mdev);
8827+ }
8828+ if (test_bit(MT76_STATE_RUNNING, &mphy->state))
8829+ ieee80211_queue_delayed_work(mphy->hw, &mphy->mac_work,
8830+ MT792x_WATCHDOG_TIME);
8831+ }
8832+
8833+ ieee80211_wake_queues(mphy->hw);
8834+ wake_up(&dev->pm.wait);
8835+}
8836+EXPORT_SYMBOL_GPL(mt792x_pm_wake_work);
8837+
8838+void mt792x_pm_power_save_work(struct work_struct *work)
8839+{
8840+ struct mt792x_dev *dev;
8841+ unsigned long delta;
8842+ struct mt76_phy *mphy;
8843+
8844+ dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev,
8845+ pm.ps_work.work);
8846+ mphy = dev->phy.mt76;
8847+
8848+ delta = dev->pm.idle_timeout;
8849+ if (test_bit(MT76_HW_SCANNING, &mphy->state) ||
8850+ test_bit(MT76_HW_SCHED_SCANNING, &mphy->state) ||
8851+ dev->fw_assert)
8852+ goto out;
8853+
8854+ if (mutex_is_locked(&dev->mt76.mutex))
8855+ /* if mt76 mutex is held we should not put the device
8856+ * to sleep since we are currently accessing device
8857+ * register map. We need to wait for the next power_save
8858+ * trigger.
8859+ */
8860+ goto out;
8861+
8862+ if (time_is_after_jiffies(dev->pm.last_activity + delta)) {
8863+ delta = dev->pm.last_activity + delta - jiffies;
8864+ goto out;
8865+ }
8866+
8867+ if (!mt792x_mcu_fw_pmctrl(dev)) {
8868+ cancel_delayed_work_sync(&mphy->mac_work);
8869+ return;
8870+ }
8871+out:
8872+ queue_delayed_work(dev->mt76.wq, &dev->pm.ps_work, delta);
8873+}
8874+EXPORT_SYMBOL_GPL(mt792x_pm_power_save_work);
8875diff --git a/mt792x_regs.h b/mt792x_regs.h
8876new file mode 100644
8877index 00000000..a99af23e
8878--- /dev/null
8879+++ b/mt792x_regs.h
8880@@ -0,0 +1,479 @@
8881+/* SPDX-License-Identifier: ISC */
8882+/* Copyright (C) 2023 MediaTek Inc. */
8883+
8884+#ifndef __MT792X_REGS_H
8885+#define __MT792X_REGS_H
8886+
8887+/* MCU WFDMA1 */
8888+#define MT_MCU_WFDMA1_BASE 0x3000
8889+#define MT_MCU_WFDMA1(ofs) (MT_MCU_WFDMA1_BASE + (ofs))
8890+
8891+#define MT_MCU_INT_EVENT MT_MCU_WFDMA1(0x108)
8892+#define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
8893+#define MT_MCU_INT_EVENT_DMA_INIT BIT(1)
8894+#define MT_MCU_INT_EVENT_SER_TRIGGER BIT(2)
8895+#define MT_MCU_INT_EVENT_RESET_DONE BIT(3)
8896+
8897+#define MT_PLE_BASE 0x820c0000
8898+#define MT_PLE(ofs) (MT_PLE_BASE + (ofs))
8899+
8900+#define MT_PLE_FL_Q0_CTRL MT_PLE(0x3e0)
8901+#define MT_PLE_FL_Q1_CTRL MT_PLE(0x3e4)
8902+#define MT_PLE_FL_Q2_CTRL MT_PLE(0x3e8)
8903+#define MT_PLE_FL_Q3_CTRL MT_PLE(0x3ec)
8904+
8905+#define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n))
8906+#define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2))
8907+
8908+/* TMAC: band 0(0x21000), band 1(0xa1000) */
8909+#define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000)
8910+#define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs))
8911+
8912+#define MT_TMAC_TCR0(_band) MT_WF_TMAC(_band, 0)
8913+#define MT_TMAC_TCR0_TBTT_STOP_CTRL BIT(25)
8914+
8915+#define MT_TMAC_CDTR(_band) MT_WF_TMAC(_band, 0x090)
8916+#define MT_TMAC_ODTR(_band) MT_WF_TMAC(_band, 0x094)
8917+#define MT_TIMEOUT_VAL_PLCP GENMASK(15, 0)
8918+#define MT_TIMEOUT_VAL_CCA GENMASK(31, 16)
8919+
8920+#define MT_TMAC_ICR0(_band) MT_WF_TMAC(_band, 0x0a4)
8921+#define MT_IFS_EIFS GENMASK(8, 0)
8922+#define MT_IFS_RIFS GENMASK(14, 10)
8923+#define MT_IFS_SIFS GENMASK(22, 16)
8924+#define MT_IFS_SLOT GENMASK(30, 24)
8925+
8926+#define MT_TMAC_CTCR0(_band) MT_WF_TMAC(_band, 0x0f4)
8927+#define MT_TMAC_CTCR0_INS_DDLMT_REFTIME GENMASK(5, 0)
8928+#define MT_TMAC_CTCR0_INS_DDLMT_EN BIT(17)
8929+#define MT_TMAC_CTCR0_INS_DDLMT_VHT_SMPDU_EN BIT(18)
8930+
8931+#define MT_TMAC_TRCR0(_band) MT_WF_TMAC(_band, 0x09c)
8932+#define MT_TMAC_TFCR0(_band) MT_WF_TMAC(_band, 0x1e0)
8933+
8934+#define MT_WF_DMA_BASE(_band) ((_band) ? 0x820f7000 : 0x820e7000)
8935+#define MT_WF_DMA(_band, ofs) (MT_WF_DMA_BASE(_band) + (ofs))
8936+
8937+#define MT_DMA_DCR0(_band) MT_WF_DMA(_band, 0x000)
8938+#define MT_DMA_DCR0_MAX_RX_LEN GENMASK(15, 3)
8939+#define MT_DMA_DCR0_RXD_G5_EN BIT(23)
8940+
8941+/* WTBLOFF TOP: band 0(0x820e9000),band 1(0x820f9000) */
8942+#define MT_WTBLOFF_TOP_BASE(_band) ((_band) ? 0x820f9000 : 0x820e9000)
8943+#define MT_WTBLOFF_TOP(_band, ofs) (MT_WTBLOFF_TOP_BASE(_band) + (ofs))
8944+
8945+#define MT_WTBLOFF_TOP_RSCR(_band) MT_WTBLOFF_TOP(_band, 0x008)
8946+#define MT_WTBLOFF_TOP_RSCR_RCPI_MODE GENMASK(31, 30)
8947+#define MT_WTBLOFF_TOP_RSCR_RCPI_PARAM GENMASK(25, 24)
8948+
8949+/* LPON: band 0(0x24200), band 1(0xa4200) */
8950+#define MT_WF_LPON_BASE(_band) ((_band) ? 0x820fb000 : 0x820eb000)
8951+#define MT_WF_LPON(_band, ofs) (MT_WF_LPON_BASE(_band) + (ofs))
8952+
8953+#define MT_LPON_UTTR0(_band) MT_WF_LPON(_band, 0x080)
8954+#define MT_LPON_UTTR1(_band) MT_WF_LPON(_band, 0x084)
8955+
8956+#define MT_LPON_TCR(_band, n) MT_WF_LPON(_band, 0x0a8 + (n) * 4)
8957+#define MT_LPON_TCR_SW_MODE GENMASK(1, 0)
8958+#define MT_LPON_TCR_SW_WRITE BIT(0)
8959+
8960+/* ETBF: band 0(0x24000), band 1(0xa4000) */
8961+#define MT_WF_ETBF_BASE(_band) ((_band) ? 0x820fa000 : 0x820ea000)
8962+#define MT_WF_ETBF(_band, ofs) (MT_WF_ETBF_BASE(_band) + (ofs))
8963+
8964+#define MT_ETBF_TX_APP_CNT(_band) MT_WF_ETBF(_band, 0x150)
8965+#define MT_ETBF_TX_IBF_CNT GENMASK(31, 16)
8966+#define MT_ETBF_TX_EBF_CNT GENMASK(15, 0)
8967+
8968+#define MT_ETBF_RX_FB_CNT(_band) MT_WF_ETBF(_band, 0x158)
8969+#define MT_ETBF_RX_FB_ALL GENMASK(31, 24)
8970+#define MT_ETBF_RX_FB_HE GENMASK(23, 16)
8971+#define MT_ETBF_RX_FB_VHT GENMASK(15, 8)
8972+#define MT_ETBF_RX_FB_HT GENMASK(7, 0)
8973+
8974+/* MIB: band 0(0x24800), band 1(0xa4800) */
8975+#define MT_WF_MIB_BASE(_band) ((_band) ? 0x820fd000 : 0x820ed000)
8976+#define MT_WF_MIB(_band, ofs) (MT_WF_MIB_BASE(_band) + (ofs))
8977+
8978+#define MT_MIB_SCR1(_band) MT_WF_MIB(_band, 0x004)
8979+#define MT_MIB_TXDUR_EN BIT(8)
8980+#define MT_MIB_RXDUR_EN BIT(9)
8981+
8982+#define MT_MIB_SDR3(_band) MT_WF_MIB(_band, 0x698)
8983+#define MT_MIB_SDR3_FCS_ERR_MASK GENMASK(31, 16)
8984+
8985+#define MT_MIB_SDR5(_band) MT_WF_MIB(_band, 0x780)
8986+
8987+#define MT_MIB_SDR9(_band) MT_WF_MIB(_band, 0x02c)
8988+#define MT_MIB_SDR9_BUSY_MASK GENMASK(23, 0)
8989+
8990+#define MT_MIB_SDR12(_band) MT_WF_MIB(_band, 0x558)
8991+#define MT_MIB_SDR14(_band) MT_WF_MIB(_band, 0x564)
8992+#define MT_MIB_SDR15(_band) MT_WF_MIB(_band, 0x568)
8993+
8994+#define MT_MIB_SDR16(_band) MT_WF_MIB(_band, 0x048)
8995+#define MT_MIB_SDR16_BUSY_MASK GENMASK(23, 0)
8996+
8997+#define MT_MIB_SDR22(_band) MT_WF_MIB(_band, 0x770)
8998+#define MT_MIB_SDR23(_band) MT_WF_MIB(_band, 0x774)
8999+#define MT_MIB_SDR31(_band) MT_WF_MIB(_band, 0x55c)
9000+
9001+#define MT_MIB_SDR32(_band) MT_WF_MIB(_band, 0x7a8)
9002+#define MT_MIB_SDR9_IBF_CNT_MASK GENMASK(31, 16)
9003+#define MT_MIB_SDR9_EBF_CNT_MASK GENMASK(15, 0)
9004+
9005+#define MT_MIB_SDR34(_band) MT_WF_MIB(_band, 0x090)
9006+#define MT_MIB_MU_BF_TX_CNT GENMASK(15, 0)
9007+
9008+#define MT_MIB_SDR36(_band) MT_WF_MIB(_band, 0x054)
9009+#define MT_MIB_SDR36_TXTIME_MASK GENMASK(23, 0)
9010+#define MT_MIB_SDR37(_band) MT_WF_MIB(_band, 0x058)
9011+#define MT_MIB_SDR37_RXTIME_MASK GENMASK(23, 0)
9012+
9013+#define MT_MIB_DR8(_band) MT_WF_MIB(_band, 0x0c0)
9014+#define MT_MIB_DR9(_band) MT_WF_MIB(_band, 0x0c4)
9015+#define MT_MIB_DR11(_band) MT_WF_MIB(_band, 0x0cc)
9016+
9017+#define MT_MIB_MB_SDR0(_band, n) MT_WF_MIB(_band, 0x100 + ((n) << 4))
9018+#define MT_MIB_RTS_RETRIES_COUNT_MASK GENMASK(31, 16)
9019+
9020+#define MT_MIB_MB_BSDR0(_band) MT_WF_MIB(_band, 0x688)
9021+#define MT_MIB_RTS_COUNT_MASK GENMASK(15, 0)
9022+#define MT_MIB_MB_BSDR1(_band) MT_WF_MIB(_band, 0x690)
9023+#define MT_MIB_RTS_FAIL_COUNT_MASK GENMASK(15, 0)
9024+#define MT_MIB_MB_BSDR2(_band) MT_WF_MIB(_band, 0x518)
9025+#define MT_MIB_BA_FAIL_COUNT_MASK GENMASK(15, 0)
9026+#define MT_MIB_MB_BSDR3(_band) MT_WF_MIB(_band, 0x520)
9027+#define MT_MIB_ACK_FAIL_COUNT_MASK GENMASK(15, 0)
9028+
9029+#define MT_MIB_MB_SDR2(_band, n) MT_WF_MIB(_band, 0x108 + ((n) << 4))
9030+#define MT_MIB_FRAME_RETRIES_COUNT_MASK GENMASK(15, 0)
9031+
9032+#define MT_TX_AGG_CNT(_band, n) MT_WF_MIB(_band, 0x7dc + ((n) << 2))
9033+#define MT_TX_AGG_CNT2(_band, n) MT_WF_MIB(_band, 0x7ec + ((n) << 2))
9034+#define MT_MIB_ARNG(_band, n) MT_WF_MIB(_band, 0x0b0 + ((n) << 2))
9035+#define MT_MIB_ARNCR_RANGE(val, n) (((val) >> ((n) << 3)) & GENMASK(7, 0))
9036+
9037+#define MT_WTBLON_TOP_BASE 0x820d4000
9038+#define MT_WTBLON_TOP(ofs) (MT_WTBLON_TOP_BASE + (ofs))
9039+
9040+#define MT_WTBL_UPDATE_BUSY BIT(31)
9041+
9042+#define MT_WTBL_ITCR MT_WTBLON_TOP(0x3b0)
9043+#define MT_WTBL_ITCR_WR BIT(16)
9044+#define MT_WTBL_ITCR_EXEC BIT(31)
9045+#define MT_WTBL_ITDR0 MT_WTBLON_TOP(0x3b8)
9046+#define MT_WTBL_ITDR1 MT_WTBLON_TOP(0x3bc)
9047+#define MT_WTBL_SPE_IDX_SEL BIT(6)
9048+
9049+#define MT_WTBL_BASE 0x820d8000
9050+#define MT_WTBL_LMAC_ID GENMASK(14, 8)
9051+#define MT_WTBL_LMAC_DW GENMASK(7, 2)
9052+#define MT_WTBL_LMAC_OFFS(_id, _dw) (MT_WTBL_BASE | \
9053+ FIELD_PREP(MT_WTBL_LMAC_ID, _id) | \
9054+ FIELD_PREP(MT_WTBL_LMAC_DW, _dw))
9055+
9056+/* AGG: band 0(0x20800), band 1(0xa0800) */
9057+#define MT_WF_AGG_BASE(_band) ((_band) ? 0x820f2000 : 0x820e2000)
9058+#define MT_WF_AGG(_band, ofs) (MT_WF_AGG_BASE(_band) + (ofs))
9059+
9060+#define MT_AGG_AWSCR0(_band, _n) MT_WF_AGG(_band, 0x05c + (_n) * 4)
9061+#define MT_AGG_PCR0(_band, _n) MT_WF_AGG(_band, 0x06c + (_n) * 4)
9062+#define MT_AGG_PCR0_MM_PROT BIT(0)
9063+#define MT_AGG_PCR0_GF_PROT BIT(1)
9064+#define MT_AGG_PCR0_BW20_PROT BIT(2)
9065+#define MT_AGG_PCR0_BW40_PROT BIT(4)
9066+#define MT_AGG_PCR0_BW80_PROT BIT(6)
9067+#define MT_AGG_PCR0_ERP_PROT GENMASK(12, 8)
9068+#define MT_AGG_PCR0_VHT_PROT BIT(13)
9069+#define MT_AGG_PCR0_PTA_WIN_DIS BIT(15)
9070+
9071+#define MT_AGG_PCR1_RTS0_NUM_THRES GENMASK(31, 23)
9072+#define MT_AGG_PCR1_RTS0_LEN_THRES GENMASK(19, 0)
9073+
9074+#define MT_AGG_ACR0(_band) MT_WF_AGG(_band, 0x084)
9075+#define MT_AGG_ACR_CFEND_RATE GENMASK(13, 0)
9076+#define MT_AGG_ACR_BAR_RATE GENMASK(29, 16)
9077+
9078+#define MT_AGG_MRCR(_band) MT_WF_AGG(_band, 0x098)
9079+#define MT_AGG_MRCR_BAR_CNT_LIMIT GENMASK(15, 12)
9080+#define MT_AGG_MRCR_LAST_RTS_CTS_RN BIT(6)
9081+#define MT_AGG_MRCR_RTS_FAIL_LIMIT GENMASK(11, 7)
9082+#define MT_AGG_MRCR_TXCMD_RTS_FAIL_LIMIT GENMASK(28, 24)
9083+
9084+#define MT_AGG_ATCR1(_band) MT_WF_AGG(_band, 0x0f0)
9085+#define MT_AGG_ATCR3(_band) MT_WF_AGG(_band, 0x0f4)
9086+
9087+/* ARB: band 0(0x20c00), band 1(0xa0c00) */
9088+#define MT_WF_ARB_BASE(_band) ((_band) ? 0x820f3000 : 0x820e3000)
9089+#define MT_WF_ARB(_band, ofs) (MT_WF_ARB_BASE(_band) + (ofs))
9090+
9091+#define MT_ARB_SCR(_band) MT_WF_ARB(_band, 0x080)
9092+#define MT_ARB_SCR_TX_DISABLE BIT(8)
9093+#define MT_ARB_SCR_RX_DISABLE BIT(9)
9094+
9095+#define MT_ARB_DRNGR0(_band, _n) MT_WF_ARB(_band, 0x194 + (_n) * 4)
9096+
9097+/* RMAC: band 0(0x21400), band 1(0xa1400) */
9098+#define MT_WF_RMAC_BASE(_band) ((_band) ? 0x820f5000 : 0x820e5000)
9099+#define MT_WF_RMAC(_band, ofs) (MT_WF_RMAC_BASE(_band) + (ofs))
9100+
9101+#define MT_WF_RFCR(_band) MT_WF_RMAC(_band, 0x000)
9102+#define MT_WF_RFCR_DROP_STBC_MULTI BIT(0)
9103+#define MT_WF_RFCR_DROP_FCSFAIL BIT(1)
9104+#define MT_WF_RFCR_DROP_VERSION BIT(3)
9105+#define MT_WF_RFCR_DROP_PROBEREQ BIT(4)
9106+#define MT_WF_RFCR_DROP_MCAST BIT(5)
9107+#define MT_WF_RFCR_DROP_BCAST BIT(6)
9108+#define MT_WF_RFCR_DROP_MCAST_FILTERED BIT(7)
9109+#define MT_WF_RFCR_DROP_A3_MAC BIT(8)
9110+#define MT_WF_RFCR_DROP_A3_BSSID BIT(9)
9111+#define MT_WF_RFCR_DROP_A2_BSSID BIT(10)
9112+#define MT_WF_RFCR_DROP_OTHER_BEACON BIT(11)
9113+#define MT_WF_RFCR_DROP_FRAME_REPORT BIT(12)
9114+#define MT_WF_RFCR_DROP_CTL_RSV BIT(13)
9115+#define MT_WF_RFCR_DROP_CTS BIT(14)
9116+#define MT_WF_RFCR_DROP_RTS BIT(15)
9117+#define MT_WF_RFCR_DROP_DUPLICATE BIT(16)
9118+#define MT_WF_RFCR_DROP_OTHER_BSS BIT(17)
9119+#define MT_WF_RFCR_DROP_OTHER_UC BIT(18)
9120+#define MT_WF_RFCR_DROP_OTHER_TIM BIT(19)
9121+#define MT_WF_RFCR_DROP_NDPA BIT(20)
9122+#define MT_WF_RFCR_DROP_UNWANTED_CTL BIT(21)
9123+
9124+#define MT_WF_RFCR1(_band) MT_WF_RMAC(_band, 0x004)
9125+#define MT_WF_RFCR1_DROP_ACK BIT(4)
9126+#define MT_WF_RFCR1_DROP_BF_POLL BIT(5)
9127+#define MT_WF_RFCR1_DROP_BA BIT(6)
9128+#define MT_WF_RFCR1_DROP_CFEND BIT(7)
9129+#define MT_WF_RFCR1_DROP_CFACK BIT(8)
9130+
9131+#define MT_WF_RMAC_MIB_TIME0(_band) MT_WF_RMAC(_band, 0x03c4)
9132+#define MT_WF_RMAC_MIB_RXTIME_CLR BIT(31)
9133+#define MT_WF_RMAC_MIB_RXTIME_EN BIT(30)
9134+
9135+#define MT_WF_RMAC_MIB_AIRTIME14(_band) MT_WF_RMAC(_band, 0x03b8)
9136+#define MT_MIB_OBSSTIME_MASK GENMASK(23, 0)
9137+#define MT_WF_RMAC_MIB_AIRTIME0(_band) MT_WF_RMAC(_band, 0x0380)
9138+
9139+/* WFDMA0 */
9140+#define MT_WFDMA0_BASE 0xd4000
9141+#define MT_WFDMA0(ofs) (MT_WFDMA0_BASE + (ofs))
9142+
9143+#define MT_WFDMA0_RST MT_WFDMA0(0x100)
9144+#define MT_WFDMA0_RST_LOGIC_RST BIT(4)
9145+#define MT_WFDMA0_RST_DMASHDL_ALL_RST BIT(5)
9146+
9147+#define MT_WFDMA0_BUSY_ENA MT_WFDMA0(0x13c)
9148+#define MT_WFDMA0_BUSY_ENA_TX_FIFO0 BIT(0)
9149+#define MT_WFDMA0_BUSY_ENA_TX_FIFO1 BIT(1)
9150+#define MT_WFDMA0_BUSY_ENA_RX_FIFO BIT(2)
9151+
9152+#define MT_MCU_CMD MT_WFDMA0(0x1f0)
9153+#define MT_MCU_CMD_WAKE_RX_PCIE BIT(0)
9154+#define MT_MCU_CMD_STOP_DMA_FW_RELOAD BIT(1)
9155+#define MT_MCU_CMD_STOP_DMA BIT(2)
9156+#define MT_MCU_CMD_RESET_DONE BIT(3)
9157+#define MT_MCU_CMD_RECOVERY_DONE BIT(4)
9158+#define MT_MCU_CMD_NORMAL_STATE BIT(5)
9159+#define MT_MCU_CMD_ERROR_MASK GENMASK(5, 1)
9160+
9161+#define MT_MCU2HOST_SW_INT_ENA MT_WFDMA0(0x1f4)
9162+
9163+#define MT_WFDMA0_HOST_INT_STA MT_WFDMA0(0x200)
9164+#define HOST_RX_DONE_INT_STS0 BIT(0) /* Rx mcu */
9165+#define HOST_RX_DONE_INT_STS2 BIT(2) /* Rx data */
9166+#define HOST_RX_DONE_INT_STS4 BIT(22) /* Rx mcu after fw downloaded */
9167+#define HOST_TX_DONE_INT_STS16 BIT(26)
9168+#define HOST_TX_DONE_INT_STS17 BIT(27) /* MCU tx done*/
9169+
9170+#define MT_WFDMA0_GLO_CFG MT_WFDMA0(0x208)
9171+#define MT_WFDMA0_GLO_CFG_TX_DMA_EN BIT(0)
9172+#define MT_WFDMA0_GLO_CFG_TX_DMA_BUSY BIT(1)
9173+#define MT_WFDMA0_GLO_CFG_RX_DMA_EN BIT(2)
9174+#define MT_WFDMA0_GLO_CFG_RX_DMA_BUSY BIT(3)
9175+#define MT_WFDMA0_GLO_CFG_TX_WB_DDONE BIT(6)
9176+#define MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL BIT(9)
9177+#define MT_WFDMA0_GLO_CFG_FIFO_LITTLE_ENDIAN BIT(12)
9178+#define MT_WFDMA0_GLO_CFG_CSR_DISP_BASE_PTR_CHAIN_EN BIT(15)
9179+#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 BIT(21)
9180+#define MT_WFDMA0_GLO_CFG_OMIT_RX_INFO BIT(27)
9181+#define MT_WFDMA0_GLO_CFG_OMIT_TX_INFO BIT(28)
9182+#define MT_WFDMA0_GLO_CFG_CLK_GAT_DIS BIT(30)
9183+
9184+#define HOST_RX_DONE_INT_ENA0 BIT(0)
9185+#define HOST_RX_DONE_INT_ENA1 BIT(1)
9186+#define HOST_RX_DONE_INT_ENA2 BIT(2)
9187+#define HOST_RX_DONE_INT_ENA3 BIT(3)
9188+#define HOST_TX_DONE_INT_ENA0 BIT(4)
9189+#define HOST_TX_DONE_INT_ENA1 BIT(5)
9190+#define HOST_TX_DONE_INT_ENA2 BIT(6)
9191+#define HOST_TX_DONE_INT_ENA3 BIT(7)
9192+#define HOST_TX_DONE_INT_ENA4 BIT(8)
9193+#define HOST_TX_DONE_INT_ENA5 BIT(9)
9194+#define HOST_TX_DONE_INT_ENA6 BIT(10)
9195+#define HOST_TX_DONE_INT_ENA7 BIT(11)
9196+#define HOST_RX_COHERENT_EN BIT(20)
9197+#define HOST_TX_COHERENT_EN BIT(21)
9198+#define MCU2HOST_SW_INT_ENA BIT(29)
9199+#define HOST_TX_DONE_INT_ENA18 BIT(30)
9200+
9201+#define MT_INT_MCU_CMD MCU2HOST_SW_INT_ENA
9202+
9203+#define MT_WFDMA0_RST_DTX_PTR MT_WFDMA0(0x20c)
9204+#define MT_WFDMA0_RST_DRX_PTR MT_WFDMA0(0x280)
9205+#define MT_WFDMA0_GLO_CFG_EXT0 MT_WFDMA0(0x2b0)
9206+#define MT_WFDMA0_CSR_TX_DMASHDL_ENABLE BIT(6)
9207+#define MT_WFDMA0_PRI_DLY_INT_CFG0 MT_WFDMA0(0x2f0)
9208+
9209+#define MT_WFDMA0_TX_RING0_EXT_CTRL MT_WFDMA0(0x600)
9210+#define MT_WFDMA0_TX_RING1_EXT_CTRL MT_WFDMA0(0x604)
9211+#define MT_WFDMA0_TX_RING2_EXT_CTRL MT_WFDMA0(0x608)
9212+#define MT_WFDMA0_TX_RING3_EXT_CTRL MT_WFDMA0(0x60c)
9213+#define MT_WFDMA0_TX_RING4_EXT_CTRL MT_WFDMA0(0x610)
9214+#define MT_WFDMA0_TX_RING5_EXT_CTRL MT_WFDMA0(0x614)
9215+#define MT_WFDMA0_TX_RING6_EXT_CTRL MT_WFDMA0(0x618)
9216+#define MT_WFDMA0_TX_RING15_EXT_CTRL MT_WFDMA0(0x63c)
9217+#define MT_WFDMA0_TX_RING16_EXT_CTRL MT_WFDMA0(0x640)
9218+#define MT_WFDMA0_TX_RING17_EXT_CTRL MT_WFDMA0(0x644)
9219+
9220+#define MT_WPDMA0_MAX_CNT_MASK GENMASK(7, 0)
9221+#define MT_WPDMA0_BASE_PTR_MASK GENMASK(31, 16)
9222+
9223+#define MT_WFDMA0_RX_RING0_EXT_CTRL MT_WFDMA0(0x680)
9224+#define MT_WFDMA0_RX_RING1_EXT_CTRL MT_WFDMA0(0x684)
9225+#define MT_WFDMA0_RX_RING2_EXT_CTRL MT_WFDMA0(0x688)
9226+#define MT_WFDMA0_RX_RING3_EXT_CTRL MT_WFDMA0(0x68c)
9227+#define MT_WFDMA0_RX_RING4_EXT_CTRL MT_WFDMA0(0x690)
9228+#define MT_WFDMA0_RX_RING5_EXT_CTRL MT_WFDMA0(0x694)
9229+#define MT_WFDMA0_RX_RING6_EXT_CTRL MT_WFDMA0(0x698)
9230+#define MT_WFDMA0_RX_RING7_EXT_CTRL MT_WFDMA0(0x69c)
9231+
9232+#define MT_TX_RING_BASE MT_WFDMA0(0x300)
9233+#define MT_RX_EVENT_RING_BASE MT_WFDMA0(0x500)
9234+
9235+/* WFDMA CSR */
9236+#define MT_WFDMA_EXT_CSR_BASE 0xd7000
9237+#define MT_WFDMA_EXT_CSR(ofs) (MT_WFDMA_EXT_CSR_BASE + (ofs))
9238+#define MT_WFDMA_EXT_CSR_HIF_MISC MT_WFDMA_EXT_CSR(0x44)
9239+#define MT_WFDMA_EXT_CSR_HIF_MISC_BUSY BIT(0)
9240+
9241+#define MT_SWDEF_BASE 0x41f200
9242+#define MT_SWDEF(ofs) (MT_SWDEF_BASE + (ofs))
9243+#define MT_SWDEF_MODE MT_SWDEF(0x3c)
9244+#define MT_SWDEF_NORMAL_MODE 0
9245+#define MT_SWDEF_ICAP_MODE 1
9246+#define MT_SWDEF_SPECTRUM_MODE 2
9247+
9248+#define MT_TOP_BASE 0x18060000
9249+#define MT_TOP(ofs) (MT_TOP_BASE + (ofs))
9250+
9251+#define MT_TOP_LPCR_HOST_BAND0 MT_TOP(0x10)
9252+#define MT_TOP_LPCR_HOST_FW_OWN BIT(0)
9253+#define MT_TOP_LPCR_HOST_DRV_OWN BIT(1)
9254+
9255+#define MT_TOP_MISC MT_TOP(0xf0)
9256+#define MT_TOP_MISC_FW_STATE GENMASK(2, 0)
9257+
9258+#define MT_MCU_WPDMA0_BASE 0x54000000
9259+#define MT_MCU_WPDMA0(ofs) (MT_MCU_WPDMA0_BASE + (ofs))
9260+
9261+#define MT_WFDMA_DUMMY_CR MT_MCU_WPDMA0(0x120)
9262+#define MT_WFDMA_NEED_REINIT BIT(1)
9263+
9264+#define MT_CBTOP_RGU(ofs) (0x70002000 + (ofs))
9265+#define MT_CBTOP_RGU_WF_SUBSYS_RST MT_CBTOP_RGU(0x600)
9266+#define MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH BIT(0)
9267+
9268+#define MT_HW_BOUND 0x70010020
9269+#define MT_HW_CHIPID 0x70010200
9270+#define MT_HW_REV 0x70010204
9271+
9272+#define MT_PCIE_MAC_BASE 0x10000
9273+#define MT_PCIE_MAC(ofs) (MT_PCIE_MAC_BASE + (ofs))
9274+#define MT_PCIE_MAC_INT_ENABLE MT_PCIE_MAC(0x188)
9275+#define MT_PCIE_MAC_PM MT_PCIE_MAC(0x194)
9276+#define MT_PCIE_MAC_PM_L0S_DIS BIT(8)
9277+
9278+#define MT_DMA_SHDL(ofs) (0x7c026000 + (ofs))
9279+#define MT_DMASHDL_SW_CONTROL MT_DMA_SHDL(0x004)
9280+#define MT_DMASHDL_DMASHDL_BYPASS BIT(28)
9281+#define MT_DMASHDL_OPTIONAL MT_DMA_SHDL(0x008)
9282+#define MT_DMASHDL_PAGE MT_DMA_SHDL(0x00c)
9283+#define MT_DMASHDL_GROUP_SEQ_ORDER BIT(16)
9284+#define MT_DMASHDL_REFILL MT_DMA_SHDL(0x010)
9285+#define MT_DMASHDL_REFILL_MASK GENMASK(31, 16)
9286+#define MT_DMASHDL_PKT_MAX_SIZE MT_DMA_SHDL(0x01c)
9287+#define MT_DMASHDL_PKT_MAX_SIZE_PLE GENMASK(11, 0)
9288+#define MT_DMASHDL_PKT_MAX_SIZE_PSE GENMASK(27, 16)
9289+
9290+#define MT_DMASHDL_GROUP_QUOTA(_n) MT_DMA_SHDL(0x020 + ((_n) << 2))
9291+#define MT_DMASHDL_GROUP_QUOTA_MIN GENMASK(11, 0)
9292+#define MT_DMASHDL_GROUP_QUOTA_MAX GENMASK(27, 16)
9293+
9294+#define MT_DMASHDL_Q_MAP(_n) MT_DMA_SHDL(0x060 + ((_n) << 2))
9295+#define MT_DMASHDL_Q_MAP_MASK GENMASK(3, 0)
9296+#define MT_DMASHDL_Q_MAP_SHIFT(_n) (4 * ((_n) % 8))
9297+
9298+#define MT_DMASHDL_SCHED_SET(_n) MT_DMA_SHDL(0x070 + ((_n) << 2))
9299+
9300+#define MT_WFDMA_HOST_CONFIG 0x7c027030
9301+#define MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN BIT(6)
9302+
9303+#define MT_UMAC(ofs) (0x74000000 + (ofs))
9304+#define MT_UDMA_TX_QSEL MT_UMAC(0x008)
9305+#define MT_FW_DL_EN BIT(3)
9306+
9307+#define MT_UDMA_WLCFG_1 MT_UMAC(0x00c)
9308+#define MT_WL_RX_AGG_PKT_LMT GENMASK(7, 0)
9309+#define MT_WL_TX_TMOUT_LMT GENMASK(27, 8)
9310+
9311+#define MT_UDMA_WLCFG_0 MT_UMAC(0x18)
9312+#define MT_WL_RX_AGG_TO GENMASK(7, 0)
9313+#define MT_WL_RX_AGG_LMT GENMASK(15, 8)
9314+#define MT_WL_TX_TMOUT_FUNC_EN BIT(16)
9315+#define MT_WL_TX_DPH_CHK_EN BIT(17)
9316+#define MT_WL_RX_MPSZ_PAD0 BIT(18)
9317+#define MT_WL_RX_FLUSH BIT(19)
9318+#define MT_TICK_1US_EN BIT(20)
9319+#define MT_WL_RX_AGG_EN BIT(21)
9320+#define MT_WL_RX_EN BIT(22)
9321+#define MT_WL_TX_EN BIT(23)
9322+#define MT_WL_RX_BUSY BIT(30)
9323+#define MT_WL_TX_BUSY BIT(31)
9324+
9325+#define MT_UDMA_CONN_INFRA_STATUS MT_UMAC(0xa20)
9326+#define MT_UDMA_CONN_WFSYS_INIT_DONE BIT(22)
9327+#define MT_UDMA_CONN_INFRA_STATUS_SEL MT_UMAC(0xa24)
9328+
9329+#define MT_SSUSB_EPCTL_CSR(ofs) (0x74011800 + (ofs))
9330+#define MT_SSUSB_EPCTL_CSR_EP_RST_OPT MT_SSUSB_EPCTL_CSR(0x090)
9331+
9332+#define MT_UWFDMA0(ofs) (0x7c024000 + (ofs))
9333+#define MT_UWFDMA0_GLO_CFG MT_UWFDMA0(0x208)
9334+#define MT_UWFDMA0_GLO_CFG_EXT0 MT_UWFDMA0(0x2b0)
9335+#define MT_UWFDMA0_GLO_CFG_EXT1 MT_UWFDMA0(0x2b4)
9336+#define MT_UWFDMA0_TX_RING_EXT_CTRL(_n) MT_UWFDMA0(0x600 + ((_n) << 2))
9337+
9338+#define MT_CONN_STATUS 0x7c053c10
9339+#define MT_WIFI_PATCH_DL_STATE BIT(0)
9340+
9341+#define MT_CONN_ON_LPCTL 0x7c060010
9342+#define PCIE_LPCR_HOST_SET_OWN BIT(0)
9343+#define PCIE_LPCR_HOST_CLR_OWN BIT(1)
9344+#define PCIE_LPCR_HOST_OWN_SYNC BIT(2)
9345+
9346+#define MT_CONN_ON_MISC 0x7c0600f0
9347+#define MT_TOP_MISC2_FW_PWR_ON BIT(0)
9348+#define MT_TOP_MISC2_FW_N9_ON BIT(1)
9349+#define MT_TOP_MISC2_FW_N9_RDY GENMASK(1, 0)
9350+
9351+#define MT_WF_SW_DEF_CR(ofs) (0x401a00 + (ofs))
9352+#define MT_WF_SW_DEF_CR_USB_MCU_EVENT MT_WF_SW_DEF_CR(0x028)
9353+#define MT_WF_SW_SER_TRIGGER_SUSPEND BIT(6)
9354+#define MT_WF_SW_SER_DONE_SUSPEND BIT(7)
9355+
9356+#define WFSYS_SW_RST_B BIT(0)
9357+#define WFSYS_SW_INIT_DONE BIT(4)
9358+
9359+#endif /* __MT792X_REGS_H */
9360diff --git a/mt792x_trace.c b/mt792x_trace.c
9361new file mode 100644
9362index 00000000..b6f284fb
9363--- /dev/null
9364+++ b/mt792x_trace.c
9365@@ -0,0 +1,14 @@
9366+// SPDX-License-Identifier: ISC
9367+/*
9368+ * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org>
9369+ */
9370+
9371+#include <linux/module.h>
9372+
9373+#ifndef __CHECKER__
9374+#define CREATE_TRACE_POINTS
9375+#include "mt792x_trace.h"
9376+
9377+EXPORT_TRACEPOINT_SYMBOL_GPL(lp_event);
9378+
9379+#endif
9380diff --git a/mt7921/mt7921_trace.h b/mt792x_trace.h
9381similarity index 68%
9382rename from mt7921/mt7921_trace.h
9383rename to mt792x_trace.h
9384index 9bc4db67..61f2aa26 100644
9385--- a/mt7921/mt7921_trace.h
9386+++ b/mt792x_trace.h
9387@@ -1,27 +1,27 @@
9388 /* SPDX-License-Identifier: ISC */
9389 /*
9390- * Copyright (C) 2021 Lorenzo Bianconi <lorenzo@kernel.org>
9391+ * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org>
9392 */
9393
9394-#if !defined(__MT7921_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
9395-#define __MT7921_TRACE_H
9396+#if !defined(__MT792X_TRACE_H) || defined(TRACE_HEADER_MULTI_READ)
9397+#define __MT792X_TRACE_H
9398
9399 #include <linux/tracepoint.h>
9400-#include "mt7921.h"
9401+#include "mt792x.h"
9402
9403 #undef TRACE_SYSTEM
9404-#define TRACE_SYSTEM mt7921
9405+#define TRACE_SYSTEM mt792x
9406
9407 #define MAXNAME 32
9408 #define DEV_ENTRY __array(char, wiphy_name, 32)
9409-#define DEV_ASSIGN strlcpy(__entry->wiphy_name, \
9410+#define DEV_ASSIGN strscpy(__entry->wiphy_name, \
9411 wiphy_name(mt76_hw(dev)->wiphy), MAXNAME)
9412 #define DEV_PR_FMT "%s"
9413 #define DEV_PR_ARG __entry->wiphy_name
9414 #define LP_STATE_PR_ARG __entry->lp_state ? "lp ready" : "lp not ready"
9415
9416 TRACE_EVENT(lp_event,
9417- TP_PROTO(struct mt7921_dev *dev, u8 lp_state),
9418+ TP_PROTO(struct mt792x_dev *dev, u8 lp_state),
9419
9420 TP_ARGS(dev, lp_state),
9421
9422@@ -46,6 +46,6 @@ TRACE_EVENT(lp_event,
9423 #undef TRACE_INCLUDE_PATH
9424 #define TRACE_INCLUDE_PATH .
9425 #undef TRACE_INCLUDE_FILE
9426-#define TRACE_INCLUDE_FILE mt7921_trace
9427+#define TRACE_INCLUDE_FILE mt792x_trace
9428
9429 #include <trace/define_trace.h>
9430diff --git a/mt792x_usb.c b/mt792x_usb.c
9431new file mode 100644
9432index 00000000..20e7f9c7
9433--- /dev/null
9434+++ b/mt792x_usb.c
9435@@ -0,0 +1,309 @@
9436+// SPDX-License-Identifier: ISC
9437+/* Copyright (C) 2023 MediaTek Inc.
9438+ *
9439+ * Author: Lorenzo Bianconi <lorenzo@kernel.org>
9440+ */
9441+
9442+#include <linux/kernel.h>
9443+#include <linux/module.h>
9444+#include <linux/usb.h>
9445+
9446+#include "mt792x.h"
9447+#include "mt76_connac2_mac.h"
9448+
9449+u32 mt792xu_rr(struct mt76_dev *dev, u32 addr)
9450+{
9451+ u32 ret;
9452+
9453+ mutex_lock(&dev->usb.usb_ctrl_mtx);
9454+ ret = ___mt76u_rr(dev, MT_VEND_READ_EXT,
9455+ USB_DIR_IN | MT_USB_TYPE_VENDOR, addr);
9456+ mutex_unlock(&dev->usb.usb_ctrl_mtx);
9457+
9458+ return ret;
9459+}
9460+EXPORT_SYMBOL_GPL(mt792xu_rr);
9461+
9462+void mt792xu_wr(struct mt76_dev *dev, u32 addr, u32 val)
9463+{
9464+ mutex_lock(&dev->usb.usb_ctrl_mtx);
9465+ ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
9466+ USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
9467+ mutex_unlock(&dev->usb.usb_ctrl_mtx);
9468+}
9469+EXPORT_SYMBOL_GPL(mt792xu_wr);
9470+
9471+u32 mt792xu_rmw(struct mt76_dev *dev, u32 addr, u32 mask, u32 val)
9472+{
9473+ mutex_lock(&dev->usb.usb_ctrl_mtx);
9474+ val |= ___mt76u_rr(dev, MT_VEND_READ_EXT,
9475+ USB_DIR_IN | MT_USB_TYPE_VENDOR, addr) & ~mask;
9476+ ___mt76u_wr(dev, MT_VEND_WRITE_EXT,
9477+ USB_DIR_OUT | MT_USB_TYPE_VENDOR, addr, val);
9478+ mutex_unlock(&dev->usb.usb_ctrl_mtx);
9479+
9480+ return val;
9481+}
9482+EXPORT_SYMBOL_GPL(mt792xu_rmw);
9483+
9484+void mt792xu_copy(struct mt76_dev *dev, u32 offset, const void *data, int len)
9485+{
9486+ struct mt76_usb *usb = &dev->usb;
9487+ int ret, i = 0, batch_len;
9488+ const u8 *val = data;
9489+
9490+ len = round_up(len, 4);
9491+
9492+ mutex_lock(&usb->usb_ctrl_mtx);
9493+ while (i < len) {
9494+ batch_len = min_t(int, usb->data_len, len - i);
9495+ memcpy(usb->data, val + i, batch_len);
9496+ ret = __mt76u_vendor_request(dev, MT_VEND_WRITE_EXT,
9497+ USB_DIR_OUT | MT_USB_TYPE_VENDOR,
9498+ (offset + i) >> 16, offset + i,
9499+ usb->data, batch_len);
9500+ if (ret < 0)
9501+ break;
9502+
9503+ i += batch_len;
9504+ }
9505+ mutex_unlock(&usb->usb_ctrl_mtx);
9506+}
9507+EXPORT_SYMBOL_GPL(mt792xu_copy);
9508+
9509+int mt792xu_mcu_power_on(struct mt792x_dev *dev)
9510+{
9511+ int ret;
9512+
9513+ ret = mt76u_vendor_request(&dev->mt76, MT_VEND_POWER_ON,
9514+ USB_DIR_OUT | MT_USB_TYPE_VENDOR,
9515+ 0x0, 0x1, NULL, 0);
9516+ if (ret)
9517+ return ret;
9518+
9519+ if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
9520+ MT_TOP_MISC2_FW_PWR_ON, 500)) {
9521+ dev_err(dev->mt76.dev, "Timeout for power on\n");
9522+ ret = -EIO;
9523+ }
9524+
9525+ return ret;
9526+}
9527+EXPORT_SYMBOL_GPL(mt792xu_mcu_power_on);
9528+
9529+static void mt792xu_cleanup(struct mt792x_dev *dev)
9530+{
9531+ clear_bit(MT76_STATE_INITIALIZED, &dev->mphy.state);
9532+ mt792xu_wfsys_reset(dev);
9533+ skb_queue_purge(&dev->mt76.mcu.res_q);
9534+ mt76u_queues_deinit(&dev->mt76);
9535+}
9536+
9537+static u32 mt792xu_uhw_rr(struct mt76_dev *dev, u32 addr)
9538+{
9539+ u32 ret;
9540+
9541+ mutex_lock(&dev->usb.usb_ctrl_mtx);
9542+ ret = ___mt76u_rr(dev, MT_VEND_DEV_MODE,
9543+ USB_DIR_IN | MT_USB_TYPE_UHW_VENDOR, addr);
9544+ mutex_unlock(&dev->usb.usb_ctrl_mtx);
9545+
9546+ return ret;
9547+}
9548+
9549+static void mt792xu_uhw_wr(struct mt76_dev *dev, u32 addr, u32 val)
9550+{
9551+ mutex_lock(&dev->usb.usb_ctrl_mtx);
9552+ ___mt76u_wr(dev, MT_VEND_WRITE,
9553+ USB_DIR_OUT | MT_USB_TYPE_UHW_VENDOR, addr, val);
9554+ mutex_unlock(&dev->usb.usb_ctrl_mtx);
9555+}
9556+
9557+static void mt792xu_dma_prefetch(struct mt792x_dev *dev)
9558+{
9559+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
9560+ MT_WPDMA0_MAX_CNT_MASK, 4);
9561+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(0),
9562+ MT_WPDMA0_BASE_PTR_MASK, 0x80);
9563+
9564+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
9565+ MT_WPDMA0_MAX_CNT_MASK, 4);
9566+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(1),
9567+ MT_WPDMA0_BASE_PTR_MASK, 0xc0);
9568+
9569+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
9570+ MT_WPDMA0_MAX_CNT_MASK, 4);
9571+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(2),
9572+ MT_WPDMA0_BASE_PTR_MASK, 0x100);
9573+
9574+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
9575+ MT_WPDMA0_MAX_CNT_MASK, 4);
9576+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(3),
9577+ MT_WPDMA0_BASE_PTR_MASK, 0x140);
9578+
9579+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
9580+ MT_WPDMA0_MAX_CNT_MASK, 4);
9581+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(4),
9582+ MT_WPDMA0_BASE_PTR_MASK, 0x180);
9583+
9584+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
9585+ MT_WPDMA0_MAX_CNT_MASK, 4);
9586+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(16),
9587+ MT_WPDMA0_BASE_PTR_MASK, 0x280);
9588+
9589+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
9590+ MT_WPDMA0_MAX_CNT_MASK, 4);
9591+ mt76_rmw(dev, MT_UWFDMA0_TX_RING_EXT_CTRL(17),
9592+ MT_WPDMA0_BASE_PTR_MASK, 0x2c0);
9593+}
9594+
9595+static void mt792xu_wfdma_init(struct mt792x_dev *dev)
9596+{
9597+ mt792xu_dma_prefetch(dev);
9598+
9599+ mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_OMIT_RX_INFO);
9600+ mt76_set(dev, MT_UWFDMA0_GLO_CFG,
9601+ MT_WFDMA0_GLO_CFG_OMIT_TX_INFO |
9602+ MT_WFDMA0_GLO_CFG_OMIT_RX_INFO_PFET2 |
9603+ MT_WFDMA0_GLO_CFG_FW_DWLD_BYPASS_DMASHDL |
9604+ MT_WFDMA0_GLO_CFG_TX_DMA_EN |
9605+ MT_WFDMA0_GLO_CFG_RX_DMA_EN);
9606+
9607+ /* disable dmashdl */
9608+ mt76_clear(dev, MT_UWFDMA0_GLO_CFG_EXT0,
9609+ MT_WFDMA0_CSR_TX_DMASHDL_ENABLE);
9610+ mt76_set(dev, MT_DMASHDL_SW_CONTROL, MT_DMASHDL_DMASHDL_BYPASS);
9611+
9612+ mt76_set(dev, MT_WFDMA_DUMMY_CR, MT_WFDMA_NEED_REINIT);
9613+}
9614+
9615+static int mt792xu_dma_rx_evt_ep4(struct mt792x_dev *dev)
9616+{
9617+ if (!mt76_poll(dev, MT_UWFDMA0_GLO_CFG,
9618+ MT_WFDMA0_GLO_CFG_RX_DMA_BUSY, 0, 1000))
9619+ return -ETIMEDOUT;
9620+
9621+ mt76_clear(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
9622+ mt76_set(dev, MT_WFDMA_HOST_CONFIG,
9623+ MT_WFDMA_HOST_CONFIG_USB_RXEVT_EP4_EN);
9624+ mt76_set(dev, MT_UWFDMA0_GLO_CFG, MT_WFDMA0_GLO_CFG_RX_DMA_EN);
9625+
9626+ return 0;
9627+}
9628+
9629+static void mt792xu_epctl_rst_opt(struct mt792x_dev *dev, bool reset)
9630+{
9631+ u32 val;
9632+
9633+ /* usb endpoint reset opt
9634+ * bits[4,9]: out blk ep 4-9
9635+ * bits[20,21]: in blk ep 4-5
9636+ * bits[22]: in int ep 6
9637+ */
9638+ val = mt792xu_uhw_rr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT);
9639+ if (reset)
9640+ val |= GENMASK(9, 4) | GENMASK(22, 20);
9641+ else
9642+ val &= ~(GENMASK(9, 4) | GENMASK(22, 20));
9643+ mt792xu_uhw_wr(&dev->mt76, MT_SSUSB_EPCTL_CSR_EP_RST_OPT, val);
9644+}
9645+
9646+int mt792xu_dma_init(struct mt792x_dev *dev, bool resume)
9647+{
9648+ int err;
9649+
9650+ mt792xu_wfdma_init(dev);
9651+
9652+ mt76_clear(dev, MT_UDMA_WLCFG_0, MT_WL_RX_FLUSH);
9653+
9654+ mt76_set(dev, MT_UDMA_WLCFG_0,
9655+ MT_WL_RX_EN | MT_WL_TX_EN |
9656+ MT_WL_RX_MPSZ_PAD0 | MT_TICK_1US_EN);
9657+ mt76_clear(dev, MT_UDMA_WLCFG_0,
9658+ MT_WL_RX_AGG_TO | MT_WL_RX_AGG_LMT);
9659+ mt76_clear(dev, MT_UDMA_WLCFG_1, MT_WL_RX_AGG_PKT_LMT);
9660+
9661+ if (resume)
9662+ return 0;
9663+
9664+ err = mt792xu_dma_rx_evt_ep4(dev);
9665+ if (err)
9666+ return err;
9667+
9668+ mt792xu_epctl_rst_opt(dev, false);
9669+
9670+ return 0;
9671+}
9672+EXPORT_SYMBOL_GPL(mt792xu_dma_init);
9673+
9674+int mt792xu_wfsys_reset(struct mt792x_dev *dev)
9675+{
9676+ u32 val;
9677+ int i;
9678+
9679+ mt792xu_epctl_rst_opt(dev, false);
9680+
9681+ val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
9682+ val |= MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
9683+ mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
9684+
9685+ usleep_range(10, 20);
9686+
9687+ val = mt792xu_uhw_rr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST);
9688+ val &= ~MT_CBTOP_RGU_WF_SUBSYS_RST_WF_WHOLE_PATH;
9689+ mt792xu_uhw_wr(&dev->mt76, MT_CBTOP_RGU_WF_SUBSYS_RST, val);
9690+
9691+ mt792xu_uhw_wr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS_SEL, 0);
9692+ for (i = 0; i < MT792x_WFSYS_INIT_RETRY_COUNT; i++) {
9693+ val = mt792xu_uhw_rr(&dev->mt76, MT_UDMA_CONN_INFRA_STATUS);
9694+ if (val & MT_UDMA_CONN_WFSYS_INIT_DONE)
9695+ break;
9696+
9697+ msleep(100);
9698+ }
9699+
9700+ if (i == MT792x_WFSYS_INIT_RETRY_COUNT)
9701+ return -ETIMEDOUT;
9702+
9703+ return 0;
9704+}
9705+EXPORT_SYMBOL_GPL(mt792xu_wfsys_reset);
9706+
9707+int mt792xu_init_reset(struct mt792x_dev *dev)
9708+{
9709+ set_bit(MT76_RESET, &dev->mphy.state);
9710+
9711+ wake_up(&dev->mt76.mcu.wait);
9712+ skb_queue_purge(&dev->mt76.mcu.res_q);
9713+
9714+ mt76u_stop_rx(&dev->mt76);
9715+ mt76u_stop_tx(&dev->mt76);
9716+
9717+ mt792xu_wfsys_reset(dev);
9718+
9719+ clear_bit(MT76_RESET, &dev->mphy.state);
9720+
9721+ return mt76u_resume_rx(&dev->mt76);
9722+}
9723+EXPORT_SYMBOL_GPL(mt792xu_init_reset);
9724+
9725+void mt792xu_disconnect(struct usb_interface *usb_intf)
9726+{
9727+ struct mt792x_dev *dev = usb_get_intfdata(usb_intf);
9728+
9729+ cancel_work_sync(&dev->init_work);
9730+ if (!test_bit(MT76_STATE_INITIALIZED, &dev->mphy.state))
9731+ return;
9732+
9733+ mt76_unregister_device(&dev->mt76);
9734+ mt792xu_cleanup(dev);
9735+
9736+ usb_set_intfdata(usb_intf, NULL);
9737+ usb_put_dev(interface_to_usbdev(usb_intf));
9738+
9739+ mt76_free_device(&dev->mt76);
9740+}
9741+EXPORT_SYMBOL_GPL(mt792xu_disconnect);
9742+
9743+MODULE_LICENSE("Dual BSD/GPL");
9744+MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>");
9745diff --git a/mt7996/mt7996.h b/mt7996/mt7996.h
9746index 726c222e..7354e5cf 100644
9747--- a/mt7996/mt7996.h
9748+++ b/mt7996/mt7996.h
9749@@ -254,20 +254,6 @@ enum {
9750 __MT_WFDMA_MAX,
9751 };
9752
9753-enum {
9754- MT_CTX0,
9755- MT_HIF0 = 0x0,
9756-
9757- MT_LMAC_AC00 = 0x0,
9758- MT_LMAC_AC01,
9759- MT_LMAC_AC02,
9760- MT_LMAC_AC03,
9761- MT_LMAC_ALTX0 = 0x10,
9762- MT_LMAC_BMC0,
9763- MT_LMAC_BCN0,
9764- MT_LMAC_PSMP0,
9765-};
9766-
9767 enum {
9768 MT_RX_SEL0,
9769 MT_RX_SEL1,
9770diff --git a/testmode.c b/testmode.c
9771index 0accc71a..4644dace 100644
9772--- a/testmode.c
9773+++ b/testmode.c
9774@@ -8,6 +8,7 @@ const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = {
9775 [MT76_TM_ATTR_RESET] = { .type = NLA_FLAG },
9776 [MT76_TM_ATTR_STATE] = { .type = NLA_U8 },
9777 [MT76_TM_ATTR_TX_COUNT] = { .type = NLA_U32 },
9778+ [MT76_TM_ATTR_TX_LENGTH] = { .type = NLA_U32 },
9779 [MT76_TM_ATTR_TX_RATE_MODE] = { .type = NLA_U8 },
9780 [MT76_TM_ATTR_TX_RATE_NSS] = { .type = NLA_U8 },
9781 [MT76_TM_ATTR_TX_RATE_IDX] = { .type = NLA_U8 },
9782--
97832.39.2
9784