developer | 05f3b2b | 2024-08-19 19:17:34 +0800 | [diff] [blame] | 1 | From a6bd94f22e1b58c4248e433889071b4e0bd1f283 Mon Sep 17 00:00:00 2001 |
| 2 | From: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 3 | Date: Fri, 14 Jun 2024 10:14:31 +0800 |
| 4 | Subject: [PATCH 169/199] mtk: mt76: mt7996: update adie efuse merge support |
| 5 | |
| 6 | Refactor efuse merge due to FW supporting the efuse merge mcu command |
| 7 | |
| 8 | Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com> |
| 9 | --- |
| 10 | mt7996/eeprom.c | 144 ----------------------------------------- |
| 11 | mt7996/mcu.c | 167 +++++++++++++++++++++++++++++++++++++++++++++++- |
| 12 | mt7996/mcu.h | 1 + |
| 13 | 3 files changed, 167 insertions(+), 145 deletions(-) |
| 14 | |
| 15 | diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c |
| 16 | index e8e1d85a..fb0f2953 100644 |
| 17 | --- a/mt7996/eeprom.c |
| 18 | +++ b/mt7996/eeprom.c |
| 19 | @@ -531,146 +531,6 @@ fail: |
| 20 | return ret; |
| 21 | } |
| 22 | |
| 23 | -static int mt7996_apply_cal_free_data(struct mt7996_dev *dev) |
| 24 | -{ |
| 25 | -#define MT_EE_CAL_FREE_MAX_SIZE 30 |
| 26 | -#define MT_EE_7977BN_OFFSET (0x1200 - 0x500) |
| 27 | -#define MT_EE_END_OFFSET 0xffff |
| 28 | - enum adie_type { |
| 29 | - ADIE_7975, |
| 30 | - ADIE_7976, |
| 31 | - ADIE_7977, |
| 32 | - ADIE_7978, |
| 33 | - ADIE_7979, |
| 34 | - }; |
| 35 | - static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { |
| 36 | - [ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3, |
| 37 | - 0x7a1, 0x7a6, 0x7a8, 0x7aa, -1}, |
| 38 | - [ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 39 | - 0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1}, |
| 40 | - [ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 41 | - 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1}, |
| 42 | - [ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107, |
| 43 | - 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1}, |
| 44 | - [ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 45 | - 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1}, |
| 46 | - }; |
| 47 | - static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { |
| 48 | - [ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f, |
| 49 | - 0xba1, 0xba6, 0xba8, 0xbaa, -1}, |
| 50 | - [ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450, |
| 51 | - 0x451, 0x453, 0x455, 0x457, 0x459, |
| 52 | - 0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95, |
| 53 | - 0xba6, 0xba8, 0xbaa, -1}, |
| 54 | - [ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, |
| 55 | - 0x1251, 0x1253, 0x1255, 0x1257, 0x1259, |
| 56 | - 0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1}, |
| 57 | - [ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489, |
| 58 | - 0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1}, |
| 59 | - [ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251, |
| 60 | - 0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a, |
| 61 | - 0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1}, |
| 62 | - }; |
| 63 | - static const u16 adie_base_7996[] = { |
| 64 | - 0x400, 0x1e00, 0x1200 |
| 65 | - }; |
| 66 | - static const u16 adie_base_7992[] = { |
| 67 | - 0x400, 0x1200, 0x0 |
| 68 | - }; |
| 69 | - static const u16 *adie_offs[__MT_MAX_BAND]; |
| 70 | - static const u16 *eep_offs[__MT_MAX_BAND]; |
| 71 | - static const u16 *adie_base; |
| 72 | - u8 *eeprom = dev->mt76.eeprom.data; |
| 73 | - u8 buf[MT7996_EEPROM_BLOCK_SIZE]; |
| 74 | - int adie_id, band, i, ret; |
| 75 | - |
| 76 | - switch (mt76_chip(&dev->mt76)) { |
| 77 | - case 0x7990: |
| 78 | - adie_base = adie_base_7996; |
| 79 | - /* adie 0 */ |
| 80 | - if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233) |
| 81 | - adie_id = ADIE_7975; |
| 82 | - else |
| 83 | - adie_id = ADIE_7976; |
| 84 | - adie_offs[0] = adie_offs_list[adie_id]; |
| 85 | - eep_offs[0] = eep_offs_list[adie_id]; |
| 86 | - |
| 87 | - /* adie 1 */ |
| 88 | - if (dev->chip_sku == MT7996_SKU_444) { |
| 89 | - adie_offs[1] = adie_offs_list[ADIE_7977]; |
| 90 | - eep_offs[1] = eep_offs_list[ADIE_7977]; |
| 91 | - } |
| 92 | - |
| 93 | - /* adie 2 */ |
| 94 | - adie_offs[2] = adie_offs_list[ADIE_7977]; |
| 95 | - eep_offs[2] = eep_offs_list[ADIE_7977]; |
| 96 | - break; |
| 97 | - case 0x7992: |
| 98 | - adie_base = adie_base_7992; |
| 99 | - /* adie 0 */ |
| 100 | - if (dev->chip_sku == MT7992_SKU_44 && |
| 101 | - dev->fem_type != MT7996_FEM_EXT) |
| 102 | - adie_id = ADIE_7975; |
| 103 | - else if (dev->chip_sku == MT7992_SKU_24) |
| 104 | - adie_id = ADIE_7978; |
| 105 | - else |
| 106 | - adie_id = ADIE_7976; |
| 107 | - adie_offs[0] = adie_offs_list[adie_id]; |
| 108 | - eep_offs[0] = eep_offs_list[adie_id]; |
| 109 | - |
| 110 | - /* adie 1 */ |
| 111 | - if (dev->chip_sku == MT7992_SKU_44 && |
| 112 | - dev->fem_type != MT7996_FEM_INT) |
| 113 | - adie_id = ADIE_7977; |
| 114 | - else if (dev->chip_sku != MT7992_SKU_23) |
| 115 | - adie_id = ADIE_7979; |
| 116 | - else |
| 117 | - break; |
| 118 | - adie_offs[1] = adie_offs_list[adie_id]; |
| 119 | - eep_offs[1] = eep_offs_list[adie_id]; |
| 120 | - break; |
| 121 | - default: |
| 122 | - return -EINVAL; |
| 123 | - } |
| 124 | - |
| 125 | - for (band = 0; band < __MT_MAX_BAND; band++) { |
| 126 | - u16 adie_offset, eep_offset; |
| 127 | - u32 block_num, prev_block_num = -1; |
| 128 | - |
| 129 | - if (!adie_offs[band]) |
| 130 | - continue; |
| 131 | - |
| 132 | - for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) { |
| 133 | - adie_offset = adie_offs[band][i] + adie_base[band]; |
| 134 | - eep_offset = eep_offs[band][i]; |
| 135 | - block_num = adie_offset / MT7996_EEPROM_BLOCK_SIZE; |
| 136 | - |
| 137 | - if (adie_offs[band][i] == MT_EE_END_OFFSET) |
| 138 | - break; |
| 139 | - |
| 140 | - if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_SKU_444 && |
| 141 | - band == MT_BAND1) |
| 142 | - eep_offset -= MT_EE_7977BN_OFFSET; |
| 143 | - |
| 144 | - if (prev_block_num != block_num) { |
| 145 | - ret = mt7996_mcu_get_eeprom(dev, adie_offset, buf); |
| 146 | - if (ret) { |
| 147 | - if (ret != -EINVAL) |
| 148 | - return ret; |
| 149 | - |
| 150 | - prev_block_num = -1; |
| 151 | - continue; |
| 152 | - } |
| 153 | - } |
| 154 | - |
| 155 | - eeprom[eep_offset] = buf[adie_offset % MT7996_EEPROM_BLOCK_SIZE]; |
| 156 | - prev_block_num = block_num; |
| 157 | - } |
| 158 | - } |
| 159 | - |
| 160 | - return 0; |
| 161 | -} |
| 162 | - |
| 163 | int mt7996_eeprom_init(struct mt7996_dev *dev) |
| 164 | { |
| 165 | int ret; |
| 166 | @@ -685,10 +545,6 @@ int mt7996_eeprom_init(struct mt7996_dev *dev) |
| 167 | |
| 168 | mt7996_eeprom_load_precal(dev); |
| 169 | |
| 170 | - ret = mt7996_apply_cal_free_data(dev); |
| 171 | - if (ret) |
| 172 | - return ret; |
| 173 | - |
| 174 | ret = mt7996_eeprom_parse_hw_cap(dev, &dev->phy); |
| 175 | if (ret < 0) |
| 176 | return ret; |
| 177 | diff --git a/mt7996/mcu.c b/mt7996/mcu.c |
| 178 | index 9b3c6e3d..08c92eb3 100644 |
| 179 | --- a/mt7996/mcu.c |
| 180 | +++ b/mt7996/mcu.c |
| 181 | @@ -4595,7 +4595,151 @@ int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag, bool sta) |
| 182 | &req, sizeof(req), true); |
| 183 | } |
| 184 | |
| 185 | -int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) |
| 186 | +static int mt7996_mcu_set_cal_free_data(struct mt7996_dev *dev) |
| 187 | +{ |
| 188 | +#define MT_EE_CAL_FREE_MAX_SIZE 30 |
| 189 | +#define MT_EE_7977BN_OFFSET (0x1200 - 0x500) |
| 190 | +#define MT_EE_END_OFFSET 0xffff |
| 191 | + enum adie_type { |
| 192 | + ADIE_7975, |
| 193 | + ADIE_7976, |
| 194 | + ADIE_7977, |
| 195 | + ADIE_7978, |
| 196 | + ADIE_7979, |
| 197 | + }; |
| 198 | + static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { |
| 199 | + [ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3, |
| 200 | + 0x7a1, 0x7a6, 0x7a8, 0x7aa, -1}, |
| 201 | + [ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 202 | + 0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1}, |
| 203 | + [ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 204 | + 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1}, |
| 205 | + [ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107, |
| 206 | + 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1}, |
| 207 | + [ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59, |
| 208 | + 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1}, |
| 209 | + }; |
| 210 | + static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = { |
| 211 | + [ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f, |
| 212 | + 0xba1, 0xba6, 0xba8, 0xbaa, -1}, |
| 213 | + [ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450, |
| 214 | + 0x451, 0x453, 0x455, 0x457, 0x459, |
| 215 | + 0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95, |
| 216 | + 0xba6, 0xba8, 0xbaa, -1}, |
| 217 | + [ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, |
| 218 | + 0x1251, 0x1253, 0x1255, 0x1257, 0x1259, |
| 219 | + 0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1}, |
| 220 | + [ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489, |
| 221 | + 0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1}, |
| 222 | + [ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251, |
| 223 | + 0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a, |
| 224 | + 0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1}, |
| 225 | + }; |
| 226 | + static const u16 adie_base_7996[] = { |
| 227 | + 0x400, 0x1e00, 0x1200 |
| 228 | + }; |
| 229 | + static const u16 adie_base_7992[] = { |
| 230 | + 0x400, 0x1200, 0x0 |
| 231 | + }; |
| 232 | + static const u16 *adie_offs[__MT_MAX_BAND]; |
| 233 | + static const u16 *eep_offs[__MT_MAX_BAND]; |
| 234 | + static const u16 *adie_base; |
| 235 | + int adie_id, band, i, ret; |
| 236 | + |
| 237 | + switch (mt76_chip(&dev->mt76)) { |
| 238 | + case 0x7990: |
| 239 | + adie_base = adie_base_7996; |
| 240 | + /* adie 0 */ |
| 241 | + if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233) |
| 242 | + adie_id = ADIE_7975; |
| 243 | + else |
| 244 | + adie_id = ADIE_7976; |
| 245 | + adie_offs[0] = adie_offs_list[adie_id]; |
| 246 | + eep_offs[0] = eep_offs_list[adie_id]; |
| 247 | + |
| 248 | + /* adie 1 */ |
| 249 | + if (dev->chip_sku == MT7996_SKU_444) { |
| 250 | + adie_offs[1] = adie_offs_list[ADIE_7977]; |
| 251 | + eep_offs[1] = eep_offs_list[ADIE_7977]; |
| 252 | + } |
| 253 | + |
| 254 | + /* adie 2 */ |
| 255 | + adie_offs[2] = adie_offs_list[ADIE_7977]; |
| 256 | + eep_offs[2] = eep_offs_list[ADIE_7977]; |
| 257 | + break; |
| 258 | + case 0x7992: |
| 259 | + adie_base = adie_base_7992; |
| 260 | + /* adie 0 */ |
| 261 | + if (dev->chip_sku == MT7992_SKU_44 && |
| 262 | + dev->fem_type != MT7996_FEM_EXT) |
| 263 | + adie_id = ADIE_7975; |
| 264 | + else if (dev->chip_sku == MT7992_SKU_24) |
| 265 | + adie_id = ADIE_7978; |
| 266 | + else |
| 267 | + adie_id = ADIE_7976; |
| 268 | + adie_offs[0] = adie_offs_list[adie_id]; |
| 269 | + eep_offs[0] = eep_offs_list[adie_id]; |
| 270 | + |
| 271 | + /* adie 1 */ |
| 272 | + if (dev->chip_sku == MT7992_SKU_44 && |
| 273 | + dev->fem_type != MT7996_FEM_INT) |
| 274 | + adie_id = ADIE_7977; |
| 275 | + else if (dev->chip_sku != MT7992_SKU_23) |
| 276 | + adie_id = ADIE_7979; |
| 277 | + else |
| 278 | + break; |
| 279 | + adie_offs[1] = adie_offs_list[adie_id]; |
| 280 | + eep_offs[1] = eep_offs_list[adie_id]; |
| 281 | + break; |
| 282 | + default: |
| 283 | + return -EINVAL; |
| 284 | + } |
| 285 | + |
| 286 | + for (band = 0; band < __MT_MAX_BAND; band++) { |
| 287 | + struct { |
| 288 | + /* fixed field */ |
| 289 | + u8 __rsv[4]; |
| 290 | + |
| 291 | + __le16 tag; |
| 292 | + __le16 len; |
| 293 | + __le16 adie_offset; |
| 294 | + __le16 eep_offset; |
| 295 | + __le16 count; |
| 296 | + u8 rsv[2]; |
| 297 | + } __packed req = { |
| 298 | + .tag = cpu_to_le16(UNI_EFUSE_PATCH), |
| 299 | + .len = cpu_to_le16(sizeof(req) - 4), |
| 300 | + .count = cpu_to_le16(1), |
| 301 | + }; |
| 302 | + u16 adie_offset, eep_offset; |
| 303 | + |
| 304 | + if (!adie_offs[band]) |
| 305 | + continue; |
| 306 | + |
| 307 | + for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) { |
| 308 | + adie_offset = adie_offs[band][i] + adie_base[band]; |
| 309 | + eep_offset = eep_offs[band][i]; |
| 310 | + |
| 311 | + if (adie_offs[band][i] == MT_EE_END_OFFSET) |
| 312 | + break; |
| 313 | + |
| 314 | + if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_SKU_444 && |
| 315 | + band == MT_BAND1) |
| 316 | + eep_offset -= MT_EE_7977BN_OFFSET; |
| 317 | + |
| 318 | + req.eep_offset = cpu_to_le16(eep_offset); |
| 319 | + req.adie_offset = cpu_to_le16(adie_offset); |
| 320 | + ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), |
| 321 | + &req, sizeof(req), true); |
| 322 | + if (ret) |
| 323 | + return ret; |
| 324 | + } |
| 325 | + } |
| 326 | + |
| 327 | + return 0; |
| 328 | +} |
| 329 | + |
| 330 | +int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev) |
| 331 | { |
| 332 | #define MAX_PAGE_IDX_MASK GENMASK(7, 5) |
| 333 | #define PAGE_IDX_MASK GENMASK(4, 2) |
| 334 | @@ -4640,6 +4784,27 @@ int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) |
| 335 | return 0; |
| 336 | } |
| 337 | |
| 338 | +int mt7996_mcu_set_eeprom(struct mt7996_dev *dev) |
| 339 | +{ |
| 340 | + struct mt7996_mcu_eeprom req = { |
| 341 | + .tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE), |
| 342 | + .len = cpu_to_le16(sizeof(req) - 4), |
| 343 | + .buffer_mode = EE_MODE_EFUSE, |
| 344 | + .format = EE_FORMAT_WHOLE |
| 345 | + }; |
| 346 | + int ret; |
| 347 | + |
| 348 | + if (dev->flash_mode) |
| 349 | + ret = mt7996_mcu_set_eeprom_flash(dev); |
| 350 | + else |
| 351 | + ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL), |
| 352 | + &req, sizeof(req), true); |
| 353 | + if (ret) |
| 354 | + return ret; |
| 355 | + |
| 356 | + return mt7996_mcu_set_cal_free_data(dev); |
| 357 | +} |
| 358 | + |
| 359 | int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *read_buf) |
| 360 | { |
| 361 | struct mt7996_mcu_eeprom_info req = { |
| 362 | diff --git a/mt7996/mcu.h b/mt7996/mcu.h |
| 363 | index 05b29c90..d99e9a60 100644 |
| 364 | --- a/mt7996/mcu.h |
| 365 | +++ b/mt7996/mcu.h |
| 366 | @@ -1038,6 +1038,7 @@ enum { |
| 367 | UNI_EFUSE_BUFFER_MODE, |
| 368 | UNI_EFUSE_FREE_BLOCK, |
| 369 | UNI_EFUSE_BUFFER_RD, |
| 370 | + UNI_EFUSE_PATCH, |
| 371 | }; |
| 372 | |
| 373 | enum { |
| 374 | -- |
| 375 | 2.18.0 |
| 376 | |