[rdkb][common][bsp][Refactor and sync wifi from openwrt]

[Description]
3a2eef0b [MAC80211][Release][Update release note for Filogic 880/860 MLO Beta release]
cfbd2411 [MAC80211][Release][Filogic 880/860 MLO Beta release]
6c180e3f [MAC80211][WiFi7][misc][Add Eagle BE14000 efem default bin]
a55f34db [MAC80211][Release][Prepare for Filogic 880/860 release]
5b45ebca [MAC80211][WiFi7][hostapd][Add puncture bitmap to ucode]
95bbea73 [MAC80211][WiFi6][mt76][Add PID to only report data-frame TX rate]
b15ced26 [MAC80211][WiFi6][hostapd][Fix DFS channel selection issue]
d59133cb [MAC80211][WiFi6][mt76][Fix pse info not correct information]
3921b4b2 [MAC80211][WiFi6][mt76][Fix incomplete QoS-map setting to FW]
4e7690c7 [MAC80211][WiFi6/7][app][Change ATECHANNEL mapping cmd]
eb37af90 [MAC80211][WiFi7][app][Add support for per-packet bw & primary selection]
0ea82adf [MAC80211][WiFi6][core][Fix DFS CAC issue after CSA]

[Release-log]

Change-Id: I9bec97ec1b2e1c49ed43a812a07a5b21fcbb70a6
diff --git a/recipes-wifi/linux-mt76/files/patches-3.x/0169-mtk-mt76-mt7996-update-adie-efuse-merge-support.patch b/recipes-wifi/linux-mt76/files/patches-3.x/0169-mtk-mt76-mt7996-update-adie-efuse-merge-support.patch
new file mode 100644
index 0000000..8def00e
--- /dev/null
+++ b/recipes-wifi/linux-mt76/files/patches-3.x/0169-mtk-mt76-mt7996-update-adie-efuse-merge-support.patch
@@ -0,0 +1,376 @@
+From a6bd94f22e1b58c4248e433889071b4e0bd1f283 Mon Sep 17 00:00:00 2001
+From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
+Date: Fri, 14 Jun 2024 10:14:31 +0800
+Subject: [PATCH 169/199] mtk: mt76: mt7996: update adie efuse merge support
+
+Refactor efuse merge due to FW supporting the efuse merge mcu command
+
+Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
+---
+ mt7996/eeprom.c | 144 -----------------------------------------
+ mt7996/mcu.c    | 167 +++++++++++++++++++++++++++++++++++++++++++++++-
+ mt7996/mcu.h    |   1 +
+ 3 files changed, 167 insertions(+), 145 deletions(-)
+
+diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
+index e8e1d85a..fb0f2953 100644
+--- a/mt7996/eeprom.c
++++ b/mt7996/eeprom.c
+@@ -531,146 +531,6 @@ fail:
+ 	return ret;
+ }
+ 
+-static int mt7996_apply_cal_free_data(struct mt7996_dev *dev)
+-{
+-#define MT_EE_CAL_FREE_MAX_SIZE		30
+-#define MT_EE_7977BN_OFFSET		(0x1200 - 0x500)
+-#define MT_EE_END_OFFSET		0xffff
+-	enum adie_type {
+-		ADIE_7975,
+-		ADIE_7976,
+-		ADIE_7977,
+-		ADIE_7978,
+-		ADIE_7979,
+-	};
+-	static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
+-		[ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3,
+-			       0x7a1, 0x7a6, 0x7a8, 0x7aa, -1},
+-		[ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+-			       0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1},
+-		[ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+-			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1},
+-		[ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107,
+-			       0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1},
+-		[ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
+-			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1},
+-	};
+-	static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
+-		[ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f,
+-			       0xba1, 0xba6, 0xba8, 0xbaa, -1},
+-		[ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450,
+-			       0x451, 0x453, 0x455, 0x457, 0x459,
+-			       0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95,
+-			       0xba6, 0xba8, 0xbaa, -1},
+-		[ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250,
+-			       0x1251, 0x1253, 0x1255, 0x1257, 0x1259,
+-			       0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1},
+-		[ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489,
+-			       0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1},
+-		[ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251,
+-			       0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a,
+-			       0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1},
+-	};
+-	static const u16 adie_base_7996[] = {
+-		0x400, 0x1e00, 0x1200
+-	};
+-	static const u16 adie_base_7992[] = {
+-		0x400, 0x1200, 0x0
+-	};
+-	static const u16 *adie_offs[__MT_MAX_BAND];
+-	static const u16 *eep_offs[__MT_MAX_BAND];
+-	static const u16 *adie_base;
+-	u8 *eeprom = dev->mt76.eeprom.data;
+-	u8 buf[MT7996_EEPROM_BLOCK_SIZE];
+-	int adie_id, band, i, ret;
+-
+-	switch (mt76_chip(&dev->mt76)) {
+-	case 0x7990:
+-		adie_base = adie_base_7996;
+-		/* adie 0 */
+-		if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233)
+-			adie_id = ADIE_7975;
+-		else
+-			adie_id = ADIE_7976;
+-		adie_offs[0] = adie_offs_list[adie_id];
+-		eep_offs[0] = eep_offs_list[adie_id];
+-
+-		/* adie 1 */
+-		if (dev->chip_sku == MT7996_SKU_444) {
+-			adie_offs[1] = adie_offs_list[ADIE_7977];
+-			eep_offs[1] = eep_offs_list[ADIE_7977];
+-		}
+-
+-		/* adie 2 */
+-		adie_offs[2] = adie_offs_list[ADIE_7977];
+-		eep_offs[2] = eep_offs_list[ADIE_7977];
+-		break;
+-	case 0x7992:
+-		adie_base = adie_base_7992;
+-		/* adie 0 */
+-		if (dev->chip_sku == MT7992_SKU_44 &&
+-		    dev->fem_type != MT7996_FEM_EXT)
+-			adie_id = ADIE_7975;
+-		else if (dev->chip_sku == MT7992_SKU_24)
+-			adie_id = ADIE_7978;
+-		else
+-			adie_id = ADIE_7976;
+-		adie_offs[0] = adie_offs_list[adie_id];
+-		eep_offs[0] = eep_offs_list[adie_id];
+-
+-		/* adie 1 */
+-		if (dev->chip_sku == MT7992_SKU_44 &&
+-		    dev->fem_type != MT7996_FEM_INT)
+-			adie_id = ADIE_7977;
+-		else if (dev->chip_sku != MT7992_SKU_23)
+-			adie_id = ADIE_7979;
+-		else
+-			break;
+-		adie_offs[1] = adie_offs_list[adie_id];
+-		eep_offs[1] = eep_offs_list[adie_id];
+-		break;
+-	default:
+-		return -EINVAL;
+-	}
+-
+-	for (band = 0; band < __MT_MAX_BAND; band++) {
+-		u16 adie_offset, eep_offset;
+-		u32 block_num, prev_block_num = -1;
+-
+-		if (!adie_offs[band])
+-			continue;
+-
+-		for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) {
+-			adie_offset = adie_offs[band][i] + adie_base[band];
+-			eep_offset = eep_offs[band][i];
+-			block_num = adie_offset / MT7996_EEPROM_BLOCK_SIZE;
+-
+-			if (adie_offs[band][i] == MT_EE_END_OFFSET)
+-				break;
+-
+-			if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_SKU_444 &&
+-			    band == MT_BAND1)
+-				eep_offset -= MT_EE_7977BN_OFFSET;
+-
+-			if (prev_block_num != block_num) {
+-				ret = mt7996_mcu_get_eeprom(dev, adie_offset, buf);
+-				if (ret) {
+-					if (ret != -EINVAL)
+-						return ret;
+-
+-					prev_block_num = -1;
+-					continue;
+-				}
+-			}
+-
+-			eeprom[eep_offset] = buf[adie_offset % MT7996_EEPROM_BLOCK_SIZE];
+-			prev_block_num = block_num;
+-		}
+-	}
+-
+-	return 0;
+-}
+-
+ int mt7996_eeprom_init(struct mt7996_dev *dev)
+ {
+ 	int ret;
+@@ -685,10 +545,6 @@ int mt7996_eeprom_init(struct mt7996_dev *dev)
+ 
+ 	mt7996_eeprom_load_precal(dev);
+ 
+-	ret = mt7996_apply_cal_free_data(dev);
+-	if (ret)
+-		return ret;
+-
+ 	ret = mt7996_eeprom_parse_hw_cap(dev, &dev->phy);
+ 	if (ret < 0)
+ 		return ret;
+diff --git a/mt7996/mcu.c b/mt7996/mcu.c
+index 9b3c6e3d..08c92eb3 100644
+--- a/mt7996/mcu.c
++++ b/mt7996/mcu.c
+@@ -4595,7 +4595,151 @@ int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag, bool sta)
+ 				 &req, sizeof(req), true);
+ }
+ 
+-int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
++static int mt7996_mcu_set_cal_free_data(struct mt7996_dev *dev)
++{
++#define MT_EE_CAL_FREE_MAX_SIZE		30
++#define MT_EE_7977BN_OFFSET		(0x1200 - 0x500)
++#define MT_EE_END_OFFSET		0xffff
++	enum adie_type {
++		ADIE_7975,
++		ADIE_7976,
++		ADIE_7977,
++		ADIE_7978,
++		ADIE_7979,
++	};
++	static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
++		[ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3,
++			       0x7a1, 0x7a6, 0x7a8, 0x7aa, -1},
++		[ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
++			       0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1},
++		[ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
++			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1},
++		[ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107,
++			       0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1},
++		[ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
++			       0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1},
++	};
++	static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
++		[ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f,
++			       0xba1, 0xba6, 0xba8, 0xbaa, -1},
++		[ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450,
++			       0x451, 0x453, 0x455, 0x457, 0x459,
++			       0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95,
++			       0xba6, 0xba8, 0xbaa, -1},
++		[ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250,
++			       0x1251, 0x1253, 0x1255, 0x1257, 0x1259,
++			       0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1},
++		[ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489,
++			       0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1},
++		[ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251,
++			       0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a,
++			       0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1},
++	};
++	static const u16 adie_base_7996[] = {
++		0x400, 0x1e00, 0x1200
++	};
++	static const u16 adie_base_7992[] = {
++		0x400, 0x1200, 0x0
++	};
++	static const u16 *adie_offs[__MT_MAX_BAND];
++	static const u16 *eep_offs[__MT_MAX_BAND];
++	static const u16 *adie_base;
++	int adie_id, band, i, ret;
++
++	switch (mt76_chip(&dev->mt76)) {
++	case 0x7990:
++		adie_base = adie_base_7996;
++		/* adie 0 */
++		if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_SKU_233)
++			adie_id = ADIE_7975;
++		else
++			adie_id = ADIE_7976;
++		adie_offs[0] = adie_offs_list[adie_id];
++		eep_offs[0] = eep_offs_list[adie_id];
++
++		/* adie 1 */
++		if (dev->chip_sku == MT7996_SKU_444) {
++			adie_offs[1] = adie_offs_list[ADIE_7977];
++			eep_offs[1] = eep_offs_list[ADIE_7977];
++		}
++
++		/* adie 2 */
++		adie_offs[2] = adie_offs_list[ADIE_7977];
++		eep_offs[2] = eep_offs_list[ADIE_7977];
++		break;
++	case 0x7992:
++		adie_base = adie_base_7992;
++		/* adie 0 */
++		if (dev->chip_sku == MT7992_SKU_44 &&
++		    dev->fem_type != MT7996_FEM_EXT)
++			adie_id = ADIE_7975;
++		else if (dev->chip_sku == MT7992_SKU_24)
++			adie_id = ADIE_7978;
++		else
++			adie_id = ADIE_7976;
++		adie_offs[0] = adie_offs_list[adie_id];
++		eep_offs[0] = eep_offs_list[adie_id];
++
++		/* adie 1 */
++		if (dev->chip_sku == MT7992_SKU_44 &&
++		    dev->fem_type != MT7996_FEM_INT)
++			adie_id = ADIE_7977;
++		else if (dev->chip_sku != MT7992_SKU_23)
++			adie_id = ADIE_7979;
++		else
++			break;
++		adie_offs[1] = adie_offs_list[adie_id];
++		eep_offs[1] = eep_offs_list[adie_id];
++		break;
++	default:
++		return -EINVAL;
++	}
++
++	for (band = 0; band < __MT_MAX_BAND; band++) {
++		struct {
++			/* fixed field */
++			u8 __rsv[4];
++
++			__le16 tag;
++			__le16 len;
++			__le16 adie_offset;
++			__le16 eep_offset;
++			__le16 count;
++			u8 rsv[2];
++		} __packed req = {
++			.tag = cpu_to_le16(UNI_EFUSE_PATCH),
++			.len = cpu_to_le16(sizeof(req) - 4),
++			.count = cpu_to_le16(1),
++		};
++		u16 adie_offset, eep_offset;
++
++		if (!adie_offs[band])
++			continue;
++
++		for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) {
++			adie_offset = adie_offs[band][i] + adie_base[band];
++			eep_offset = eep_offs[band][i];
++
++			if (adie_offs[band][i] == MT_EE_END_OFFSET)
++				break;
++
++			if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_SKU_444 &&
++			    band == MT_BAND1)
++				eep_offset -= MT_EE_7977BN_OFFSET;
++
++			req.eep_offset = cpu_to_le16(eep_offset);
++			req.adie_offset = cpu_to_le16(adie_offset);
++			ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
++						&req, sizeof(req), true);
++			if (ret)
++				return ret;
++		}
++	}
++
++	return 0;
++}
++
++int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
+ {
+ #define MAX_PAGE_IDX_MASK	GENMASK(7, 5)
+ #define PAGE_IDX_MASK		GENMASK(4, 2)
+@@ -4640,6 +4784,27 @@ int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
+ 	return 0;
+ }
+ 
++int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
++{
++	struct mt7996_mcu_eeprom req = {
++		.tag = cpu_to_le16(UNI_EFUSE_BUFFER_MODE),
++		.len = cpu_to_le16(sizeof(req) - 4),
++		.buffer_mode = EE_MODE_EFUSE,
++		.format = EE_FORMAT_WHOLE
++	};
++	int ret;
++
++	if (dev->flash_mode)
++		ret = mt7996_mcu_set_eeprom_flash(dev);
++	else
++		ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
++					&req, sizeof(req), true);
++	if (ret)
++		return ret;
++
++	return mt7996_mcu_set_cal_free_data(dev);
++}
++
+ int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *read_buf)
+ {
+ 	struct mt7996_mcu_eeprom_info req = {
+diff --git a/mt7996/mcu.h b/mt7996/mcu.h
+index 05b29c90..d99e9a60 100644
+--- a/mt7996/mcu.h
++++ b/mt7996/mcu.h
+@@ -1038,6 +1038,7 @@ enum {
+ 	UNI_EFUSE_BUFFER_MODE,
+ 	UNI_EFUSE_FREE_BLOCK,
+ 	UNI_EFUSE_BUFFER_RD,
++	UNI_EFUSE_PATCH,
+ };
+ 
+ enum {
+-- 
+2.18.0
+