blob: 1107ceebc03cd1de019d921cfd0a8cac0baed1f6 [file] [log] [blame]
developer1f55fcf2024-10-17 14:52:33 +08001From 7ecb70d316fc12dacebec431d4349a44e72e49ea Mon Sep 17 00:00:00 2001
developerd0c89452024-10-11 16:53:27 +08002From: Howard Hsu <howard-yh.hsu@mediatek.com>
3Date: Tue, 3 Sep 2024 15:36:56 +0800
developer1f55fcf2024-10-17 14:52:33 +08004Subject: [PATCH 190/193] mtk: mt76: mt7996: fix the capability of reception of
developerd0c89452024-10-11 16:53:27 +08005 EHT MU PPDU
6
7This commit includes two changes. First, enable "EHT MU PPDU With 4x
8EHT-LTF And 0.8us GI" in EHT Phy capabilities element since hardware
9can support. Second, fix the value of "Maximum number of supported
10EHT LTFs" in the same element, where the previous setting of 3 in
11Bit 3-4 was incorrect.
12
13Signed-off-by: Howard Hsu <howard-yh.hsu@mediatek.com>
developerd0c89452024-10-11 16:53:27 +080014---
15 mt7996/init.c | 5 ++---
16 1 file changed, 2 insertions(+), 3 deletions(-)
17
18diff --git a/mt7996/init.c b/mt7996/init.c
developer1f55fcf2024-10-17 14:52:33 +080019index 604d015..00a7c8c 100644
developerd0c89452024-10-11 16:53:27 +080020--- a/mt7996/init.c
21+++ b/mt7996/init.c
developer1f55fcf2024-10-17 14:52:33 +080022@@ -1633,21 +1633,20 @@ mt7996_init_eht_caps(struct mt7996_phy *phy, enum nl80211_band band,
developerd0c89452024-10-11 16:53:27 +080023 IEEE80211_EHT_PHY_CAP3_CODEBOOK_7_5_MU_FDBK;
24
25 eht_cap_elem->phy_cap_info[4] =
26+ IEEE80211_EHT_PHY_CAP4_EHT_MU_PPDU_4_EHT_LTF_08_GI |
27 u8_encode_bits(min_t(int, sts - 1, 2),
28 IEEE80211_EHT_PHY_CAP4_MAX_NC_MASK);
29
30 eht_cap_elem->phy_cap_info[5] =
31 u8_encode_bits(IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_16US,
32 IEEE80211_EHT_PHY_CAP5_COMMON_NOMINAL_PKT_PAD_MASK) |
33- u8_encode_bits(u8_get_bits(0x11, GENMASK(1, 0)),
34+ u8_encode_bits(u8_get_bits(1, GENMASK(1, 0)),
35 IEEE80211_EHT_PHY_CAP5_MAX_NUM_SUPP_EHT_LTF_MASK);
36
37 val = width == NL80211_CHAN_WIDTH_320 ? 0xf :
38 width == NL80211_CHAN_WIDTH_160 ? 0x7 :
39 width == NL80211_CHAN_WIDTH_80 ? 0x3 : 0x1;
40 eht_cap_elem->phy_cap_info[6] =
41- u8_encode_bits(u8_get_bits(0x11, GENMASK(4, 2)),
42- IEEE80211_EHT_PHY_CAP6_MAX_NUM_SUPP_EHT_LTF_MASK) |
43 u8_encode_bits(val, IEEE80211_EHT_PHY_CAP6_MCS15_SUPP_MASK);
44
45 val = u8_encode_bits(nss, IEEE80211_EHT_MCS_NSS_RX) |
46--
472.45.2
48