blob: 47cf4209c44e7c4f3459e34a021d573bd1452e0d [file] [log] [blame]
developer1f55fcf2024-10-17 14:52:33 +08001From 7f862ec237b850ed6b0e1683f46fd3b30368880d Mon Sep 17 00:00:00 2001
developer05f3b2b2024-08-19 19:17:34 +08002From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
3Date: Fri, 14 Jun 2024 10:14:31 +0800
developer1f55fcf2024-10-17 14:52:33 +08004Subject: [PATCH 157/193] mtk: mt76: mt7996: update adie efuse merge support
developer05f3b2b2024-08-19 19:17:34 +08005
6Refactor efuse merge due to FW supporting the efuse merge mcu command
7
developerd0c89452024-10-11 16:53:27 +08008Change-Id: I99f3c3577826f505e402c884cc1f4815f519d2bc
developer05f3b2b2024-08-19 19:17:34 +08009Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
10---
developerd0c89452024-10-11 16:53:27 +080011 mt7996/eeprom.c | 144 --------------------------------------------
12 mt7996/mcu.c | 155 +++++++++++++++++++++++++++++++++++++++++++++++-
developer05f3b2b2024-08-19 19:17:34 +080013 mt7996/mcu.h | 1 +
developerd0c89452024-10-11 16:53:27 +080014 3 files changed, 153 insertions(+), 147 deletions(-)
developer05f3b2b2024-08-19 19:17:34 +080015
16diff --git a/mt7996/eeprom.c b/mt7996/eeprom.c
developer1f55fcf2024-10-17 14:52:33 +080017index 72a21fc..327a36b 100644
developer05f3b2b2024-08-19 19:17:34 +080018--- a/mt7996/eeprom.c
19+++ b/mt7996/eeprom.c
developerd0c89452024-10-11 16:53:27 +080020@@ -564,146 +564,6 @@ fail:
developer05f3b2b2024-08-19 19:17:34 +080021 return ret;
22 }
23
24-static int mt7996_apply_cal_free_data(struct mt7996_dev *dev)
25-{
26-#define MT_EE_CAL_FREE_MAX_SIZE 30
27-#define MT_EE_7977BN_OFFSET (0x1200 - 0x500)
28-#define MT_EE_END_OFFSET 0xffff
29- enum adie_type {
30- ADIE_7975,
31- ADIE_7976,
32- ADIE_7977,
33- ADIE_7978,
34- ADIE_7979,
35- };
36- static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
37- [ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3,
38- 0x7a1, 0x7a6, 0x7a8, 0x7aa, -1},
39- [ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
40- 0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1},
41- [ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
42- 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1},
43- [ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107,
44- 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1},
45- [ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
46- 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1},
47- };
48- static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
49- [ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f,
50- 0xba1, 0xba6, 0xba8, 0xbaa, -1},
51- [ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450,
52- 0x451, 0x453, 0x455, 0x457, 0x459,
53- 0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95,
54- 0xba6, 0xba8, 0xbaa, -1},
55- [ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250,
56- 0x1251, 0x1253, 0x1255, 0x1257, 0x1259,
57- 0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1},
58- [ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489,
59- 0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1},
60- [ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251,
61- 0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a,
62- 0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1},
63- };
64- static const u16 adie_base_7996[] = {
65- 0x400, 0x1e00, 0x1200
66- };
67- static const u16 adie_base_7992[] = {
68- 0x400, 0x1200, 0x0
69- };
70- static const u16 *adie_offs[__MT_MAX_BAND];
71- static const u16 *eep_offs[__MT_MAX_BAND];
72- static const u16 *adie_base;
73- u8 *eeprom = dev->mt76.eeprom.data;
74- u8 buf[MT7996_EEPROM_BLOCK_SIZE];
75- int adie_id, band, i, ret;
76-
77- switch (mt76_chip(&dev->mt76)) {
78- case 0x7990:
79- adie_base = adie_base_7996;
80- /* adie 0 */
developerd0c89452024-10-11 16:53:27 +080081- if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_VAR_TYPE_233)
developer05f3b2b2024-08-19 19:17:34 +080082- adie_id = ADIE_7975;
83- else
84- adie_id = ADIE_7976;
85- adie_offs[0] = adie_offs_list[adie_id];
86- eep_offs[0] = eep_offs_list[adie_id];
87-
88- /* adie 1 */
developerd0c89452024-10-11 16:53:27 +080089- if (dev->chip_sku == MT7996_VAR_TYPE_444) {
developer05f3b2b2024-08-19 19:17:34 +080090- adie_offs[1] = adie_offs_list[ADIE_7977];
91- eep_offs[1] = eep_offs_list[ADIE_7977];
92- }
93-
94- /* adie 2 */
95- adie_offs[2] = adie_offs_list[ADIE_7977];
96- eep_offs[2] = eep_offs_list[ADIE_7977];
97- break;
98- case 0x7992:
99- adie_base = adie_base_7992;
100- /* adie 0 */
developerd0c89452024-10-11 16:53:27 +0800101- if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
developer05f3b2b2024-08-19 19:17:34 +0800102- dev->fem_type != MT7996_FEM_EXT)
103- adie_id = ADIE_7975;
developerd0c89452024-10-11 16:53:27 +0800104- else if (dev->chip_sku == MT7992_VAR_TYPE_24)
developer05f3b2b2024-08-19 19:17:34 +0800105- adie_id = ADIE_7978;
106- else
107- adie_id = ADIE_7976;
108- adie_offs[0] = adie_offs_list[adie_id];
109- eep_offs[0] = eep_offs_list[adie_id];
110-
111- /* adie 1 */
developerd0c89452024-10-11 16:53:27 +0800112- if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
developer05f3b2b2024-08-19 19:17:34 +0800113- dev->fem_type != MT7996_FEM_INT)
114- adie_id = ADIE_7977;
developerd0c89452024-10-11 16:53:27 +0800115- else if (dev->chip_sku != MT7992_VAR_TYPE_23)
developer05f3b2b2024-08-19 19:17:34 +0800116- adie_id = ADIE_7979;
117- else
118- break;
119- adie_offs[1] = adie_offs_list[adie_id];
120- eep_offs[1] = eep_offs_list[adie_id];
121- break;
122- default:
123- return -EINVAL;
124- }
125-
126- for (band = 0; band < __MT_MAX_BAND; band++) {
127- u16 adie_offset, eep_offset;
128- u32 block_num, prev_block_num = -1;
129-
130- if (!adie_offs[band])
131- continue;
132-
133- for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) {
134- adie_offset = adie_offs[band][i] + adie_base[band];
135- eep_offset = eep_offs[band][i];
136- block_num = adie_offset / MT7996_EEPROM_BLOCK_SIZE;
137-
138- if (adie_offs[band][i] == MT_EE_END_OFFSET)
139- break;
140-
developerd0c89452024-10-11 16:53:27 +0800141- if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_VAR_TYPE_444 &&
developer05f3b2b2024-08-19 19:17:34 +0800142- band == MT_BAND1)
143- eep_offset -= MT_EE_7977BN_OFFSET;
144-
145- if (prev_block_num != block_num) {
146- ret = mt7996_mcu_get_eeprom(dev, adie_offset, buf);
147- if (ret) {
148- if (ret != -EINVAL)
149- return ret;
150-
151- prev_block_num = -1;
152- continue;
153- }
154- }
155-
156- eeprom[eep_offset] = buf[adie_offset % MT7996_EEPROM_BLOCK_SIZE];
157- prev_block_num = block_num;
158- }
159- }
160-
161- return 0;
162-}
163-
164 int mt7996_eeprom_init(struct mt7996_dev *dev)
165 {
166 int ret;
developerd0c89452024-10-11 16:53:27 +0800167@@ -714,10 +574,6 @@ int mt7996_eeprom_init(struct mt7996_dev *dev)
developer05f3b2b2024-08-19 19:17:34 +0800168
169 mt7996_eeprom_load_precal(dev);
170
171- ret = mt7996_apply_cal_free_data(dev);
172- if (ret)
173- return ret;
174-
175 ret = mt7996_eeprom_parse_hw_cap(dev, &dev->phy);
176 if (ret < 0)
177 return ret;
178diff --git a/mt7996/mcu.c b/mt7996/mcu.c
developer1f55fcf2024-10-17 14:52:33 +0800179index 534a362..27dfe29 100644
developer05f3b2b2024-08-19 19:17:34 +0800180--- a/mt7996/mcu.c
181+++ b/mt7996/mcu.c
developerd0c89452024-10-11 16:53:27 +0800182@@ -4603,6 +4603,150 @@ int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag, bool sta)
developer05f3b2b2024-08-19 19:17:34 +0800183 &req, sizeof(req), true);
184 }
185
developer05f3b2b2024-08-19 19:17:34 +0800186+static int mt7996_mcu_set_cal_free_data(struct mt7996_dev *dev)
187+{
188+#define MT_EE_CAL_FREE_MAX_SIZE 30
189+#define MT_EE_7977BN_OFFSET (0x1200 - 0x500)
190+#define MT_EE_END_OFFSET 0xffff
191+ enum adie_type {
192+ ADIE_7975,
193+ ADIE_7976,
194+ ADIE_7977,
195+ ADIE_7978,
196+ ADIE_7979,
197+ };
198+ static const u16 adie_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
199+ [ADIE_7975] = {0x5cd, 0x5cf, 0x5d1, 0x5d3, 0x6c0, 0x6c1, 0x6c2, 0x6c3,
200+ 0x7a1, 0x7a6, 0x7a8, 0x7aa, -1},
201+ [ADIE_7976] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
202+ 0x70, 0x71, 0x790, 0x791, 0x794, 0x795, 0x7a6, 0x7a8, 0x7aa, -1},
203+ [ADIE_7977] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
204+ 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, -1},
205+ [ADIE_7978] = {0x91, 0x95, 0x100, 0x102, 0x104, 0x106, 0x107,
206+ 0x108, 0x109, 0x10a, 0x10b, 0x10c, 0x10e, 0x110, -1},
207+ [ADIE_7979] = {0x4c, 0x4d, 0x4e, 0x4f, 0x50, 0x51, 0x53, 0x55, 0x57, 0x59,
208+ 0x69, 0x6a, 0x7a, 0x7b, 0x7c, 0x7e, 0x80, -1},
209+ };
210+ static const u16 eep_offs_list[][MT_EE_CAL_FREE_MAX_SIZE] = {
211+ [ADIE_7975] = {0x451, 0x453, 0x455, 0x457, 0x44c, 0x44d, 0x44e, 0x44f,
212+ 0xba1, 0xba6, 0xba8, 0xbaa, -1},
213+ [ADIE_7976] = {0x44c, 0x44d, 0x44e, 0x44f, 0x450,
214+ 0x451, 0x453, 0x455, 0x457, 0x459,
215+ 0x470, 0x471, 0xb90, 0xb91, 0xb94, 0xb95,
216+ 0xba6, 0xba8, 0xbaa, -1},
217+ [ADIE_7977] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250,
218+ 0x1251, 0x1253, 0x1255, 0x1257, 0x1259,
219+ 0x1269, 0x126a, 0x127a, 0x127b, 0x127c, 0x127d, 0x127e, -1},
220+ [ADIE_7978] = {0xb91, 0xb95, 0x480, 0x482, 0x484, 0x486, 0x487, 0x488, 0x489,
221+ 0x48a, 0x48b, 0x48c, 0x48e, 0x490, -1},
222+ [ADIE_7979] = {0x124c, 0x124d, 0x124e, 0x124f, 0x1250, 0x1251,
223+ 0x1253, 0x1255, 0x1257, 0x1259, 0x1269, 0x126a,
224+ 0x127a, 0x127b, 0x127c, 0x127e, 0x1280, -1},
225+ };
226+ static const u16 adie_base_7996[] = {
227+ 0x400, 0x1e00, 0x1200
228+ };
229+ static const u16 adie_base_7992[] = {
230+ 0x400, 0x1200, 0x0
231+ };
232+ static const u16 *adie_offs[__MT_MAX_BAND];
233+ static const u16 *eep_offs[__MT_MAX_BAND];
234+ static const u16 *adie_base;
235+ int adie_id, band, i, ret;
236+
237+ switch (mt76_chip(&dev->mt76)) {
238+ case 0x7990:
239+ adie_base = adie_base_7996;
240+ /* adie 0 */
developerd0c89452024-10-11 16:53:27 +0800241+ if (dev->fem_type == MT7996_FEM_INT && dev->chip_sku != MT7996_VAR_TYPE_233)
developer05f3b2b2024-08-19 19:17:34 +0800242+ adie_id = ADIE_7975;
243+ else
244+ adie_id = ADIE_7976;
245+ adie_offs[0] = adie_offs_list[adie_id];
246+ eep_offs[0] = eep_offs_list[adie_id];
247+
248+ /* adie 1 */
developerd0c89452024-10-11 16:53:27 +0800249+ if (dev->chip_sku == MT7996_VAR_TYPE_444) {
developer05f3b2b2024-08-19 19:17:34 +0800250+ adie_offs[1] = adie_offs_list[ADIE_7977];
251+ eep_offs[1] = eep_offs_list[ADIE_7977];
252+ }
253+
254+ /* adie 2 */
255+ adie_offs[2] = adie_offs_list[ADIE_7977];
256+ eep_offs[2] = eep_offs_list[ADIE_7977];
257+ break;
258+ case 0x7992:
259+ adie_base = adie_base_7992;
260+ /* adie 0 */
developerd0c89452024-10-11 16:53:27 +0800261+ if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
developer05f3b2b2024-08-19 19:17:34 +0800262+ dev->fem_type != MT7996_FEM_EXT)
263+ adie_id = ADIE_7975;
developerd0c89452024-10-11 16:53:27 +0800264+ else if (dev->chip_sku == MT7992_VAR_TYPE_24)
developer05f3b2b2024-08-19 19:17:34 +0800265+ adie_id = ADIE_7978;
266+ else
267+ adie_id = ADIE_7976;
268+ adie_offs[0] = adie_offs_list[adie_id];
269+ eep_offs[0] = eep_offs_list[adie_id];
270+
271+ /* adie 1 */
developerd0c89452024-10-11 16:53:27 +0800272+ if (dev->chip_sku == MT7992_VAR_TYPE_44 &&
developer05f3b2b2024-08-19 19:17:34 +0800273+ dev->fem_type != MT7996_FEM_INT)
274+ adie_id = ADIE_7977;
developerd0c89452024-10-11 16:53:27 +0800275+ else if (dev->chip_sku != MT7992_VAR_TYPE_23)
developer05f3b2b2024-08-19 19:17:34 +0800276+ adie_id = ADIE_7979;
277+ else
278+ break;
279+ adie_offs[1] = adie_offs_list[adie_id];
280+ eep_offs[1] = eep_offs_list[adie_id];
281+ break;
282+ default:
283+ return -EINVAL;
284+ }
285+
286+ for (band = 0; band < __MT_MAX_BAND; band++) {
287+ struct {
288+ /* fixed field */
289+ u8 __rsv[4];
290+
291+ __le16 tag;
292+ __le16 len;
293+ __le16 adie_offset;
294+ __le16 eep_offset;
295+ __le16 count;
296+ u8 rsv[2];
297+ } __packed req = {
298+ .tag = cpu_to_le16(UNI_EFUSE_PATCH),
299+ .len = cpu_to_le16(sizeof(req) - 4),
300+ .count = cpu_to_le16(1),
301+ };
302+ u16 adie_offset, eep_offset;
303+
304+ if (!adie_offs[band])
305+ continue;
306+
307+ for (i = 0; i < MT_EE_CAL_FREE_MAX_SIZE; i++) {
308+ adie_offset = adie_offs[band][i] + adie_base[band];
309+ eep_offset = eep_offs[band][i];
310+
311+ if (adie_offs[band][i] == MT_EE_END_OFFSET)
312+ break;
313+
developerd0c89452024-10-11 16:53:27 +0800314+ if (is_mt7996(&dev->mt76) && dev->chip_sku == MT7996_VAR_TYPE_444 &&
developer05f3b2b2024-08-19 19:17:34 +0800315+ band == MT_BAND1)
316+ eep_offset -= MT_EE_7977BN_OFFSET;
317+
318+ req.eep_offset = cpu_to_le16(eep_offset);
319+ req.adie_offset = cpu_to_le16(adie_offset);
320+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
321+ &req, sizeof(req), true);
322+ if (ret)
323+ return ret;
324+ }
325+ }
326+
327+ return 0;
328+}
329+
developerd0c89452024-10-11 16:53:27 +0800330 int mt7996_mcu_set_eeprom_flash(struct mt7996_dev *dev)
developer05f3b2b2024-08-19 19:17:34 +0800331 {
332 #define MAX_PAGE_IDX_MASK GENMASK(7, 5)
developerd0c89452024-10-11 16:53:27 +0800333@@ -4656,12 +4800,17 @@ int mt7996_mcu_set_eeprom(struct mt7996_dev *dev)
334 .buffer_mode = EE_MODE_EFUSE,
335 .format = EE_FORMAT_WHOLE
336 };
developer05f3b2b2024-08-19 19:17:34 +0800337+ int ret;
developerd0c89452024-10-11 16:53:27 +0800338
339 if (dev->flash_mode)
340- return mt7996_mcu_set_eeprom_flash(dev);
developer05f3b2b2024-08-19 19:17:34 +0800341+ ret = mt7996_mcu_set_eeprom_flash(dev);
342+ else
343+ ret = mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
344+ &req, sizeof(req), true);
345+ if (ret)
346+ return ret;
developerd0c89452024-10-11 16:53:27 +0800347
348- return mt76_mcu_send_msg(&dev->mt76, MCU_WM_UNI_CMD(EFUSE_CTRL),
349- &req, sizeof(req), true);
developer05f3b2b2024-08-19 19:17:34 +0800350+ return mt7996_mcu_set_cal_free_data(dev);
developerd0c89452024-10-11 16:53:27 +0800351 }
352
353 int mt7996_mcu_get_eeprom(struct mt7996_dev *dev, u32 offset, u8 *buf, u32 buf_len)
developer05f3b2b2024-08-19 19:17:34 +0800354diff --git a/mt7996/mcu.h b/mt7996/mcu.h
developer1f55fcf2024-10-17 14:52:33 +0800355index 05b29c9..d99e9a6 100644
developer05f3b2b2024-08-19 19:17:34 +0800356--- a/mt7996/mcu.h
357+++ b/mt7996/mcu.h
358@@ -1038,6 +1038,7 @@ enum {
359 UNI_EFUSE_BUFFER_MODE,
360 UNI_EFUSE_FREE_BLOCK,
361 UNI_EFUSE_BUFFER_RD,
362+ UNI_EFUSE_PATCH,
363 };
364
365 enum {
366--
developerd0c89452024-10-11 16:53:27 +08003672.45.2
developer05f3b2b2024-08-19 19:17:34 +0800368