blob: 1f9477c19f64e1a374ec978310eb5e4f8d046674 [file] [log] [blame]
developer05f3b2b2024-08-19 19:17:34 +08001From 4cdf382808962e209db2575b74d5fde2d2e7ac72 Mon Sep 17 00:00:00 2001
developerda18a742023-04-06 13:44:00 +08002From: Evelyn Tsai <evelyn.tsai@mediatek.com>
3Date: Sat, 1 Apr 2023 08:18:17 +0800
developer05f3b2b2024-08-19 19:17:34 +08004Subject: [PATCH 0999/1052] wifi: mt76: mt7915: build pass for Linux Kernel 5.4
developerf9b00212023-07-31 12:27:06 +08005 fixes
developer60a3d662023-02-07 15:24:34 +08006
7---
developerda18a742023-04-06 13:44:00 +08008 debugfs.c | 2 ++
developer753619c2024-02-22 13:42:45 +08009 dma.c | 73 ++++++++++++++++++++++++-----------------------
10 dma.h | 3 +-
11 eeprom.c | 8 +++++-
developerdc9eeae2024-04-08 14:36:46 +080012 mac80211.c | 56 ------------------------------------
developerda18a742023-04-06 13:44:00 +080013 mcu.c | 1 +
developerdc9eeae2024-04-08 14:36:46 +080014 mt76.h | 27 +-----------------
developerda18a742023-04-06 13:44:00 +080015 mt7615/mcu.c | 1 +
16 mt76_connac.h | 2 --
developer753619c2024-02-22 13:42:45 +080017 mt76_connac_mcu.c | 47 +-----------------------------
developerda18a742023-04-06 13:44:00 +080018 mt76_connac_mcu.h | 4 ---
developer753619c2024-02-22 13:42:45 +080019 mt7915/main.c | 25 +++++++---------
developerda18a742023-04-06 13:44:00 +080020 mt7915/mcu.c | 1 +
developer753619c2024-02-22 13:42:45 +080021 usb.c | 43 ++++++++++++++--------------
22 wed.c | 62 +++++++++++++++++++++++++---------------
developerdc9eeae2024-04-08 14:36:46 +080023 15 files changed, 123 insertions(+), 232 deletions(-)
developer60a3d662023-02-07 15:24:34 +080024
developerda18a742023-04-06 13:44:00 +080025diff --git a/debugfs.c b/debugfs.c
developer05f3b2b2024-08-19 19:17:34 +080026index c4649ba0..1c8328d5 100644
developerda18a742023-04-06 13:44:00 +080027--- a/debugfs.c
28+++ b/debugfs.c
29@@ -33,8 +33,10 @@ mt76_napi_threaded_set(void *data, u64 val)
30 if (!mt76_is_mmio(dev))
31 return -EOPNOTSUPP;
32
33+#if 0 /* disable in backport 5.15 */
34 if (dev->napi_dev.threaded != val)
35 return dev_set_threaded(&dev->napi_dev, val);
36+#endif
37
38 return 0;
39 }
developer60a3d662023-02-07 15:24:34 +080040diff --git a/dma.c b/dma.c
developer05f3b2b2024-08-19 19:17:34 +080041index f4f88c44..ccdd5646 100644
developer60a3d662023-02-07 15:24:34 +080042--- a/dma.c
43+++ b/dma.c
developerbd9fa1e2023-10-16 11:04:00 +080044@@ -178,7 +178,7 @@ mt76_free_pending_rxwi(struct mt76_dev *dev)
developer60a3d662023-02-07 15:24:34 +080045 local_bh_disable();
46 while ((t = __mt76_get_rxwi(dev)) != NULL) {
47 if (t->ptr)
48- mt76_put_page_pool_buf(t->ptr, false);
49+ skb_free_frag(t->ptr);
50 kfree(t);
51 }
52 local_bh_enable();
developer753619c2024-02-22 13:42:45 +080053@@ -450,9 +450,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
developer60a3d662023-02-07 15:24:34 +080054 if (!t)
55 return NULL;
56
57- dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr,
58- SKB_WITH_OVERHEAD(q->buf_size),
59- page_pool_get_dma_dir(q->page_pool));
60+ dma_unmap_single(dev->dma_dev, t->dma_addr,
61+ SKB_WITH_OVERHEAD(q->buf_size),
62+ DMA_FROM_DEVICE);
63
64 buf = t->ptr;
65 t->dma_addr = 0;
developer753619c2024-02-22 13:42:45 +080066@@ -462,9 +462,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx,
developer1a173672023-12-21 14:49:33 +080067 if (drop)
68 *drop |= !!(buf1 & MT_DMA_CTL_WO_DROP);
developer60a3d662023-02-07 15:24:34 +080069 } else {
developer60a3d662023-02-07 15:24:34 +080070- dma_sync_single_for_cpu(dev->dma_dev, e->dma_addr[0],
71- SKB_WITH_OVERHEAD(q->buf_size),
72- page_pool_get_dma_dir(q->page_pool));
73+ dma_unmap_single(dev->dma_dev, e->dma_addr[0],
74+ SKB_WITH_OVERHEAD(q->buf_size),
75+ DMA_FROM_DEVICE);
76 }
77
developer1a173672023-12-21 14:49:33 +080078 done:
developera46f6132024-03-26 14:09:54 +080079@@ -631,11 +631,11 @@ free_skb:
developer753619c2024-02-22 13:42:45 +080080 return ret;
developer60a3d662023-02-07 15:24:34 +080081 }
82
developer753619c2024-02-22 13:42:45 +080083-int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q,
84- bool allow_direct)
85+int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q)
developer60a3d662023-02-07 15:24:34 +080086 {
87 int len = SKB_WITH_OVERHEAD(q->buf_size);
88- int frames = 0;
89+ int frames = 0, offset = q->buf_offset;
90+ dma_addr_t addr;
91
92 if (!q->ndesc)
93 return 0;
developera46f6132024-03-26 14:09:54 +080094@@ -643,30 +643,30 @@ int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q,
developer60a3d662023-02-07 15:24:34 +080095 spin_lock_bh(&q->lock);
96
97 while (q->queued < q->ndesc - 1) {
developer1a173672023-12-21 14:49:33 +080098- struct mt76_queue_buf qbuf = {};
developer60a3d662023-02-07 15:24:34 +080099- enum dma_data_direction dir;
developer60a3d662023-02-07 15:24:34 +0800100- dma_addr_t addr;
101- int offset;
developer1a173672023-12-21 14:49:33 +0800102+ struct mt76_queue_buf qbuf;
103 void *buf = NULL;
104
105 if (mt76_queue_is_wed_rro_ind(q))
106 goto done;
developer60a3d662023-02-07 15:24:34 +0800107
108- buf = mt76_get_page_pool_buf(q, &offset, q->buf_size);
109+ buf = page_frag_alloc(&q->rx_page, q->buf_size, GFP_ATOMIC);
110 if (!buf)
111 break;
112
113- addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset;
114- dir = page_pool_get_dma_dir(q->page_pool);
115- dma_sync_single_for_device(dev->dma_dev, addr, len, dir);
116+ addr = dma_map_single(dev->dma_dev, buf, len, DMA_FROM_DEVICE);
117+ if (unlikely(dma_mapping_error(dev->dma_dev, addr))) {
118+ skb_free_frag(buf);
119+ break;
120+ }
121
122- qbuf.addr = addr + q->buf_offset;
developer60a3d662023-02-07 15:24:34 +0800123+ qbuf.addr = addr + offset;
developer1a173672023-12-21 14:49:33 +0800124 done:
125- qbuf.len = len - q->buf_offset;
developer60a3d662023-02-07 15:24:34 +0800126+ qbuf.len = len - offset;
127 qbuf.skip_unmap = false;
128 if (mt76_dma_add_rx_buf(dev, q, &qbuf, buf) < 0) {
129- mt76_put_page_pool_buf(buf, allow_direct);
developer1a173672023-12-21 14:49:33 +0800130- break;
developer60a3d662023-02-07 15:24:34 +0800131+ dma_unmap_single(dev->dma_dev, addr, len,
132+ DMA_FROM_DEVICE);
133+ skb_free_frag(buf);
developer60a3d662023-02-07 15:24:34 +0800134 }
135 frames++;
developer1a173672023-12-21 14:49:33 +0800136 }
developera46f6132024-03-26 14:09:54 +0800137@@ -719,10 +719,6 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
developer60a3d662023-02-07 15:24:34 +0800138 if (!q->entry)
139 return -ENOMEM;
140
141- ret = mt76_create_page_pool(dev, q);
142- if (ret)
143- return ret;
144-
developer753619c2024-02-22 13:42:45 +0800145 ret = mt76_wed_dma_setup(dev, q, false);
developer60a3d662023-02-07 15:24:34 +0800146 if (ret)
147 return ret;
developera46f6132024-03-26 14:09:54 +0800148@@ -741,6 +737,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q,
developer60a3d662023-02-07 15:24:34 +0800149 static void
150 mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
151 {
152+ struct page *page;
153 void *buf;
154 bool more;
155
developera46f6132024-03-26 14:09:54 +0800156@@ -756,7 +753,7 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
developer60a3d662023-02-07 15:24:34 +0800157 break;
158
developer1a173672023-12-21 14:49:33 +0800159 if (!mt76_queue_is_wed_rro(q))
160- mt76_put_page_pool_buf(buf, false);
161+ skb_free_frag(buf);
developer60a3d662023-02-07 15:24:34 +0800162 } while (1);
163
developer1a173672023-12-21 14:49:33 +0800164 spin_lock_bh(&q->lock);
developera46f6132024-03-26 14:09:54 +0800165@@ -766,6 +763,13 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q)
developer60a3d662023-02-07 15:24:34 +0800166 }
167
168 spin_unlock_bh(&q->lock);
169+
170+ if (!q->rx_page.va)
171+ return;
172+
173+ page = virt_to_page(q->rx_page.va);
174+ __page_frag_cache_drain(page, q->rx_page.pagecnt_bias);
175+ memset(&q->rx_page, 0, sizeof(q->rx_page));
176 }
177
178 static void
developera46f6132024-03-26 14:09:54 +0800179@@ -796,7 +800,7 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid)
developer1a173672023-12-21 14:49:33 +0800180 return;
181
182 mt76_dma_sync_idx(dev, q);
183- mt76_dma_rx_fill(dev, q, false);
184+ mt76_dma_rx_fill(dev, q);
developer60a3d662023-02-07 15:24:34 +0800185 }
186
developer1a173672023-12-21 14:49:33 +0800187 static void
developera46f6132024-03-26 14:09:54 +0800188@@ -813,7 +817,7 @@ mt76_add_fragment(struct mt76_dev *dev, struct mt76_queue *q, void *data,
developer60a3d662023-02-07 15:24:34 +0800189
190 skb_add_rx_frag(skb, nr_frags, page, offset, len, q->buf_size);
191 } else {
developer1a173672023-12-21 14:49:33 +0800192- mt76_put_page_pool_buf(data, allow_direct);
developer60a3d662023-02-07 15:24:34 +0800193+ skb_free_frag(data);
194 }
195
196 if (more)
developera46f6132024-03-26 14:09:54 +0800197@@ -883,12 +887,11 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
developerda18a742023-04-06 13:44:00 +0800198 !(dev->drv->rx_check(dev, data, len)))
199 goto free_frag;
200
201- skb = napi_build_skb(data, q->buf_size);
202+ skb = build_skb(data, q->buf_size);
203 if (!skb)
developer60a3d662023-02-07 15:24:34 +0800204 goto free_frag;
205
206 skb_reserve(skb, q->buf_offset);
207- skb_mark_for_recycle(skb);
208
209 *(u32 *)skb->cb = info;
210
developera46f6132024-03-26 14:09:54 +0800211@@ -904,10 +907,10 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget)
developer60a3d662023-02-07 15:24:34 +0800212 continue;
213
214 free_frag:
developer1a173672023-12-21 14:49:33 +0800215- mt76_put_page_pool_buf(data, allow_direct);
developer60a3d662023-02-07 15:24:34 +0800216+ skb_free_frag(data);
217 }
218
219- mt76_dma_rx_fill(dev, q, true);
220+ mt76_dma_rx_fill(dev, q);
221 return done;
222 }
223
developera46f6132024-03-26 14:09:54 +0800224@@ -952,7 +955,7 @@ mt76_dma_init(struct mt76_dev *dev,
developer60a3d662023-02-07 15:24:34 +0800225
226 mt76_for_each_q_rx(dev, i) {
227 netif_napi_add(&dev->napi_dev, &dev->napi[i], poll);
228- mt76_dma_rx_fill(dev, &dev->q_rx[i], false);
229+ mt76_dma_rx_fill(dev, &dev->q_rx[i]);
230 napi_enable(&dev->napi[i]);
231 }
232
developera46f6132024-03-26 14:09:54 +0800233@@ -1007,8 +1010,6 @@ void mt76_dma_cleanup(struct mt76_dev *dev)
developer60a3d662023-02-07 15:24:34 +0800234
235 netif_napi_del(&dev->napi[i]);
236 mt76_dma_rx_cleanup(dev, q);
237-
238- page_pool_destroy(q->page_pool);
239 }
240
developer1a173672023-12-21 14:49:33 +0800241 if (mtk_wed_device_active(&dev->mmio.wed))
developer753619c2024-02-22 13:42:45 +0800242diff --git a/dma.h b/dma.h
developer05f3b2b2024-08-19 19:17:34 +0800243index 1de5a2b2..619dc0fe 100644
developer753619c2024-02-22 13:42:45 +0800244--- a/dma.h
245+++ b/dma.h
246@@ -79,8 +79,7 @@ enum mt76_dma_wed_ind_reason {
247 int mt76_dma_rx_poll(struct napi_struct *napi, int budget);
248 void mt76_dma_attach(struct mt76_dev *dev);
249 void mt76_dma_cleanup(struct mt76_dev *dev);
250-int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q,
251- bool allow_direct);
252+int mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q);
253 void __mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q,
254 bool reset_idx);
255 void mt76_dma_queue_reset(struct mt76_dev *dev, struct mt76_queue *q);
developerda18a742023-04-06 13:44:00 +0800256diff --git a/eeprom.c b/eeprom.c
developer05f3b2b2024-08-19 19:17:34 +0800257index ecd09c03..a2673978 100644
developerda18a742023-04-06 13:44:00 +0800258--- a/eeprom.c
259+++ b/eeprom.c
developer1a173672023-12-21 14:49:33 +0800260@@ -163,9 +163,15 @@ void
developerda18a742023-04-06 13:44:00 +0800261 mt76_eeprom_override(struct mt76_phy *phy)
262 {
263 struct mt76_dev *dev = phy->dev;
264+#ifdef CONFIG_OF
265 struct device_node *np = dev->dev->of_node;
266+ const u8 *mac = NULL;
267
268- of_get_mac_address(np, phy->macaddr);
269+ if (np)
270+ mac = of_get_mac_address(np);
271+ if (!IS_ERR_OR_NULL(mac))
272+ ether_addr_copy(phy->macaddr, mac);
273+#endif
274
275 if (!is_valid_ether_addr(phy->macaddr)) {
276 eth_random_addr(phy->macaddr);
developer60a3d662023-02-07 15:24:34 +0800277diff --git a/mac80211.c b/mac80211.c
developer05f3b2b2024-08-19 19:17:34 +0800278index aee6f1e7..4d50bfae 100644
developer60a3d662023-02-07 15:24:34 +0800279--- a/mac80211.c
280+++ b/mac80211.c
developer05f3b2b2024-08-19 19:17:34 +0800281@@ -578,47 +578,6 @@ void mt76_unregister_phy(struct mt76_phy *phy)
developer60a3d662023-02-07 15:24:34 +0800282 }
283 EXPORT_SYMBOL_GPL(mt76_unregister_phy);
284
285-int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q)
286-{
287- struct page_pool_params pp_params = {
288- .order = 0,
289- .flags = PP_FLAG_PAGE_FRAG,
290- .nid = NUMA_NO_NODE,
291- .dev = dev->dma_dev,
292- };
293- int idx = q - dev->q_rx;
294-
295- switch (idx) {
296- case MT_RXQ_MAIN:
297- case MT_RXQ_BAND1:
298- case MT_RXQ_BAND2:
299- pp_params.pool_size = 256;
300- break;
301- default:
302- pp_params.pool_size = 16;
303- break;
304- }
305-
306- if (mt76_is_mmio(dev)) {
307- /* rely on page_pool for DMA mapping */
308- pp_params.flags |= PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV;
309- pp_params.dma_dir = DMA_FROM_DEVICE;
310- pp_params.max_len = PAGE_SIZE;
311- pp_params.offset = 0;
312- }
313-
314- q->page_pool = page_pool_create(&pp_params);
315- if (IS_ERR(q->page_pool)) {
316- int err = PTR_ERR(q->page_pool);
317-
318- q->page_pool = NULL;
319- return err;
320- }
321-
322- return 0;
323-}
324-EXPORT_SYMBOL_GPL(mt76_create_page_pool);
325-
326 struct mt76_dev *
327 mt76_alloc_device(struct device *pdev, unsigned int size,
328 const struct ieee80211_ops *ops,
developer05f3b2b2024-08-19 19:17:34 +0800329@@ -1818,21 +1777,6 @@ void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi,
developer60a3d662023-02-07 15:24:34 +0800330 }
331 EXPORT_SYMBOL_GPL(mt76_ethtool_worker);
332
333-void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index)
334-{
335-#ifdef CONFIG_PAGE_POOL_STATS
336- struct page_pool_stats stats = {};
337- int i;
338-
339- mt76_for_each_q_rx(dev, i)
340- page_pool_get_stats(dev->q_rx[i].page_pool, &stats);
341-
342- page_pool_ethtool_stats_get(data, &stats);
343- *index += page_pool_ethtool_stats_get_count();
344-#endif
345-}
346-EXPORT_SYMBOL_GPL(mt76_ethtool_page_pool_stats);
347-
348 enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy)
349 {
350 struct ieee80211_hw *hw = phy->hw;
developerda18a742023-04-06 13:44:00 +0800351diff --git a/mcu.c b/mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800352index a8cafa39..fa4b0544 100644
developerda18a742023-04-06 13:44:00 +0800353--- a/mcu.c
354+++ b/mcu.c
355@@ -4,6 +4,7 @@
356 */
357
358 #include "mt76.h"
359+#include <linux/moduleparam.h>
360
361 struct sk_buff *
362 __mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data,
developer60a3d662023-02-07 15:24:34 +0800363diff --git a/mt76.h b/mt76.h
developer05f3b2b2024-08-19 19:17:34 +0800364index 05ee568c..063fc364 100644
developer60a3d662023-02-07 15:24:34 +0800365--- a/mt76.h
366+++ b/mt76.h
developerdc9eeae2024-04-08 14:36:46 +0800367@@ -15,11 +15,6 @@
368 #include <linux/average.h>
369 #include <linux/soc/mediatek/mtk_wed.h>
370 #include <net/mac80211.h>
371-#if LINUX_VERSION_CODE < KERNEL_VERSION(6,6,0)
372-#include <net/page_pool.h>
373-#else
374-#include <net/page_pool/helpers.h>
375-#endif
376 #include "util.h"
377 #include "testmode.h"
378
379@@ -238,7 +233,7 @@ struct mt76_queue {
developer60a3d662023-02-07 15:24:34 +0800380
381 dma_addr_t desc_dma;
382 struct sk_buff *rx_head;
383- struct page_pool *page_pool;
384+ struct page_frag_cache rx_page;
385 };
386
387 struct mt76_mcu_ops {
developerdc9eeae2024-04-08 14:36:46 +0800388@@ -1527,7 +1522,6 @@ mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len,
developer60a3d662023-02-07 15:24:34 +0800389 return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout);
390 }
391
392-void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index);
393 void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi,
394 struct mt76_sta_stats *stats, bool eht);
395 int mt76_skb_adjust_pad(struct sk_buff *skb, int pad);
developer05f3b2b2024-08-19 19:17:34 +0800396@@ -1685,25 +1679,6 @@ void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked);
developer60a3d662023-02-07 15:24:34 +0800397 struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token);
398 int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr,
399 struct mt76_txwi_cache *r, dma_addr_t phys);
400-int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q);
401-static inline void mt76_put_page_pool_buf(void *buf, bool allow_direct)
402-{
403- struct page *page = virt_to_head_page(buf);
404-
405- page_pool_put_full_page(page->pp, page, allow_direct);
406-}
407-
408-static inline void *
409-mt76_get_page_pool_buf(struct mt76_queue *q, u32 *offset, u32 size)
410-{
411- struct page *page;
412-
413- page = page_pool_dev_alloc_frag(q->page_pool, offset, size);
414- if (!page)
415- return NULL;
416-
417- return page_address(page) + *offset;
418-}
419
420 static inline void mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked)
421 {
developerda18a742023-04-06 13:44:00 +0800422diff --git a/mt7615/mcu.c b/mt7615/mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800423index c807bd8d..a9310660 100644
developerda18a742023-04-06 13:44:00 +0800424--- a/mt7615/mcu.c
425+++ b/mt7615/mcu.c
426@@ -10,6 +10,7 @@
427 #include "mcu.h"
428 #include "mac.h"
429 #include "eeprom.h"
430+#include <linux/moduleparam.h>
431
432 static bool prefer_offload_fw = true;
433 module_param(prefer_offload_fw, bool, 0644);
434diff --git a/mt76_connac.h b/mt76_connac.h
developer05f3b2b2024-08-19 19:17:34 +0800435index 5028e49a..5356c52c 100644
developerda18a742023-04-06 13:44:00 +0800436--- a/mt76_connac.h
437+++ b/mt76_connac.h
developer7af0f762023-05-22 15:16:16 +0800438@@ -56,7 +56,6 @@ enum {
developerda18a742023-04-06 13:44:00 +0800439 CMD_CBW_10MHZ,
440 CMD_CBW_5MHZ,
441 CMD_CBW_8080MHZ,
442- CMD_CBW_320MHZ,
443
444 CMD_HE_MCS_BW80 = 0,
445 CMD_HE_MCS_BW160,
developerdc9eeae2024-04-08 14:36:46 +0800446@@ -292,7 +291,6 @@ static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef)
developerda18a742023-04-06 13:44:00 +0800447 [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ,
448 [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ,
449 [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ,
450- [NL80211_CHAN_WIDTH_320] = CMD_CBW_320MHZ,
451 };
452
453 if (chandef->width >= ARRAY_SIZE(width_to_bw))
454diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800455index 4baaaacf..4e84f8d2 100644
developerda18a742023-04-06 13:44:00 +0800456--- a/mt76_connac_mcu.c
457+++ b/mt76_connac_mcu.c
458@@ -4,6 +4,7 @@
459 #include <linux/firmware.h>
460 #include "mt76_connac2_mac.h"
461 #include "mt76_connac_mcu.h"
462+#include <linux/module.h>
463
464 int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option)
465 {
developerdc9eeae2024-04-08 14:36:46 +0800466@@ -1357,40 +1358,6 @@ u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
developerda18a742023-04-06 13:44:00 +0800467 }
468 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode);
469
470-u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif,
471- enum nl80211_band band)
472-{
473- const struct ieee80211_sta_eht_cap *eht_cap;
474- struct ieee80211_supported_band *sband;
475- u8 mode = 0;
476-
477- if (band == NL80211_BAND_6GHZ)
478- mode |= PHY_MODE_AX_6G;
479-
480- sband = phy->hw->wiphy->bands[band];
481- eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type);
482-
developer1a173672023-12-21 14:49:33 +0800483- if (!eht_cap || !eht_cap->has_eht || !vif->bss_conf.eht_support)
developerda18a742023-04-06 13:44:00 +0800484- return mode;
485-
486- switch (band) {
487- case NL80211_BAND_6GHZ:
488- mode |= PHY_MODE_BE_6G;
489- break;
490- case NL80211_BAND_5GHZ:
491- mode |= PHY_MODE_BE_5G;
492- break;
493- case NL80211_BAND_2GHZ:
494- mode |= PHY_MODE_BE_24G;
495- break;
496- default:
497- break;
498- }
499-
500- return mode;
501-}
502-EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext);
503-
504 const struct ieee80211_sta_he_cap *
505 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
506 {
developerdc9eeae2024-04-08 14:36:46 +0800507@@ -1406,18 +1373,6 @@ mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
developerda18a742023-04-06 13:44:00 +0800508 }
509 EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap);
510
511-const struct ieee80211_sta_eht_cap *
512-mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif)
513-{
514- enum nl80211_band band = phy->chandef.chan->band;
515- struct ieee80211_supported_band *sband;
516-
517- sband = phy->hw->wiphy->bands[band];
518-
519- return ieee80211_get_eht_iftype_cap(sband, vif->type);
520-}
521-EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap);
522-
523 #define DEFAULT_HE_PE_DURATION 4
524 #define DEFAULT_HE_DURATION_RTS_THRES 1023
525 static void
526diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
developer05f3b2b2024-08-19 19:17:34 +0800527index e0255a23..abc57f18 100644
developerda18a742023-04-06 13:44:00 +0800528--- a/mt76_connac_mcu.h
529+++ b/mt76_connac_mcu.h
developer05f3b2b2024-08-19 19:17:34 +0800530@@ -1992,12 +1992,8 @@ void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
developerda18a742023-04-06 13:44:00 +0800531
532 const struct ieee80211_sta_he_cap *
533 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);
534-const struct ieee80211_sta_eht_cap *
535-mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif);
536 u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif,
537 enum nl80211_band band, struct ieee80211_sta *sta);
538-u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif,
539- enum nl80211_band band);
540
541 int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif,
542 struct mt76_connac_sta_key_conf *sta_key_conf,
developer60a3d662023-02-07 15:24:34 +0800543diff --git a/mt7915/main.c b/mt7915/main.c
developer05f3b2b2024-08-19 19:17:34 +0800544index 0d2614e1..a3facc9a 100644
developer60a3d662023-02-07 15:24:34 +0800545--- a/mt7915/main.c
546+++ b/mt7915/main.c
developera20cdc22024-05-31 18:57:31 +0800547@@ -1440,22 +1440,20 @@ void mt7915_get_et_strings(struct ieee80211_hw *hw,
developer60a3d662023-02-07 15:24:34 +0800548 struct ieee80211_vif *vif,
549 u32 sset, u8 *data)
550 {
551- if (sset != ETH_SS_STATS)
552- return;
developer60a3d662023-02-07 15:24:34 +0800553+ if (sset == ETH_SS_STATS)
554+ memcpy(data, *mt7915_gstrings_stats,
555+ sizeof(mt7915_gstrings_stats));
developerbd9fa1e2023-10-16 11:04:00 +0800556
557- memcpy(data, mt7915_gstrings_stats, sizeof(mt7915_gstrings_stats));
558- data += sizeof(mt7915_gstrings_stats);
559- page_pool_ethtool_stats_get_strings(data);
developer60a3d662023-02-07 15:24:34 +0800560 }
561
562 static
563 int mt7915_get_et_sset_count(struct ieee80211_hw *hw,
564 struct ieee80211_vif *vif, int sset)
565 {
566- if (sset != ETH_SS_STATS)
567- return 0;
568+ if (sset == ETH_SS_STATS)
569+ return MT7915_SSTATS_LEN;
570
571- return MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count();
572+ return 0;
573 }
574
575 static void mt7915_ethtool_worker(void *wi_data, struct ieee80211_sta *sta)
developera20cdc22024-05-31 18:57:31 +0800576@@ -1483,7 +1481,7 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw,
developer47efbdb2023-06-29 20:33:22 +0800577 .idx = mvif->mt76.idx,
developer60a3d662023-02-07 15:24:34 +0800578 };
developer60a3d662023-02-07 15:24:34 +0800579 /* See mt7915_ampdu_stat_read_phy, etc */
580- int i, ei = 0, stats_size;
581+ int i, ei = 0;
582
583 mutex_lock(&dev->mt76.mutex);
584
developera20cdc22024-05-31 18:57:31 +0800585@@ -1595,12 +1593,9 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw,
developer60a3d662023-02-07 15:24:34 +0800586 return;
587
588 ei += wi.worker_stat_count;
589-
590- mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei);
591-
592- stats_size = MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count();
593- if (ei != stats_size)
594- dev_err(dev->mt76.dev, "ei: %d size: %d", ei, stats_size);
595+ if (ei != MT7915_SSTATS_LEN)
596+ dev_err(dev->mt76.dev, "ei: %d MT7915_SSTATS_LEN: %d",
597+ ei, (int)MT7915_SSTATS_LEN);
598 }
599
600 static void
developerda18a742023-04-06 13:44:00 +0800601diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developer05f3b2b2024-08-19 19:17:34 +0800602index 9126e62f..34323577 100644
developerda18a742023-04-06 13:44:00 +0800603--- a/mt7915/mcu.c
604+++ b/mt7915/mcu.c
605@@ -6,6 +6,7 @@
606 #include "mcu.h"
607 #include "mac.h"
608 #include "eeprom.h"
609+#include <linux/moduleparam.h>
610
611 #define fw_name(_dev, name, ...) ({ \
612 char *_fw; \
developer60a3d662023-02-07 15:24:34 +0800613diff --git a/usb.c b/usb.c
developer05f3b2b2024-08-19 19:17:34 +0800614index 58ff0682..0ca3b069 100644
developer60a3d662023-02-07 15:24:34 +0800615--- a/usb.c
616+++ b/usb.c
developer05f3b2b2024-08-19 19:17:34 +0800617@@ -318,27 +318,29 @@ mt76u_set_endpoints(struct usb_interface *intf,
developer60a3d662023-02-07 15:24:34 +0800618
619 static int
620 mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb,
621- int nsgs)
622+ int nsgs, gfp_t gfp)
623 {
624 int i;
625
626 for (i = 0; i < nsgs; i++) {
627+ struct page *page;
628 void *data;
629 int offset;
630
631- data = mt76_get_page_pool_buf(q, &offset, q->buf_size);
632+ data = page_frag_alloc(&q->rx_page, q->buf_size, gfp);
633 if (!data)
634 break;
635
636- sg_set_page(&urb->sg[i], virt_to_head_page(data), q->buf_size,
637- offset);
638+ page = virt_to_head_page(data);
639+ offset = data - page_address(page);
640+ sg_set_page(&urb->sg[i], page, q->buf_size, offset);
641 }
642
643 if (i < nsgs) {
644 int j;
645
646 for (j = nsgs; j < urb->num_sgs; j++)
647- mt76_put_page_pool_buf(sg_virt(&urb->sg[j]), false);
648+ skb_free_frag(sg_virt(&urb->sg[j]));
649 urb->num_sgs = i;
650 }
651
developer05f3b2b2024-08-19 19:17:34 +0800652@@ -351,16 +353,15 @@ mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb,
developer60a3d662023-02-07 15:24:34 +0800653
654 static int
655 mt76u_refill_rx(struct mt76_dev *dev, struct mt76_queue *q,
656- struct urb *urb, int nsgs)
657+ struct urb *urb, int nsgs, gfp_t gfp)
658 {
659 enum mt76_rxq_id qid = q - &dev->q_rx[MT_RXQ_MAIN];
660- int offset;
661
662 if (qid == MT_RXQ_MAIN && dev->usb.sg_en)
663- return mt76u_fill_rx_sg(dev, q, urb, nsgs);
664+ return mt76u_fill_rx_sg(dev, q, urb, nsgs, gfp);
665
666 urb->transfer_buffer_length = q->buf_size;
667- urb->transfer_buffer = mt76_get_page_pool_buf(q, &offset, q->buf_size);
668+ urb->transfer_buffer = page_frag_alloc(&q->rx_page, q->buf_size, gfp);
669
670 return urb->transfer_buffer ? 0 : -ENOMEM;
671 }
developer05f3b2b2024-08-19 19:17:34 +0800672@@ -398,7 +399,7 @@ mt76u_rx_urb_alloc(struct mt76_dev *dev, struct mt76_queue *q,
developer60a3d662023-02-07 15:24:34 +0800673 if (err)
674 return err;
675
676- return mt76u_refill_rx(dev, q, e->urb, sg_size);
677+ return mt76u_refill_rx(dev, q, e->urb, sg_size, GFP_KERNEL);
678 }
679
680 static void mt76u_urb_free(struct urb *urb)
developer05f3b2b2024-08-19 19:17:34 +0800681@@ -406,10 +407,10 @@ static void mt76u_urb_free(struct urb *urb)
developer60a3d662023-02-07 15:24:34 +0800682 int i;
683
684 for (i = 0; i < urb->num_sgs; i++)
685- mt76_put_page_pool_buf(sg_virt(&urb->sg[i]), false);
686+ skb_free_frag(sg_virt(&urb->sg[i]));
687
688 if (urb->transfer_buffer)
689- mt76_put_page_pool_buf(urb->transfer_buffer, false);
690+ skb_free_frag(urb->transfer_buffer);
691
692 usb_free_urb(urb);
693 }
developer05f3b2b2024-08-19 19:17:34 +0800694@@ -545,8 +546,6 @@ mt76u_process_rx_entry(struct mt76_dev *dev, struct urb *urb,
developer60a3d662023-02-07 15:24:34 +0800695 len -= data_len;
696 nsgs++;
697 }
698-
699- skb_mark_for_recycle(skb);
700 dev->drv->rx_skb(dev, MT_RXQ_MAIN, skb, NULL);
701
702 return nsgs;
developer05f3b2b2024-08-19 19:17:34 +0800703@@ -612,7 +611,7 @@ mt76u_process_rx_queue(struct mt76_dev *dev, struct mt76_queue *q)
developer60a3d662023-02-07 15:24:34 +0800704
705 count = mt76u_process_rx_entry(dev, urb, q->buf_size);
706 if (count > 0) {
707- err = mt76u_refill_rx(dev, q, urb, count);
708+ err = mt76u_refill_rx(dev, q, urb, count, GFP_ATOMIC);
709 if (err < 0)
710 break;
711 }
developer05f3b2b2024-08-19 19:17:34 +0800712@@ -663,10 +662,6 @@ mt76u_alloc_rx_queue(struct mt76_dev *dev, enum mt76_rxq_id qid)
developer60a3d662023-02-07 15:24:34 +0800713 struct mt76_queue *q = &dev->q_rx[qid];
714 int i, err;
715
716- err = mt76_create_page_pool(dev, q);
717- if (err)
718- return err;
719-
720 spin_lock_init(&q->lock);
721 q->entry = devm_kcalloc(dev->dev,
722 MT_NUM_RX_ENTRIES, sizeof(*q->entry),
developer05f3b2b2024-08-19 19:17:34 +0800723@@ -695,6 +690,7 @@ EXPORT_SYMBOL_GPL(mt76u_alloc_mcu_queue);
developer60a3d662023-02-07 15:24:34 +0800724 static void
725 mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q)
726 {
727+ struct page *page;
728 int i;
729
730 for (i = 0; i < q->ndesc; i++) {
developer05f3b2b2024-08-19 19:17:34 +0800731@@ -704,8 +700,13 @@ mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q)
developer60a3d662023-02-07 15:24:34 +0800732 mt76u_urb_free(q->entry[i].urb);
733 q->entry[i].urb = NULL;
734 }
735- page_pool_destroy(q->page_pool);
developerbb6ddff2023-03-08 17:22:32 +0800736- q->page_pool = NULL;
developer60a3d662023-02-07 15:24:34 +0800737+
738+ if (!q->rx_page.va)
739+ return;
740+
741+ page = virt_to_page(q->rx_page.va);
742+ __page_frag_cache_drain(page, q->rx_page.pagecnt_bias);
743+ memset(&q->rx_page, 0, sizeof(q->rx_page));
744 }
745
746 static void mt76u_free_rx(struct mt76_dev *dev)
developer753619c2024-02-22 13:42:45 +0800747diff --git a/wed.c b/wed.c
developer05f3b2b2024-08-19 19:17:34 +0800748index f89e4537..f7a3f1b3 100644
developer753619c2024-02-22 13:42:45 +0800749--- a/wed.c
750+++ b/wed.c
751@@ -9,8 +9,12 @@
752 void mt76_wed_release_rx_buf(struct mtk_wed_device *wed)
753 {
754 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed);
755+ u32 length;
756 int i;
757
758+ length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size +
759+ sizeof(struct skb_shared_info));
760+
761 for (i = 0; i < dev->rx_token_size; i++) {
762 struct mt76_txwi_cache *t;
763
764@@ -18,7 +22,9 @@ void mt76_wed_release_rx_buf(struct mtk_wed_device *wed)
765 if (!t || !t->ptr)
766 continue;
767
768- mt76_put_page_pool_buf(t->ptr, false);
769+ dma_unmap_single(dev->dma_dev, t->dma_addr,
770+ wed->wlan.rx_size, DMA_FROM_DEVICE);
771+ __free_pages(virt_to_page(t->ptr), get_order(length));
772 t->ptr = NULL;
773
774 mt76_put_rxwi(dev, t);
775@@ -33,39 +39,51 @@ u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
776 {
777 struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed);
778 struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc;
779- struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN];
780- int i, len = SKB_WITH_OVERHEAD(q->buf_size);
781- struct mt76_txwi_cache *t = NULL;
782+ u32 length;
783+ int i;
784+
785+ length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size +
786+ sizeof(struct skb_shared_info));
787
788 for (i = 0; i < size; i++) {
789- enum dma_data_direction dir;
790- dma_addr_t addr;
791- u32 offset;
792+ struct mt76_txwi_cache *t = mt76_get_rxwi(dev);
793+ dma_addr_t phy_addr;
794+ struct page *page;
795 int token;
796- void *buf;
797+ void *ptr;
798
799- t = mt76_get_rxwi(dev);
800 if (!t)
801 goto unmap;
802
803- buf = mt76_get_page_pool_buf(q, &offset, q->buf_size);
804- if (!buf)
805+ page = __dev_alloc_pages(GFP_KERNEL, get_order(length));
806+ if (!page) {
807+ mt76_put_rxwi(dev, t);
808 goto unmap;
809+ }
810
811- addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset;
812- dir = page_pool_get_dma_dir(q->page_pool);
813- dma_sync_single_for_device(dev->dma_dev, addr, len, dir);
814+ ptr = page_address(page);
815+ phy_addr = dma_map_single(dev->dma_dev, ptr,
816+ wed->wlan.rx_size,
817+ DMA_TO_DEVICE);
818+ if (unlikely(dma_mapping_error(dev->dev, phy_addr))) {
819+ __free_pages(page, get_order(length));
820+ mt76_put_rxwi(dev, t);
821+ goto unmap;
822+ }
823
824- desc->buf0 = cpu_to_le32(addr);
825- token = mt76_rx_token_consume(dev, buf, t, addr);
826+ desc->buf0 = cpu_to_le32(phy_addr);
827+ token = mt76_rx_token_consume(dev, ptr, t, phy_addr);
828 if (token < 0) {
829- mt76_put_page_pool_buf(buf, false);
830+ dma_unmap_single(dev->dma_dev, phy_addr,
831+ wed->wlan.rx_size, DMA_TO_DEVICE);
832+ __free_pages(page, get_order(length));
833+ mt76_put_rxwi(dev, t);
834 goto unmap;
835 }
836
837 token = FIELD_PREP(MT_DMA_CTL_TOKEN, token);
838 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
839- token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32);
840+ token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, phy_addr >> 32);
841 #endif
842 desc->token |= cpu_to_le32(token);
843 desc++;
844@@ -74,8 +92,6 @@ u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
845 return 0;
846
847 unmap:
848- if (t)
849- mt76_put_rxwi(dev, t);
850 mt76_wed_release_rx_buf(wed);
851
852 return -ENOMEM;
853@@ -123,7 +139,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
854 /* WED txfree queue needs ring to be initialized before setup */
855 q->flags = 0;
856 mt76_dma_queue_reset(dev, q);
857- mt76_dma_rx_fill(dev, q, false);
858+ mt76_dma_rx_fill(dev, q);
859
860 ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs);
861 if (!ret)
862@@ -144,7 +160,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
863 break;
864 case MT76_WED_RRO_Q_MSDU_PG:
865 q->flags &= ~MT_QFLAG_WED;
866- __mt76_dma_queue_reset(dev, q, false);
867+ __mt76_dma_queue_reset(dev, q);
868 mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs);
869 q->head = q->ndesc - 1;
870 q->queued = q->head;
871@@ -152,7 +168,7 @@ int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
872 case MT76_WED_RRO_Q_IND:
873 q->flags &= ~MT_QFLAG_WED;
874 mt76_dma_queue_reset(dev, q);
875- mt76_dma_rx_fill(dev, q, false);
876+ mt76_dma_rx_fill(dev, q);
877 mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs);
878 break;
879 default:
developer60a3d662023-02-07 15:24:34 +0800880--
developerbd9fa1e2023-10-16 11:04:00 +08008812.18.0
developer60a3d662023-02-07 15:24:34 +0800882