developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 1 | From f44a5ec67a8f6d1117284c4d6db718da4f0f2617 Mon Sep 17 00:00:00 2001 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 2 | From: Evelyn Tsai <evelyn.tsai@mediatek.com> |
| 3 | Date: Sat, 1 Apr 2023 08:18:17 +0800 |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 4 | Subject: [PATCH 11/76] wifi: mt76: mt7915: build pass for Linux Kernel 5.4 |
developer | f9b0021 | 2023-07-31 12:27:06 +0800 | [diff] [blame] | 5 | fixes |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 6 | |
| 7 | --- |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 8 | debugfs.c | 2 ++ |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 9 | dma.c | 77 ++++++++++++++++++++++++----------------------- |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 10 | eeprom.c | 8 ++++- |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 11 | mac80211.c | 57 ----------------------------------- |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 12 | mcu.c | 1 + |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 13 | mmio.c | 56 ++++++++++++++++++++++------------ |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 14 | mt76.h | 22 +------------- |
| 15 | mt7615/mcu.c | 1 + |
| 16 | mt76_connac.h | 2 -- |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 17 | mt76_connac_mcu.c | 47 +---------------------------- |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 18 | mt76_connac_mcu.h | 4 --- |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 19 | mt7915/main.c | 25 ++++++--------- |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 20 | mt7915/mcu.c | 1 + |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 21 | usb.c | 43 +++++++++++++------------- |
| 22 | 14 files changed, 121 insertions(+), 225 deletions(-) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 23 | |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 24 | diff --git a/debugfs.c b/debugfs.c |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 25 | index c4649ba..1c8328d 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 26 | --- a/debugfs.c |
| 27 | +++ b/debugfs.c |
| 28 | @@ -33,8 +33,10 @@ mt76_napi_threaded_set(void *data, u64 val) |
| 29 | if (!mt76_is_mmio(dev)) |
| 30 | return -EOPNOTSUPP; |
| 31 | |
| 32 | +#if 0 /* disable in backport 5.15 */ |
| 33 | if (dev->napi_dev.threaded != val) |
| 34 | return dev_set_threaded(&dev->napi_dev, val); |
| 35 | +#endif |
| 36 | |
| 37 | return 0; |
| 38 | } |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 39 | diff --git a/dma.c b/dma.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 40 | index 00230f1..9eb2b8f 100644 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 41 | --- a/dma.c |
| 42 | +++ b/dma.c |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 43 | @@ -178,7 +178,7 @@ mt76_free_pending_rxwi(struct mt76_dev *dev) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 44 | local_bh_disable(); |
| 45 | while ((t = __mt76_get_rxwi(dev)) != NULL) { |
| 46 | if (t->ptr) |
| 47 | - mt76_put_page_pool_buf(t->ptr, false); |
| 48 | + skb_free_frag(t->ptr); |
| 49 | kfree(t); |
| 50 | } |
| 51 | local_bh_enable(); |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 52 | @@ -452,9 +452,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 53 | if (!t) |
| 54 | return NULL; |
| 55 | |
| 56 | - dma_sync_single_for_cpu(dev->dma_dev, t->dma_addr, |
| 57 | - SKB_WITH_OVERHEAD(q->buf_size), |
| 58 | - page_pool_get_dma_dir(q->page_pool)); |
| 59 | + dma_unmap_single(dev->dma_dev, t->dma_addr, |
| 60 | + SKB_WITH_OVERHEAD(q->buf_size), |
| 61 | + DMA_FROM_DEVICE); |
| 62 | |
| 63 | buf = t->ptr; |
| 64 | t->dma_addr = 0; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 65 | @@ -464,9 +464,9 @@ mt76_dma_get_buf(struct mt76_dev *dev, struct mt76_queue *q, int idx, |
| 66 | if (drop) |
| 67 | *drop |= !!(buf1 & MT_DMA_CTL_WO_DROP); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 68 | } else { |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 69 | - dma_sync_single_for_cpu(dev->dma_dev, e->dma_addr[0], |
| 70 | - SKB_WITH_OVERHEAD(q->buf_size), |
| 71 | - page_pool_get_dma_dir(q->page_pool)); |
| 72 | + dma_unmap_single(dev->dma_dev, e->dma_addr[0], |
| 73 | + SKB_WITH_OVERHEAD(q->buf_size), |
| 74 | + DMA_FROM_DEVICE); |
| 75 | } |
| 76 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 77 | done: |
| 78 | @@ -633,11 +633,11 @@ free_skb: |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 79 | } |
| 80 | |
| 81 | static int |
| 82 | -mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, |
| 83 | - bool allow_direct) |
| 84 | +mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q) |
| 85 | { |
| 86 | int len = SKB_WITH_OVERHEAD(q->buf_size); |
| 87 | - int frames = 0; |
| 88 | + int frames = 0, offset = q->buf_offset; |
| 89 | + dma_addr_t addr; |
| 90 | |
| 91 | if (!q->ndesc) |
| 92 | return 0; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 93 | @@ -645,30 +645,30 @@ mt76_dma_rx_fill(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 94 | spin_lock_bh(&q->lock); |
| 95 | |
| 96 | while (q->queued < q->ndesc - 1) { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 97 | - struct mt76_queue_buf qbuf = {}; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 98 | - enum dma_data_direction dir; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 99 | - dma_addr_t addr; |
| 100 | - int offset; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 101 | + struct mt76_queue_buf qbuf; |
| 102 | void *buf = NULL; |
| 103 | |
| 104 | if (mt76_queue_is_wed_rro_ind(q)) |
| 105 | goto done; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 106 | |
| 107 | - buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); |
| 108 | + buf = page_frag_alloc(&q->rx_page, q->buf_size, GFP_ATOMIC); |
| 109 | if (!buf) |
| 110 | break; |
| 111 | |
| 112 | - addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; |
| 113 | - dir = page_pool_get_dma_dir(q->page_pool); |
| 114 | - dma_sync_single_for_device(dev->dma_dev, addr, len, dir); |
| 115 | + addr = dma_map_single(dev->dma_dev, buf, len, DMA_FROM_DEVICE); |
| 116 | + if (unlikely(dma_mapping_error(dev->dma_dev, addr))) { |
| 117 | + skb_free_frag(buf); |
| 118 | + break; |
| 119 | + } |
| 120 | |
| 121 | - qbuf.addr = addr + q->buf_offset; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 122 | + qbuf.addr = addr + offset; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 123 | done: |
| 124 | - qbuf.len = len - q->buf_offset; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 125 | + qbuf.len = len - offset; |
| 126 | qbuf.skip_unmap = false; |
| 127 | if (mt76_dma_add_rx_buf(dev, q, &qbuf, buf) < 0) { |
| 128 | - mt76_put_page_pool_buf(buf, allow_direct); |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 129 | - break; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 130 | + dma_unmap_single(dev->dma_dev, addr, len, |
| 131 | + DMA_FROM_DEVICE); |
| 132 | + skb_free_frag(buf); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 133 | } |
| 134 | frames++; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 135 | } |
| 136 | @@ -711,7 +711,7 @@ int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 137 | /* WED txfree queue needs ring to be initialized before setup */ |
| 138 | q->flags = 0; |
| 139 | mt76_dma_queue_reset(dev, q); |
| 140 | - mt76_dma_rx_fill(dev, q, false); |
| 141 | + mt76_dma_rx_fill(dev, q); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 142 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 143 | ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs); |
| 144 | if (!ret) |
| 145 | @@ -740,7 +740,7 @@ int mt76_dma_wed_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset) |
| 146 | case MT76_WED_RRO_Q_IND: |
| 147 | q->flags &= ~MT_QFLAG_WED; |
| 148 | mt76_dma_queue_reset(dev, q); |
| 149 | - mt76_dma_rx_fill(dev, q, false); |
| 150 | + mt76_dma_rx_fill(dev, q); |
| 151 | mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs); |
| 152 | break; |
| 153 | default: |
| 154 | @@ -796,10 +796,6 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 155 | if (!q->entry) |
| 156 | return -ENOMEM; |
| 157 | |
| 158 | - ret = mt76_create_page_pool(dev, q); |
| 159 | - if (ret) |
| 160 | - return ret; |
| 161 | - |
| 162 | ret = mt76_dma_wed_setup(dev, q, false); |
| 163 | if (ret) |
| 164 | return ret; |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 165 | @@ -818,6 +814,7 @@ mt76_dma_alloc_queue(struct mt76_dev *dev, struct mt76_queue *q, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 166 | static void |
| 167 | mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) |
| 168 | { |
| 169 | + struct page *page; |
| 170 | void *buf; |
| 171 | bool more; |
| 172 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 173 | @@ -833,7 +830,7 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 174 | break; |
| 175 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 176 | if (!mt76_queue_is_wed_rro(q)) |
| 177 | - mt76_put_page_pool_buf(buf, false); |
| 178 | + skb_free_frag(buf); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 179 | } while (1); |
| 180 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 181 | spin_lock_bh(&q->lock); |
| 182 | @@ -843,6 +840,13 @@ mt76_dma_rx_cleanup(struct mt76_dev *dev, struct mt76_queue *q) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 183 | } |
| 184 | |
| 185 | spin_unlock_bh(&q->lock); |
| 186 | + |
| 187 | + if (!q->rx_page.va) |
| 188 | + return; |
| 189 | + |
| 190 | + page = virt_to_page(q->rx_page.va); |
| 191 | + __page_frag_cache_drain(page, q->rx_page.pagecnt_bias); |
| 192 | + memset(&q->rx_page, 0, sizeof(q->rx_page)); |
| 193 | } |
| 194 | |
| 195 | static void |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 196 | @@ -873,7 +877,7 @@ mt76_dma_rx_reset(struct mt76_dev *dev, enum mt76_rxq_id qid) |
| 197 | return; |
| 198 | |
| 199 | mt76_dma_sync_idx(dev, q); |
| 200 | - mt76_dma_rx_fill(dev, q, false); |
| 201 | + mt76_dma_rx_fill(dev, q); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 202 | } |
| 203 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 204 | static void |
| 205 | @@ -890,7 +894,7 @@ mt76_add_fragment(struct mt76_dev *dev, struct mt76_queue *q, void *data, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 206 | |
| 207 | skb_add_rx_frag(skb, nr_frags, page, offset, len, q->buf_size); |
| 208 | } else { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 209 | - mt76_put_page_pool_buf(data, allow_direct); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 210 | + skb_free_frag(data); |
| 211 | } |
| 212 | |
| 213 | if (more) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 214 | @@ -960,12 +964,11 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget) |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 215 | !(dev->drv->rx_check(dev, data, len))) |
| 216 | goto free_frag; |
| 217 | |
| 218 | - skb = napi_build_skb(data, q->buf_size); |
| 219 | + skb = build_skb(data, q->buf_size); |
| 220 | if (!skb) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 221 | goto free_frag; |
| 222 | |
| 223 | skb_reserve(skb, q->buf_offset); |
| 224 | - skb_mark_for_recycle(skb); |
| 225 | |
| 226 | *(u32 *)skb->cb = info; |
| 227 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 228 | @@ -981,10 +984,10 @@ mt76_dma_rx_process(struct mt76_dev *dev, struct mt76_queue *q, int budget) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 229 | continue; |
| 230 | |
| 231 | free_frag: |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 232 | - mt76_put_page_pool_buf(data, allow_direct); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 233 | + skb_free_frag(data); |
| 234 | } |
| 235 | |
| 236 | - mt76_dma_rx_fill(dev, q, true); |
| 237 | + mt76_dma_rx_fill(dev, q); |
| 238 | return done; |
| 239 | } |
| 240 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 241 | @@ -1029,7 +1032,7 @@ mt76_dma_init(struct mt76_dev *dev, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 242 | |
| 243 | mt76_for_each_q_rx(dev, i) { |
| 244 | netif_napi_add(&dev->napi_dev, &dev->napi[i], poll); |
| 245 | - mt76_dma_rx_fill(dev, &dev->q_rx[i], false); |
| 246 | + mt76_dma_rx_fill(dev, &dev->q_rx[i]); |
| 247 | napi_enable(&dev->napi[i]); |
| 248 | } |
| 249 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 250 | @@ -1098,8 +1101,6 @@ void mt76_dma_cleanup(struct mt76_dev *dev) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 251 | |
| 252 | netif_napi_del(&dev->napi[i]); |
| 253 | mt76_dma_rx_cleanup(dev, q); |
| 254 | - |
| 255 | - page_pool_destroy(q->page_pool); |
| 256 | } |
| 257 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 258 | if (mtk_wed_device_active(&dev->mmio.wed)) |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 259 | diff --git a/eeprom.c b/eeprom.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 260 | index ecd09c0..a267397 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 261 | --- a/eeprom.c |
| 262 | +++ b/eeprom.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 263 | @@ -163,9 +163,15 @@ void |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 264 | mt76_eeprom_override(struct mt76_phy *phy) |
| 265 | { |
| 266 | struct mt76_dev *dev = phy->dev; |
| 267 | +#ifdef CONFIG_OF |
| 268 | struct device_node *np = dev->dev->of_node; |
| 269 | + const u8 *mac = NULL; |
| 270 | |
| 271 | - of_get_mac_address(np, phy->macaddr); |
| 272 | + if (np) |
| 273 | + mac = of_get_mac_address(np); |
| 274 | + if (!IS_ERR_OR_NULL(mac)) |
| 275 | + ether_addr_copy(phy->macaddr, mac); |
| 276 | +#endif |
| 277 | |
| 278 | if (!is_valid_ether_addr(phy->macaddr)) { |
| 279 | eth_random_addr(phy->macaddr); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 280 | diff --git a/mac80211.c b/mac80211.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 281 | index 6c5b4f5..259b448 100644 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 282 | --- a/mac80211.c |
| 283 | +++ b/mac80211.c |
| 284 | @@ -4,7 +4,6 @@ |
| 285 | */ |
| 286 | #include <linux/sched.h> |
| 287 | #include <linux/of.h> |
| 288 | -#include <net/page_pool.h> |
| 289 | #include "mt76.h" |
| 290 | |
| 291 | #define CHAN2G(_idx, _freq) { \ |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 292 | @@ -578,47 +577,6 @@ void mt76_unregister_phy(struct mt76_phy *phy) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 293 | } |
| 294 | EXPORT_SYMBOL_GPL(mt76_unregister_phy); |
| 295 | |
| 296 | -int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q) |
| 297 | -{ |
| 298 | - struct page_pool_params pp_params = { |
| 299 | - .order = 0, |
| 300 | - .flags = PP_FLAG_PAGE_FRAG, |
| 301 | - .nid = NUMA_NO_NODE, |
| 302 | - .dev = dev->dma_dev, |
| 303 | - }; |
| 304 | - int idx = q - dev->q_rx; |
| 305 | - |
| 306 | - switch (idx) { |
| 307 | - case MT_RXQ_MAIN: |
| 308 | - case MT_RXQ_BAND1: |
| 309 | - case MT_RXQ_BAND2: |
| 310 | - pp_params.pool_size = 256; |
| 311 | - break; |
| 312 | - default: |
| 313 | - pp_params.pool_size = 16; |
| 314 | - break; |
| 315 | - } |
| 316 | - |
| 317 | - if (mt76_is_mmio(dev)) { |
| 318 | - /* rely on page_pool for DMA mapping */ |
| 319 | - pp_params.flags |= PP_FLAG_DMA_MAP | PP_FLAG_DMA_SYNC_DEV; |
| 320 | - pp_params.dma_dir = DMA_FROM_DEVICE; |
| 321 | - pp_params.max_len = PAGE_SIZE; |
| 322 | - pp_params.offset = 0; |
| 323 | - } |
| 324 | - |
| 325 | - q->page_pool = page_pool_create(&pp_params); |
| 326 | - if (IS_ERR(q->page_pool)) { |
| 327 | - int err = PTR_ERR(q->page_pool); |
| 328 | - |
| 329 | - q->page_pool = NULL; |
| 330 | - return err; |
| 331 | - } |
| 332 | - |
| 333 | - return 0; |
| 334 | -} |
| 335 | -EXPORT_SYMBOL_GPL(mt76_create_page_pool); |
| 336 | - |
| 337 | struct mt76_dev * |
| 338 | mt76_alloc_device(struct device *pdev, unsigned int size, |
| 339 | const struct ieee80211_ops *ops, |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 340 | @@ -1818,21 +1776,6 @@ void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 341 | } |
| 342 | EXPORT_SYMBOL_GPL(mt76_ethtool_worker); |
| 343 | |
| 344 | -void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index) |
| 345 | -{ |
| 346 | -#ifdef CONFIG_PAGE_POOL_STATS |
| 347 | - struct page_pool_stats stats = {}; |
| 348 | - int i; |
| 349 | - |
| 350 | - mt76_for_each_q_rx(dev, i) |
| 351 | - page_pool_get_stats(dev->q_rx[i].page_pool, &stats); |
| 352 | - |
| 353 | - page_pool_ethtool_stats_get(data, &stats); |
| 354 | - *index += page_pool_ethtool_stats_get_count(); |
| 355 | -#endif |
| 356 | -} |
| 357 | -EXPORT_SYMBOL_GPL(mt76_ethtool_page_pool_stats); |
| 358 | - |
| 359 | enum mt76_dfs_state mt76_phy_dfs_state(struct mt76_phy *phy) |
| 360 | { |
| 361 | struct ieee80211_hw *hw = phy->hw; |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 362 | diff --git a/mcu.c b/mcu.c |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 363 | index a8cafa3..fa4b054 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 364 | --- a/mcu.c |
| 365 | +++ b/mcu.c |
| 366 | @@ -4,6 +4,7 @@ |
| 367 | */ |
| 368 | |
| 369 | #include "mt76.h" |
| 370 | +#include <linux/moduleparam.h> |
| 371 | |
| 372 | struct sk_buff * |
| 373 | __mt76_mcu_msg_alloc(struct mt76_dev *dev, const void *data, |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 374 | diff --git a/mmio.c b/mmio.c |
| 375 | index c3e0e23..6e25a14 100644 |
| 376 | --- a/mmio.c |
| 377 | +++ b/mmio.c |
| 378 | @@ -89,8 +89,12 @@ EXPORT_SYMBOL_GPL(mt76_set_irq_mask); |
| 379 | void mt76_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) |
| 380 | { |
| 381 | struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); |
| 382 | + u32 length; |
| 383 | int i; |
| 384 | |
| 385 | + length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size + |
| 386 | + sizeof(struct skb_shared_info)); |
| 387 | + |
| 388 | for (i = 0; i < dev->rx_token_size; i++) { |
| 389 | struct mt76_txwi_cache *t; |
| 390 | |
| 391 | @@ -98,7 +102,9 @@ void mt76_mmio_wed_release_rx_buf(struct mtk_wed_device *wed) |
| 392 | if (!t || !t->ptr) |
| 393 | continue; |
| 394 | |
| 395 | - mt76_put_page_pool_buf(t->ptr, false); |
| 396 | + dma_unmap_single(dev->dma_dev, t->dma_addr, |
| 397 | + wed->wlan.rx_size, DMA_FROM_DEVICE); |
| 398 | + __free_pages(virt_to_page(t->ptr), get_order(length)); |
| 399 | t->ptr = NULL; |
| 400 | |
| 401 | mt76_put_rxwi(dev, t); |
| 402 | @@ -112,39 +118,51 @@ u32 mt76_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
| 403 | { |
| 404 | struct mt76_dev *dev = container_of(wed, struct mt76_dev, mmio.wed); |
| 405 | struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc; |
| 406 | - struct mt76_queue *q = &dev->q_rx[MT_RXQ_MAIN]; |
| 407 | - int i, len = SKB_WITH_OVERHEAD(q->buf_size); |
| 408 | - struct mt76_txwi_cache *t = NULL; |
| 409 | + u32 length; |
| 410 | + int i; |
| 411 | + |
| 412 | + length = SKB_DATA_ALIGN(NET_SKB_PAD + wed->wlan.rx_size + |
| 413 | + sizeof(struct skb_shared_info)); |
| 414 | |
| 415 | for (i = 0; i < size; i++) { |
| 416 | - enum dma_data_direction dir; |
| 417 | - dma_addr_t addr; |
| 418 | - u32 offset; |
| 419 | + struct mt76_txwi_cache *t = mt76_get_rxwi(dev); |
| 420 | + dma_addr_t phy_addr; |
| 421 | + struct page *page; |
| 422 | int token; |
| 423 | - void *buf; |
| 424 | + void *ptr; |
| 425 | |
| 426 | - t = mt76_get_rxwi(dev); |
| 427 | if (!t) |
| 428 | goto unmap; |
| 429 | |
| 430 | - buf = mt76_get_page_pool_buf(q, &offset, q->buf_size); |
| 431 | - if (!buf) |
| 432 | + page = __dev_alloc_pages(GFP_KERNEL, get_order(length)); |
| 433 | + if (!page) { |
| 434 | + mt76_put_rxwi(dev, t); |
| 435 | goto unmap; |
| 436 | + } |
| 437 | |
| 438 | - addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset; |
| 439 | - dir = page_pool_get_dma_dir(q->page_pool); |
| 440 | - dma_sync_single_for_device(dev->dma_dev, addr, len, dir); |
| 441 | + ptr = page_address(page); |
| 442 | + phy_addr = dma_map_single(dev->dma_dev, ptr, |
| 443 | + wed->wlan.rx_size, |
| 444 | + DMA_TO_DEVICE); |
| 445 | + if (unlikely(dma_mapping_error(dev->dev, phy_addr))) { |
| 446 | + __free_pages(page, get_order(length)); |
| 447 | + mt76_put_rxwi(dev, t); |
| 448 | + goto unmap; |
| 449 | + } |
| 450 | |
| 451 | - desc->buf0 = cpu_to_le32(addr); |
| 452 | - token = mt76_rx_token_consume(dev, buf, t, addr); |
| 453 | + desc->buf0 = cpu_to_le32(phy_addr); |
| 454 | + token = mt76_rx_token_consume(dev, ptr, t, phy_addr); |
| 455 | if (token < 0) { |
| 456 | - mt76_put_page_pool_buf(buf, false); |
| 457 | + dma_unmap_single(dev->dma_dev, phy_addr, |
| 458 | + wed->wlan.rx_size, DMA_TO_DEVICE); |
| 459 | + __free_pages(page, get_order(length)); |
| 460 | + mt76_put_rxwi(dev, t); |
| 461 | goto unmap; |
| 462 | } |
| 463 | |
| 464 | token = FIELD_PREP(MT_DMA_CTL_TOKEN, token); |
| 465 | #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT |
| 466 | - token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32); |
| 467 | + token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, phy_addr >> 32); |
| 468 | #endif |
| 469 | desc->token |= cpu_to_le32(token); |
| 470 | desc++; |
| 471 | @@ -153,8 +171,6 @@ u32 mt76_mmio_wed_init_rx_buf(struct mtk_wed_device *wed, int size) |
| 472 | return 0; |
| 473 | |
| 474 | unmap: |
| 475 | - if (t) |
| 476 | - mt76_put_rxwi(dev, t); |
| 477 | mt76_mmio_wed_release_rx_buf(wed); |
| 478 | |
| 479 | return -ENOMEM; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 480 | diff --git a/mt76.h b/mt76.h |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 481 | index 580891f..c644647 100644 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 482 | --- a/mt76.h |
| 483 | +++ b/mt76.h |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 484 | @@ -232,7 +232,7 @@ struct mt76_queue { |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 485 | |
| 486 | dma_addr_t desc_dma; |
| 487 | struct sk_buff *rx_head; |
| 488 | - struct page_pool *page_pool; |
| 489 | + struct page_frag_cache rx_page; |
| 490 | }; |
| 491 | |
| 492 | struct mt76_mcu_ops { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 493 | @@ -1508,7 +1508,6 @@ mt76u_bulk_msg(struct mt76_dev *dev, void *data, int len, int *actual_len, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 494 | return usb_bulk_msg(udev, pipe, data, len, actual_len, timeout); |
| 495 | } |
| 496 | |
| 497 | -void mt76_ethtool_page_pool_stats(struct mt76_dev *dev, u64 *data, int *index); |
| 498 | void mt76_ethtool_worker(struct mt76_ethtool_worker_info *wi, |
| 499 | struct mt76_sta_stats *stats, bool eht); |
| 500 | int mt76_skb_adjust_pad(struct sk_buff *skb, int pad); |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 501 | @@ -1653,25 +1652,6 @@ void __mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 502 | struct mt76_txwi_cache *mt76_rx_token_release(struct mt76_dev *dev, int token); |
| 503 | int mt76_rx_token_consume(struct mt76_dev *dev, void *ptr, |
| 504 | struct mt76_txwi_cache *r, dma_addr_t phys); |
| 505 | -int mt76_create_page_pool(struct mt76_dev *dev, struct mt76_queue *q); |
| 506 | -static inline void mt76_put_page_pool_buf(void *buf, bool allow_direct) |
| 507 | -{ |
| 508 | - struct page *page = virt_to_head_page(buf); |
| 509 | - |
| 510 | - page_pool_put_full_page(page->pp, page, allow_direct); |
| 511 | -} |
| 512 | - |
| 513 | -static inline void * |
| 514 | -mt76_get_page_pool_buf(struct mt76_queue *q, u32 *offset, u32 size) |
| 515 | -{ |
| 516 | - struct page *page; |
| 517 | - |
| 518 | - page = page_pool_dev_alloc_frag(q->page_pool, offset, size); |
| 519 | - if (!page) |
| 520 | - return NULL; |
| 521 | - |
| 522 | - return page_address(page) + *offset; |
| 523 | -} |
| 524 | |
| 525 | static inline void mt76_set_tx_blocked(struct mt76_dev *dev, bool blocked) |
| 526 | { |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 527 | diff --git a/mt7615/mcu.c b/mt7615/mcu.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 528 | index ae34d01..c9444c6 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 529 | --- a/mt7615/mcu.c |
| 530 | +++ b/mt7615/mcu.c |
| 531 | @@ -10,6 +10,7 @@ |
| 532 | #include "mcu.h" |
| 533 | #include "mac.h" |
| 534 | #include "eeprom.h" |
| 535 | +#include <linux/moduleparam.h> |
| 536 | |
| 537 | static bool prefer_offload_fw = true; |
| 538 | module_param(prefer_offload_fw, bool, 0644); |
| 539 | diff --git a/mt76_connac.h b/mt76_connac.h |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 540 | index fdde3d7..6c8a453 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 541 | --- a/mt76_connac.h |
| 542 | +++ b/mt76_connac.h |
developer | 7af0f76 | 2023-05-22 15:16:16 +0800 | [diff] [blame] | 543 | @@ -56,7 +56,6 @@ enum { |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 544 | CMD_CBW_10MHZ, |
| 545 | CMD_CBW_5MHZ, |
| 546 | CMD_CBW_8080MHZ, |
| 547 | - CMD_CBW_320MHZ, |
| 548 | |
| 549 | CMD_HE_MCS_BW80 = 0, |
| 550 | CMD_HE_MCS_BW160, |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 551 | @@ -275,7 +274,6 @@ static inline u8 mt76_connac_chan_bw(struct cfg80211_chan_def *chandef) |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 552 | [NL80211_CHAN_WIDTH_10] = CMD_CBW_10MHZ, |
| 553 | [NL80211_CHAN_WIDTH_20] = CMD_CBW_20MHZ, |
| 554 | [NL80211_CHAN_WIDTH_20_NOHT] = CMD_CBW_20MHZ, |
| 555 | - [NL80211_CHAN_WIDTH_320] = CMD_CBW_320MHZ, |
| 556 | }; |
| 557 | |
| 558 | if (chandef->width >= ARRAY_SIZE(width_to_bw)) |
| 559 | diff --git a/mt76_connac_mcu.c b/mt76_connac_mcu.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 560 | index 91000b8..eea6831 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 561 | --- a/mt76_connac_mcu.c |
| 562 | +++ b/mt76_connac_mcu.c |
| 563 | @@ -4,6 +4,7 @@ |
| 564 | #include <linux/firmware.h> |
| 565 | #include "mt76_connac2_mac.h" |
| 566 | #include "mt76_connac_mcu.h" |
| 567 | +#include <linux/module.h> |
| 568 | |
| 569 | int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) |
| 570 | { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 571 | @@ -1347,40 +1348,6 @@ u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 572 | } |
| 573 | EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); |
| 574 | |
| 575 | -u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, |
| 576 | - enum nl80211_band band) |
| 577 | -{ |
| 578 | - const struct ieee80211_sta_eht_cap *eht_cap; |
| 579 | - struct ieee80211_supported_band *sband; |
| 580 | - u8 mode = 0; |
| 581 | - |
| 582 | - if (band == NL80211_BAND_6GHZ) |
| 583 | - mode |= PHY_MODE_AX_6G; |
| 584 | - |
| 585 | - sband = phy->hw->wiphy->bands[band]; |
| 586 | - eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); |
| 587 | - |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 588 | - if (!eht_cap || !eht_cap->has_eht || !vif->bss_conf.eht_support) |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 589 | - return mode; |
| 590 | - |
| 591 | - switch (band) { |
| 592 | - case NL80211_BAND_6GHZ: |
| 593 | - mode |= PHY_MODE_BE_6G; |
| 594 | - break; |
| 595 | - case NL80211_BAND_5GHZ: |
| 596 | - mode |= PHY_MODE_BE_5G; |
| 597 | - break; |
| 598 | - case NL80211_BAND_2GHZ: |
| 599 | - mode |= PHY_MODE_BE_24G; |
| 600 | - break; |
| 601 | - default: |
| 602 | - break; |
| 603 | - } |
| 604 | - |
| 605 | - return mode; |
| 606 | -} |
| 607 | -EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext); |
| 608 | - |
| 609 | const struct ieee80211_sta_he_cap * |
| 610 | mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) |
| 611 | { |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 612 | @@ -1396,18 +1363,6 @@ mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 613 | } |
| 614 | EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); |
| 615 | |
| 616 | -const struct ieee80211_sta_eht_cap * |
| 617 | -mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) |
| 618 | -{ |
| 619 | - enum nl80211_band band = phy->chandef.chan->band; |
| 620 | - struct ieee80211_supported_band *sband; |
| 621 | - |
| 622 | - sband = phy->hw->wiphy->bands[band]; |
| 623 | - |
| 624 | - return ieee80211_get_eht_iftype_cap(sband, vif->type); |
| 625 | -} |
| 626 | -EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap); |
| 627 | - |
| 628 | #define DEFAULT_HE_PE_DURATION 4 |
| 629 | #define DEFAULT_HE_DURATION_RTS_THRES 1023 |
| 630 | static void |
| 631 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 632 | index 84e77fa..5308ddc 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 633 | --- a/mt76_connac_mcu.h |
| 634 | +++ b/mt76_connac_mcu.h |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 635 | @@ -1970,12 +1970,8 @@ void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val); |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 636 | |
| 637 | const struct ieee80211_sta_he_cap * |
| 638 | mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); |
| 639 | -const struct ieee80211_sta_eht_cap * |
| 640 | -mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif); |
| 641 | u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, |
| 642 | enum nl80211_band band, struct ieee80211_sta *sta); |
| 643 | -u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_vif *vif, |
| 644 | - enum nl80211_band band); |
| 645 | |
| 646 | int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, |
| 647 | struct mt76_connac_sta_key_conf *sta_key_conf, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 648 | diff --git a/mt7915/main.c b/mt7915/main.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 649 | index 3cf459d..fea1fea 100644 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 650 | --- a/mt7915/main.c |
| 651 | +++ b/mt7915/main.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 652 | @@ -1413,22 +1413,20 @@ void mt7915_get_et_strings(struct ieee80211_hw *hw, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 653 | struct ieee80211_vif *vif, |
| 654 | u32 sset, u8 *data) |
| 655 | { |
| 656 | - if (sset != ETH_SS_STATS) |
| 657 | - return; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 658 | + if (sset == ETH_SS_STATS) |
| 659 | + memcpy(data, *mt7915_gstrings_stats, |
| 660 | + sizeof(mt7915_gstrings_stats)); |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 661 | |
| 662 | - memcpy(data, mt7915_gstrings_stats, sizeof(mt7915_gstrings_stats)); |
| 663 | - data += sizeof(mt7915_gstrings_stats); |
| 664 | - page_pool_ethtool_stats_get_strings(data); |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 665 | } |
| 666 | |
| 667 | static |
| 668 | int mt7915_get_et_sset_count(struct ieee80211_hw *hw, |
| 669 | struct ieee80211_vif *vif, int sset) |
| 670 | { |
| 671 | - if (sset != ETH_SS_STATS) |
| 672 | - return 0; |
| 673 | + if (sset == ETH_SS_STATS) |
| 674 | + return MT7915_SSTATS_LEN; |
| 675 | |
| 676 | - return MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count(); |
| 677 | + return 0; |
| 678 | } |
| 679 | |
| 680 | static void mt7915_ethtool_worker(void *wi_data, struct ieee80211_sta *sta) |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 681 | @@ -1456,7 +1454,7 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, |
developer | 47efbdb | 2023-06-29 20:33:22 +0800 | [diff] [blame] | 682 | .idx = mvif->mt76.idx, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 683 | }; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 684 | /* See mt7915_ampdu_stat_read_phy, etc */ |
| 685 | - int i, ei = 0, stats_size; |
| 686 | + int i, ei = 0; |
| 687 | |
| 688 | mutex_lock(&dev->mt76.mutex); |
| 689 | |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 690 | @@ -1568,12 +1566,9 @@ void mt7915_get_et_stats(struct ieee80211_hw *hw, |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 691 | return; |
| 692 | |
| 693 | ei += wi.worker_stat_count; |
| 694 | - |
| 695 | - mt76_ethtool_page_pool_stats(&dev->mt76, &data[ei], &ei); |
| 696 | - |
| 697 | - stats_size = MT7915_SSTATS_LEN + page_pool_ethtool_stats_get_count(); |
| 698 | - if (ei != stats_size) |
| 699 | - dev_err(dev->mt76.dev, "ei: %d size: %d", ei, stats_size); |
| 700 | + if (ei != MT7915_SSTATS_LEN) |
| 701 | + dev_err(dev->mt76.dev, "ei: %d MT7915_SSTATS_LEN: %d", |
| 702 | + ei, (int)MT7915_SSTATS_LEN); |
| 703 | } |
| 704 | |
| 705 | static void |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 706 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
developer | 1a17367 | 2023-12-21 14:49:33 +0800 | [diff] [blame^] | 707 | index 6cd6ad1..ccd08ed 100644 |
developer | da18a74 | 2023-04-06 13:44:00 +0800 | [diff] [blame] | 708 | --- a/mt7915/mcu.c |
| 709 | +++ b/mt7915/mcu.c |
| 710 | @@ -6,6 +6,7 @@ |
| 711 | #include "mcu.h" |
| 712 | #include "mac.h" |
| 713 | #include "eeprom.h" |
| 714 | +#include <linux/moduleparam.h> |
| 715 | |
| 716 | #define fw_name(_dev, name, ...) ({ \ |
| 717 | char *_fw; \ |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 718 | diff --git a/usb.c b/usb.c |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 719 | index 5e5c7bf..3e28171 100644 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 720 | --- a/usb.c |
| 721 | +++ b/usb.c |
| 722 | @@ -319,27 +319,29 @@ mt76u_set_endpoints(struct usb_interface *intf, |
| 723 | |
| 724 | static int |
| 725 | mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb, |
| 726 | - int nsgs) |
| 727 | + int nsgs, gfp_t gfp) |
| 728 | { |
| 729 | int i; |
| 730 | |
| 731 | for (i = 0; i < nsgs; i++) { |
| 732 | + struct page *page; |
| 733 | void *data; |
| 734 | int offset; |
| 735 | |
| 736 | - data = mt76_get_page_pool_buf(q, &offset, q->buf_size); |
| 737 | + data = page_frag_alloc(&q->rx_page, q->buf_size, gfp); |
| 738 | if (!data) |
| 739 | break; |
| 740 | |
| 741 | - sg_set_page(&urb->sg[i], virt_to_head_page(data), q->buf_size, |
| 742 | - offset); |
| 743 | + page = virt_to_head_page(data); |
| 744 | + offset = data - page_address(page); |
| 745 | + sg_set_page(&urb->sg[i], page, q->buf_size, offset); |
| 746 | } |
| 747 | |
| 748 | if (i < nsgs) { |
| 749 | int j; |
| 750 | |
| 751 | for (j = nsgs; j < urb->num_sgs; j++) |
| 752 | - mt76_put_page_pool_buf(sg_virt(&urb->sg[j]), false); |
| 753 | + skb_free_frag(sg_virt(&urb->sg[j])); |
| 754 | urb->num_sgs = i; |
| 755 | } |
| 756 | |
| 757 | @@ -352,16 +354,15 @@ mt76u_fill_rx_sg(struct mt76_dev *dev, struct mt76_queue *q, struct urb *urb, |
| 758 | |
| 759 | static int |
| 760 | mt76u_refill_rx(struct mt76_dev *dev, struct mt76_queue *q, |
| 761 | - struct urb *urb, int nsgs) |
| 762 | + struct urb *urb, int nsgs, gfp_t gfp) |
| 763 | { |
| 764 | enum mt76_rxq_id qid = q - &dev->q_rx[MT_RXQ_MAIN]; |
| 765 | - int offset; |
| 766 | |
| 767 | if (qid == MT_RXQ_MAIN && dev->usb.sg_en) |
| 768 | - return mt76u_fill_rx_sg(dev, q, urb, nsgs); |
| 769 | + return mt76u_fill_rx_sg(dev, q, urb, nsgs, gfp); |
| 770 | |
| 771 | urb->transfer_buffer_length = q->buf_size; |
| 772 | - urb->transfer_buffer = mt76_get_page_pool_buf(q, &offset, q->buf_size); |
| 773 | + urb->transfer_buffer = page_frag_alloc(&q->rx_page, q->buf_size, gfp); |
| 774 | |
| 775 | return urb->transfer_buffer ? 0 : -ENOMEM; |
| 776 | } |
| 777 | @@ -399,7 +400,7 @@ mt76u_rx_urb_alloc(struct mt76_dev *dev, struct mt76_queue *q, |
| 778 | if (err) |
| 779 | return err; |
| 780 | |
| 781 | - return mt76u_refill_rx(dev, q, e->urb, sg_size); |
| 782 | + return mt76u_refill_rx(dev, q, e->urb, sg_size, GFP_KERNEL); |
| 783 | } |
| 784 | |
| 785 | static void mt76u_urb_free(struct urb *urb) |
| 786 | @@ -407,10 +408,10 @@ static void mt76u_urb_free(struct urb *urb) |
| 787 | int i; |
| 788 | |
| 789 | for (i = 0; i < urb->num_sgs; i++) |
| 790 | - mt76_put_page_pool_buf(sg_virt(&urb->sg[i]), false); |
| 791 | + skb_free_frag(sg_virt(&urb->sg[i])); |
| 792 | |
| 793 | if (urb->transfer_buffer) |
| 794 | - mt76_put_page_pool_buf(urb->transfer_buffer, false); |
| 795 | + skb_free_frag(urb->transfer_buffer); |
| 796 | |
| 797 | usb_free_urb(urb); |
| 798 | } |
| 799 | @@ -546,8 +547,6 @@ mt76u_process_rx_entry(struct mt76_dev *dev, struct urb *urb, |
| 800 | len -= data_len; |
| 801 | nsgs++; |
| 802 | } |
| 803 | - |
| 804 | - skb_mark_for_recycle(skb); |
| 805 | dev->drv->rx_skb(dev, MT_RXQ_MAIN, skb, NULL); |
| 806 | |
| 807 | return nsgs; |
| 808 | @@ -613,7 +612,7 @@ mt76u_process_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) |
| 809 | |
| 810 | count = mt76u_process_rx_entry(dev, urb, q->buf_size); |
| 811 | if (count > 0) { |
| 812 | - err = mt76u_refill_rx(dev, q, urb, count); |
| 813 | + err = mt76u_refill_rx(dev, q, urb, count, GFP_ATOMIC); |
| 814 | if (err < 0) |
| 815 | break; |
| 816 | } |
| 817 | @@ -664,10 +663,6 @@ mt76u_alloc_rx_queue(struct mt76_dev *dev, enum mt76_rxq_id qid) |
| 818 | struct mt76_queue *q = &dev->q_rx[qid]; |
| 819 | int i, err; |
| 820 | |
| 821 | - err = mt76_create_page_pool(dev, q); |
| 822 | - if (err) |
| 823 | - return err; |
| 824 | - |
| 825 | spin_lock_init(&q->lock); |
| 826 | q->entry = devm_kcalloc(dev->dev, |
| 827 | MT_NUM_RX_ENTRIES, sizeof(*q->entry), |
| 828 | @@ -696,6 +691,7 @@ EXPORT_SYMBOL_GPL(mt76u_alloc_mcu_queue); |
| 829 | static void |
| 830 | mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) |
| 831 | { |
| 832 | + struct page *page; |
| 833 | int i; |
| 834 | |
| 835 | for (i = 0; i < q->ndesc; i++) { |
developer | bb6ddff | 2023-03-08 17:22:32 +0800 | [diff] [blame] | 836 | @@ -705,8 +701,13 @@ mt76u_free_rx_queue(struct mt76_dev *dev, struct mt76_queue *q) |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 837 | mt76u_urb_free(q->entry[i].urb); |
| 838 | q->entry[i].urb = NULL; |
| 839 | } |
| 840 | - page_pool_destroy(q->page_pool); |
developer | bb6ddff | 2023-03-08 17:22:32 +0800 | [diff] [blame] | 841 | - q->page_pool = NULL; |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 842 | + |
| 843 | + if (!q->rx_page.va) |
| 844 | + return; |
| 845 | + |
| 846 | + page = virt_to_page(q->rx_page.va); |
| 847 | + __page_frag_cache_drain(page, q->rx_page.pagecnt_bias); |
| 848 | + memset(&q->rx_page, 0, sizeof(q->rx_page)); |
| 849 | } |
| 850 | |
| 851 | static void mt76u_free_rx(struct mt76_dev *dev) |
| 852 | -- |
developer | bd9fa1e | 2023-10-16 11:04:00 +0800 | [diff] [blame] | 853 | 2.18.0 |
developer | 60a3d66 | 2023-02-07 15:24:34 +0800 | [diff] [blame] | 854 | |