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git01.mediatek.com / filogic / atf / e5cf16b64af1c5cdc792cc7a650956b3f850ce64 / include / arch / aarch64
  1. fcb716f Merge "feat(pauth): add/modify helpers to support QARMA3" into integration by Manish Pandey · Thu Sep 22 11:59:39 2022 +0200
  2. d4e2503 feat(gic): add APIs to raise NS and S-EL1 SGIs by Florian Lugou · Wed Sep 08 12:40:24 2021 +0200
  3. be3f7d0 Merge changes from topic "ffa_el3_spmc" into integration by Olivier Deprez · Wed Aug 24 16:31:01 2022 +0200
  4. 6b4ec24 feat(tsp): add FF-A support to the TSP by Achin Gupta · Mon Oct 04 20:13:36 2021 +0100
  5. e089a17 feat(pauth): add/modify helpers to support QARMA3 by Juan Pablo Conde · Wed Jun 29 17:44:43 2022 -0400
  6. 42305f2 feat(rng-trap): add EL3 support for FEAT_RNG_TRAP by Juan Pablo Conde · Tue Jul 12 16:40:29 2022 -0400
  7. a793ccc feat(trbe): add trbe under feature detection mechanism by Jayanth Dodderi Chidanand · Thu May 19 14:08:28 2022 +0100
  8. 6931675 feat(brbe): add brbe under feature detection mechanism by Jayanth Dodderi Chidanand · Mon May 09 12:33:03 2022 +0100
  9. 423045d fix(include/aarch64): fix encodings for MPAMVPM* registers by Varun Wadekar · Wed May 25 12:45:22 2022 +0100
  10. 67259f8 Merge "fix(errata): workaround for Cortex-A710 erratum 2008768" into integration by Bipin Ravi · Tue May 10 22:49:06 2022 +0200
  11. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · Tue May 10 15:55:05 2022 +0200
  12. 7d52a8f fix(errata): workaround for Cortex-A710 erratum 2008768 by johpow01 · Wed Mar 09 16:23:04 2022 -0600
  13. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · Fri Jan 28 17:06:20 2022 -0600
  14. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
  15. 9461a89 refactor(el3-runtime): add arch-features detection mechanism by Jayanth Dodderi Chidanand · Mon Jan 17 18:57:17 2022 +0000
  16. 0824b45 feat(bl2): add support to separate no-loadable sections by Jiafei Pan · Thu Feb 24 10:47:33 2022 +0800
  17. 48e6b57 fix(gpt_rme): rework delegating/undelegating sequence by Robert Wakim · Thu Oct 21 15:39:56 2021 +0100
  18. 60786e7 test(el3-runtime): dit is retained on world switch by Daniel Boulby · Fri Oct 22 11:37:34 2021 +0100
  19. 928747f fix(el3-runtime): set unset pstate bits to default by Daniel Boulby · Tue May 25 18:09:34 2021 +0100
  20. 74b7e44 feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX by johpow01 · Wed Dec 01 13:18:30 2021 -0600
  21. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  22. 9bcd147 Merge "refactor(fvp_r): remove unused files and clean up makefiles" into integration by Manish Pandey · Fri Oct 29 18:48:52 2021 +0200
  23. 0033b25 refactor(fvp_r): remove unused files and clean up makefiles by johpow01 · Mon Oct 11 14:51:11 2021 -0500
  24. 03be39d feat(mpmm): add support for MPMM by Chris Kay · Wed May 05 13:38:30 2021 +0100
  25. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · Tue May 25 12:33:18 2021 +0100
  26. a5fde28 refactor(amu): factor out register accesses by Chris Kay · Wed May 26 11:58:23 2021 +0100
  27. b0d69e8 fix(pie): invalidate data cache in the entire image range if PIE is enabled by Zelalem Aweke · Fri Oct 15 17:25:52 2021 -0500
  28. 88fb9af Merge "feat(fvp_r): configure system registers to boot rich OS" into integration by Joanna Farley · Thu Oct 07 18:14:43 2021 +0200
  29. 5693afe feat(fvp_r): configure system registers to boot rich OS by Manish Pandey · Wed Oct 06 17:28:09 2021 +0100
  30. 9d13402 refactor(gpt): productize and refactor GPT library by johpow01 · Wed Jun 16 17:57:28 2021 -0500
  31. 13dc8f1 feat(rme): add RMM dispatcher (RMMD) by Zelalem Aweke · Fri Jul 09 14:20:03 2021 -0500
  32. 688fbf7 feat(rme): run BL2 in root world when FEAT_RME is enabled by Zelalem Aweke · Fri Jul 09 11:37:10 2021 -0500
  33. 79e3d29 feat(rme): add register definitions and helper functions for FEAT_RME by Zelalem Aweke · Thu Jul 08 16:51:14 2021 -0500
  34. 56f1e3e fvp_r: load, auth, and transfer from BL1 to BL33 by laurenw-arm · Wed Mar 03 14:19:38 2021 -0600
  35. 3d7f654 chore: fvp_r: Initial No-EL3 and MPU Implementation by Gary Morrison · Wed Jan 27 13:08:47 2021 -0600
  36. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  37. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · Sun Jul 18 02:26:27 2021 +0100
  38. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · Wed Jul 07 16:27:10 2021 +0100
  39. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  40. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  41. dd8af68 Merge "fix(sdei): set SPSR for SDEI based on TakeException" into integration by Manish Pandey · Mon Jul 26 11:15:30 2021 +0200
  42. c79c3e9 Merge "refactor(aarch64): remove `FEAT_BTI` architecture check" into integration by Joanna Farley · Sat Jul 24 18:38:19 2021 +0200
  43. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · Wed Nov 25 16:36:46 2020 +0000
  44. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  45. b4ba2b3 refactor(aarch64): remove `FEAT_BTI` architecture check by Chris Kay · Tue Mar 09 16:01:38 2021 +0000
  46. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  47. 592a479 Merge changes from topic "dcc_console" into integration by Madhukar Pappireddy · Tue Apr 13 21:42:55 2021 +0200
  48. f80014d drivers: dcc: Support JTAG DCC console by Venkatesh Yadav Abbarapu · Fri Nov 27 02:58:24 2020 -0700
  49. 08fec33 arch: Enable `FEAT_SB` for supported non-Armv8.5-A platforms by Chris Kay · Tue Mar 09 13:34:35 2021 +0000
  50. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  51. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · Wed Oct 28 15:34:12 2020 +0000
  52. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  53. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · Thu Dec 03 13:08:02 2020 +0000
  54. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  55. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · Wed Nov 25 14:07:05 2020 +0000
  56. 5c29cba aarch64/arm: Add compiler barrier to barrier instructions by Andre Przywara · Fri Oct 16 18:19:03 2020 +0100
  57. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  58. bde5c95 Add wrapper for AT instruction by Manish V Badarkhe · Tue Jul 14 14:43:12 2020 +0100
  59. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  60. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  61. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  62. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  63. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  64. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  65. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  66. 5dc9e9c Fix compilation error when ENABLE_PIE=1 by Varun Wadekar · Sat May 16 20:59:30 2020 -0700
  67. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  68. 2bae35f SPMD: code/comments cleanup by Olivier Deprez · Thu Apr 16 13:39:06 2020 +0200
  69. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · Wed Oct 30 14:24:39 2019 -0500
  70. 019b4f8 locks: bakery: use is_dcache_enabled() helper by Masahiro Yamada · Thu Apr 02 15:35:19 2020 +0900
  71. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · Fri Mar 20 14:21:05 2020 -0500
  72. 8a6e961 Add get_current_el_maybe_constant() by Masahiro Yamada · Thu Mar 26 13:18:48 2020 +0900
  73. 442f0df Merge "Use Speculation Barrier instruction for v8.5 cores" into integration by Mark Dykes · Thu Mar 12 14:32:13 2020 +0000
  74. bfe7bb6 Use Speculation Barrier instruction for v8.5 cores by Madhukar Pappireddy · Tue Mar 10 18:04:59 2020 -0500
  75. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · Tue Mar 03 13:31:58 2020 +0000
  76. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  77. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  78. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · Mon Jun 18 16:15:51 2018 -0700
  79. b8f26e9 Make PAC demangling more generic by Alexei Fedorov · Thu Feb 06 17:11:03 2020 +0000
  80. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  81. 31a14e1 bl31: Split into two separate memory regions by Samuel Holland · Wed Oct 17 21:40:18 2018 -0500
  82. eb1e7e4 Merge changes from topic "aa/sel2_support" into integration by Olivier Deprez · Fri Dec 13 16:26:32 2019 +0000
  83. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · Tue Nov 26 11:34:17 2019 +0000
  84. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  85. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  86. add24a4 Explicitly disable the SPME bit in MDCR_EL3 by Petre-Ionut Tudor · Thu Oct 03 17:09:08 2019 +0100
  87. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · Mon May 27 09:32:00 2019 +0200
  88. 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · Fri Sep 13 15:22:23 2019 +0000
  89. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  90. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · Tue Aug 20 15:33:27 2019 +0800
  91. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · Thu Sep 12 12:31:22 2019 +0000
  92. 83e0488 Add UBSAN support and handlers by Justin Chadwell · Tue Aug 20 11:01:52 2019 +0100
  93. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  94. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · Fri Aug 23 11:26:57 2019 +0000
  95. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  96. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · Mon Jul 29 17:22:53 2019 +0100
  97. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  98. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · Thu Jul 25 09:13:49 2019 +0000
  99. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · Tue Jul 23 11:12:41 2019 +0100
  100. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · Tue Jul 23 08:55:10 2019 +0000