1. cd38e6e cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · 6 years ago
  2. 2b91412 cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · 6 years ago
  3. 4daa1de DSU erratum 936184 workaround by John Tsichritzis · 6 years ago
  4. f7f6041 Merge pull request #1450 from MISL-EBU-System-SW/marvell-support-v6 by danh-arm · 6 years ago
  5. 9eb5cf4 lib: cpu: Add L2 cache aux control register definition to CA72 by Konstantin Porotchkin · 6 years ago
  6. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · 7 years ago
  7. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · 7 years ago
  8. 26b8589 Remove integrity check in declare_cpu_ops_base by Roberto Vargas · 7 years ago
  9. 67762d9 Remove .struct directive by Roberto Vargas · 7 years ago
  10. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 6 years ago
  11. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 7 years ago
  12. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · 7 years ago
  13. ea84d6b Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 7 years ago
  14. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  15. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  16. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  17. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  18. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  19. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  20. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  21. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · 7 years ago
  22. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 7 years ago
  23. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 7 years ago
  24. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · 7 years ago
  25. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · 7 years ago
  26. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 7 years ago
  27. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 7 years ago
  28. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  29. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  30. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 7 years ago
  31. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  32. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  33. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  34. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  35. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  36. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  37. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  38. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  39. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  40. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  41. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · 7 years ago
  42. ac838c5 aarch32: Fix L2CTRL definition for Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  43. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  44. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  45. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  46. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  47. 9326b90 Cortex-A53: add some bit definitions by Haojian Zhuang · 7 years ago
  48. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  49. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 8 years ago
  50. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 8 years ago
  51. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  52. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  53. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  54. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  55. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  56. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  57. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  58. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  59. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  60. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  61. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  62. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  63. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  64. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  65. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  66. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  67. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  68. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  69. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  70. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  71. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  72. 29a7a03 Juno R2: Configure the correct L2 RAM latency values by Sandrine Bailleux · 9 years ago
  73. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 9 years ago
  74. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  75. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  76. ea59668 Add header guards to asm macro files by Dan Handley · 10 years ago
  77. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  78. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  79. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  80. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  81. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  82. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago