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filogic
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atf
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d09845c4d1960937d41c89ab97361a4ce9391bd8
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plat
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xilinx
42d6f39
feat(plat/xilinx/zynqmp): add support for runtime feature config
by Ronak Jain
· Wed Aug 11 00:26:28 2021 -0700
26a8bb2
feat(plat/xilinx/zynqmp): sync IOCTL IDs
by Ronak Jain
· Sun Jun 27 22:31:20 2021 -0700
bc2a99c
Merge "feat(plat/versal): add support for SLS mitigation" into integration
by Madhukar Pappireddy
· Fri Aug 13 17:22:12 2021 +0200
efa1d32
revert(plat/xilinx): add timeout while waiting for IPI Ack
by Venkatesh Yadav Abbarapu
· Wed Aug 04 21:33:15 2021 -0600
82252a4
feat(plat/versal): add support for SLS mitigation
by Venkatesh Yadav Abbarapu
· Tue Jul 20 22:27:32 2021 -0600
7ae761b
fix(plat/xilinx/versal): use sync method for blocking calls
by Abhyuday Godhasara
· Thu Jun 24 05:50:44 2021 -0700
0d9b765
fix(plat/xilinx/zynqmp): use sync method for blocking calls
by Abhyuday Godhasara
· Thu Jun 24 05:49:04 2021 -0700
66a0ca3
Merge "feat(plat/zynqmp): extend DT description by TF-A" into integration
by Madhukar Pappireddy
· Wed Jul 07 16:08:51 2021 +0200
d4740e4
refactor(plat/zynqmp): optimize the code to save some space
by Venkatesh Yadav Abbarapu
· Thu Jun 17 00:23:52 2021 -0600
53865b0
feat(plat/zynqmp): extend DT description by TF-A
by Michal Simek
· Thu May 27 09:42:37 2021 +0200
e1407fc
feat(plat/zynqmp): add SDEI support
by Jan Kiszka
· Tue Jul 14 22:36:59 2020 +0200
fcfdaf0
feat(plat/zynqmp): add support for XCK26 silicon
by Venkatesh Yadav Abbarapu
· Wed Apr 21 21:54:48 2021 -0600
1885bf1
fix(plat/xilinx/versal/include): correct IPI buffer offset
by Rajan Vaja
· Tue Apr 20 02:53:01 2021 -0700
aa4898a
plat: send an sgi to communicate to linux
by Venkatesh Yadav Abbarapu
· Wed Mar 31 03:07:40 2021 -0600
abf6122
plat: xilinx: Error management support
by Shubhrajyoti Datta
· Wed Mar 17 23:01:17 2021 +0530
466670b
Merge "plat: xilinx: zynqmp: Configure counter frequency during initialization" into integration
by Manish Pandey
· Wed Apr 21 16:48:32 2021 +0200
12be18b
plat: xilinx: zynqmp: Configure counter frequency during initialization
by Rajan Vaja
· Fri Mar 26 04:16:36 2021 -0700
78bcd12
plat: xilinx: versal: Add the IPI CRC checksum macro support
by Venkatesh Yadav Abbarapu
· Fri Feb 19 01:46:21 2021 -0700
bfa2a2a
plat: xilinx: common: Rename the IPI CRC checksum macro
by Venkatesh Yadav Abbarapu
· Fri Feb 19 01:40:14 2021 -0700
17a12ce
plat:xilinx:versal: Add JTAG DCC support
by Venkatesh Yadav Abbarapu
· Fri Nov 27 08:42:14 2020 -0700
34fbf1f
plat:xilinx:zynqmp: Add JTAG DCC support
by Venkatesh Yadav Abbarapu
· Fri Nov 27 04:45:01 2020 -0700
18072da
plat: xilinx: versal: Mark IPI calls secure/non-secure
by Tejas Patel
· Thu Feb 25 20:16:56 2021 -0800
be2abf3
Merge "plat: xilinx: versal: Remove cortex-a53 compilation" into integration
by Madhukar Pappireddy
· Thu Mar 18 15:15:11 2021 +0100
7465b90
Merge "plat: xilinx: Add timeout while waiting for IPI Ack" into integration
by Madhukar Pappireddy
· Thu Mar 18 14:15:48 2021 +0100
6da3d10
plat: xilinx: versal: Remove cortex-a53 compilation
by Michal Simek
· Tue Mar 16 12:30:56 2021 +0100
5a3226c
plat: xilinx: zynqmp: Add missing ids for 43/46/47dr devices
by Venkatesh Yadav Abbarapu
· Wed Mar 03 00:43:16 2021 -0700
c1cda9c
plat: xilinx: Add timeout while waiting for IPI Ack
by Tejas Patel
· Thu Feb 25 02:37:09 2021 -0800
44e563a
plat:xilinx:zynqmp: Remove the custom crash implementation
by Venkatesh Yadav Abbarapu
· Sat Jan 23 22:16:47 2021 -0700
ad1ffff
plat: xilinx: versal: Remove code duplication
by Rajan Vaja
· Wed Jan 20 00:53:45 2021 -0800
cc12795
zynqmp: pm: Add support for PS and system reset on WDT restart
by Will Wong
· Sun Nov 22 23:45:21 2020 -0800
720fd9d
zynqmp: pm: Update PM version and support PM version check
by Rajan Vaja
· Fri Oct 05 04:42:57 2018 -0700
5f115db
plat: xilinx: Fix non-MISRA compliant code
by Venkatesh Yadav Abbarapu
· Sun Jan 10 20:40:16 2021 -0700
1446948
Merge changes from topic "xilinx-sd-tap-delay" into integration
by Manish Pandey
· Wed Jan 06 12:23:10 2021 +0000
7ace4af
xilinx: zynqmp: Add support for Error Management
by Venkatesh Yadav Abbarapu
· Mon Nov 23 04:26:54 2020 -0800
deb1a36
zynqmp:pm: Adds new zynqmp-pm api SMC call for efuse
by VNSL Durga
· Mon Nov 23 04:46:04 2020 -0800
6ebe483
zynqmp : pm : Adds new zynqmp-pm api SMC call for register access
by Kalyani Akula
· Sun Nov 22 22:42:10 2020 -0800
4dadd9c
zynqmp: pm: Reimplement pinctrl get/set config parameter EEMI API calls
by Mirela Simonovic
· Sun Nov 22 23:31:14 2020 -0800
0304fa5
zynqmp: pm: Reimplement pinctrl set/get function EEMI API
by Mirela Simonovic
· Thu Sep 13 12:49:46 2018 +0200
edefb04
zynqmp: pm: Implement pinctrl request/release EEMI API
by Mirela Simonovic
· Thu Sep 13 12:49:45 2018 +0200
cd82568
zynqmp: pm: Update return type in query functions
by Rajan Vaja
· Mon Nov 23 21:33:39 2020 -0800
15da582
plat: zynqmp: Disable ITAPDLYENA bit for zero ITAP delay
by Sai Krishna Potthuri
· Fri Oct 30 00:09:43 2020 -0600
ad48c50
plat: zynqmp: Check for DLL status before doing reset
by Sai Krishna Potthuri
· Tue Oct 20 07:00:06 2020 -0600
3bc1bea
xilinx: versal: fix static failure
by Manish Pandey
· Thu Dec 10 10:48:22 2020 +0000
878e1ef
Merge changes from topic "versal-bug-fixes-and-new-apis" into integration
by Manish Pandey
· Wed Dec 09 22:44:44 2020 +0000
fe815e4
zynqmp: pm: Update flags in common clk divisor node
by Ravi Patel
· Tue Sep 18 02:14:12 2018 -0700
c23f292
zynqmp: pm_api_clock: Copy only the valid bytes
by Siva Durga Prasad Paladugu
· Sun Nov 22 22:10:12 2020 -0800
4201555
plat: xilinx: versal: Add support of register notifier
by Tejas Patel
· Wed Nov 25 01:56:57 2020 -0800
84275bf
plat: xilinx: versal: Add support to get clock rate value
by Tejas Patel
· Tue Sep 01 04:43:53 2020 -0700
5c154e1
plat: xilinx: versal: Add support of set max latency for the device
by Tejas Patel
· Wed Nov 25 01:53:12 2020 -0800
476b5b1
plat: versal: Add InitFinalize API call
by Ravi Patel
· Mon Aug 12 03:10:10 2019 -0700
030620d
xilinx: versal: Updated Response of QueryData API call
by Rajan Vaja
· Mon Nov 23 04:13:54 2020 -0800
ef75de0
plat:xilinx:versal: Use defaults when PDI is without sw partitions
by Venkatesh Yadav Abbarapu
· Mon Nov 23 03:29:51 2020 -0800
6512371
plat: xilinx: Mask unnecessary bytes of return error code
by Ravi Patel
· Mon Nov 23 04:19:08 2020 -0800
eafc878
xilinx: versal: Skip store/restore of GIC during CPU idle
by Ravi Patel
· Fri Jun 21 05:00:49 2019 -0700
95ecd45
plat: versal: Update API list in feature check
by Venkatesh Yadav Abbarapu
· Tue Dec 10 22:16:36 2019 -0500
023899d
xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()
by Ravi Patel
· Tue Jul 30 04:10:07 2019 -0700
621c1b2
plat: xilinx: zynqmp: Enable log messages for debug
by Venkatesh Yadav Abbarapu
· Fri Jan 10 03:01:35 2020 -0700
6552a55
plat: zynqmp: Change macro name of PM_BOOT_HEALTH_STATUS_REG
by Tejas Patel
· Sun Nov 22 23:37:55 2020 -0800
1ad5f66
plat: xilinx: zynqmp: Include GICv2 makefile
by Venkatesh Yadav Abbarapu
· Thu Dec 03 20:27:18 2020 -0700
8ca9553
Merge "plat: xilinx: Use fno-jump-tables flag in CPPFLAGS" into integration
by Madhukar Pappireddy
· Thu Dec 03 16:58:59 2020 +0000
2dfbba4
plat: xilinx: Use fno-jump-tables flag in CPPFLAGS
by Venkatesh Yadav Abbarapu
· Mon Jul 13 21:18:01 2020 -0600
8e05901
zynqmp: pm: update error codes to match Linux and PMU Firmware
by Davorin Mista
· Fri Aug 24 17:09:06 2018 +0200
64514a7
zynqmp: pm: Filter errors related to clock gate permissions
by Mirela Simonovic
· Fri Aug 24 17:09:07 2018 +0200
39f9eee
Don't return error information from console_flush
by Jimmy Brisson
· Wed Aug 05 13:44:05 2020 -0500
4ecb0af
Merge "Create separate header for ARM specific SMCCC defines" into integration
by Olivier Deprez
· Tue Mar 31 14:16:40 2020 +0000
5586151
Create separate header for ARM specific SMCCC defines
by Manish V Badarkhe
· Fri Mar 27 13:25:51 2020 +0000
84f1b5d
TF-A GICv3 driver: Introduce makefile
by Alexei Fedorov
· Mon Mar 23 18:45:17 2020 +0000
2f13d6c
TF-A GICv3 driver: Separate GICD and GICR accessor functions
by Alexei Fedorov
· Fri Feb 21 10:17:26 2020 +0000
8ccc4a4
cdns: Use generic console_t data structure
by Andre Przywara
· Sat Jan 25 00:58:35 2020 +0000
2b1b1a5
pl011: Use generic console_t data structure
by Andre Przywara
· Sat Jan 25 00:58:35 2020 +0000
5b433b6
xilinx: versal: Pass result count to pm_get_callbackdata()
by Tejas Patel
· Wed Jan 29 22:09:55 2020 -0800
f4c3a25
plat: xilinx: zynqmp: Use ARRAY_SIZE wherever possible
by Tejas Patel
· Wed Jan 29 22:06:12 2020 -0800
658acfd
Merge "xilinx: Unify Platform specific defines for PSCI module" into integration
by Mark Dykes
· Fri Jan 24 17:03:17 2020 +0000
b16bada
xilinx: Unify Platform specific defines for PSCI module
by Deepika Bhavnani
· Fri Dec 13 10:53:56 2019 -0600
fa42596
Merge "Xilinx zynqmp: add missing pin control group for ethernet 0." into integration
by Manish Pandey
· Fri Jan 24 10:02:07 2020 +0000
9156ffd
xilinx: versal: PLM to ATF handover
by Venkatesh Yadav Abbarapu
· Wed Jan 22 21:23:20 2020 -0700
1463dd5
xilinx: common: Move ATF handover to common file
by Venkatesh Yadav Abbarapu
· Tue Jan 07 03:25:16 2020 -0700
6f98002
Xilinx zynqmp: add missing pin control group for ethernet 0.
by Norbert Werner
· Sun Jan 19 14:51:01 2020 +0100
f6b2b3c
plat: xilinx: Move pm_client.h to common directory
by Tejas Patel
· Fri Jan 10 03:08:40 2020 -0800
cbc9005
plat: xilinx: versal: Make silicon default build target
by Siva Durga Prasad Paladugu
· Wed Jul 10 16:15:19 2019 +0530
2f4cc71
xilinx: versal: Wire silicon default setup
by Siva Durga Prasad Paladugu
· Fri May 03 16:35:25 2019 +0530
5aa76f9
versal: Increase OCM memory size for DEBUG builds
by Venkatesh Yadav Abbarapu
· Mon Nov 25 01:47:48 2019 -0700
41dd096
plat: xilinx: versal: Dont set IOU switch clock
by Siva Durga Prasad Paladugu
· Tue Jun 25 17:48:27 2019 +0530
10161e5
arm64: versal: Adjust cpu clock for versal virtual
by Siva Durga Prasad Paladugu
· Sat Apr 27 11:23:20 2019 +0530
2294b42
xilinx: versal: Add support for PM_GET_OPERATING_CHARACTERISTIC EEMI call
by Saeed Nowshadi
· Mon Jun 03 10:22:35 2019 -0700
bd4aa5a
plat: versal: Add Get_ChipID API
by Ravi Patel
· Mon Aug 12 03:17:54 2019 -0700
ed05a71
plat: xilinx: versal: Add load Pdi API support
by Jolly Shah
· Fri Mar 22 05:33:39 2019 +0530
22b0b49
xilinx: versal: Add feature check API
by Ravi Patel
· Wed Mar 06 12:34:46 2019 +0530
fcb7c16
xilinx: versal: Implement set wakeup source for client
by Tejas Patel
· Wed Feb 27 18:44:56 2019 +0530
649e924
plat: xilinx: versal: Add GET_CALLBACK_DATA function
by Rajan Vaja
· Mon Mar 04 11:09:40 2019 +0530
c5a1bda
xilinx: versal: Add PSCI APIs for system shutdown & reset
by Saeed Nowshadi
· Sun Dec 08 23:35:35 2019 -0800
54d1319
xilinx: versal: Add PSCI APIs for suspend/resume
by Tejas Patel
· Wed Feb 27 18:44:55 2019 +0530
6171711
xilinx: versal: Remove no_pmc ops to ON power domain
by Tejas Patel
· Wed Feb 27 18:44:57 2019 +0530
db81205
xilinx: versal: Add set wakeup source API
by Tejas Patel
· Wed Jan 23 14:18:53 2019 +0530
7029dd8
xilinx: versal: Add client wakeup API
by Tejas Patel
· Wed Feb 27 18:44:54 2019 +0530
a3e34ad
xilinx: versal: Add query data API
by Tejas Patel
· Fri Feb 01 17:25:19 2019 +0530
49cd871
xilinx: versal: Add request wakeup API
by Tejas Patel
· Wed Jan 23 14:18:51 2019 +0530
0266202
xilinx: versal: Add PM_INIT_FINALIZE API for versal
by Tejas Patel
· Mon Jan 21 17:56:49 2019 +0530
044001d
xilinx: versal: Add support of PM_GET_TRUSTZONE_VERSION API
by Tejas Patel
· Mon Jan 21 17:56:48 2019 +0530
a4494de
xilinx: versal: enable ipi mailbox service
by Wendy Liang
· Mon Jan 21 13:45:49 2019 +0530
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