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git01.mediatek.com / filogic / atf / cdadc08e1094e4a3ace5c71c03d49f79f4de9678 / bl31 / interrupt_mgmt.c
  1. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · 4 years, 10 months ago
  2. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  3. e0b757d Fix MISRA defects in BL31 common code by Antonio Nino Diaz · 6 years ago
  4. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  5. 58e32d1 Enable support for EL3 interrupt in IMF by Soby Mathew · 9 years ago
  6. 53c5184 IMF: postpone SCR_EL3 update if context is not initialized by Juan Castillo · 9 years ago
  7. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  8. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  9. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago