- 7a22863 Merge changes Id85b2541,I4d253e2f into integration by Sandrine Bailleux · 6 months ago
- 6e0e1b5 fix(intel): update system counter back to 400MHz by Sieu Mun Tang · 6 months ago
- 60f7fb8 fix(intel): revert back to use L4 clock by Sieu Mun Tang · 6 months ago
- 0cd0954 feat(intel): support QSPI ECC Linux for Stratix10 by Jit Loon Lim · 9 months ago
- e7ab132 Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration by Sandrine Bailleux · 7 months ago
- ffa06e7 fix(intel): fix hardcoded mpu frequency ticks by Jit Loon Lim · 12 months ago
- 94f4418 Merge "feat(intel): restructure watchdog" into integration by Manish Pandey · 7 months ago
- f6186b2 feat(intel): increase bl2 size limit by Jit Loon Lim · 9 months ago
- 6284537 feat(intel): restructure watchdog by Sieu Mun Tang · 1 year, 1 month ago
- 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · 1 year, 2 months ago
- 28c1c78 feat(intel): restructure sys mgr for S10/N5X by Jit Loon Lim · 1 year, 2 months ago
- f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · 2 years ago
- b56c078 fix(intel): remove redundant NOC header declarations by Sieu Mun Tang · 2 years, 2 months ago
- 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · 2 years, 2 months ago
- 1a832bf Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration by Madhukar Pappireddy · 2 years, 2 months ago
- a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 3 months ago
- e026eea feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC by Sieu Mun Tang · 2 years, 2 months ago
- 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · 2 years, 2 months ago
- 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years ago
- a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 4 months ago
- 786db4d intel: Change boot source selection by Hadi Asyrafi · 4 years, 6 months ago
- 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 4 years, 6 months ago
- 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 4 years, 6 months ago
- e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · 4 years, 9 months ago
- 3afb87a intel: Modify non secure access function by Hadi Asyrafi · 4 years, 9 months ago
- 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · 4 years, 6 months ago
- 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 4 years, 8 months ago
- f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 4 years, 8 months ago
- 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 4 years, 8 months ago
- 78fee35 intel: stratix10: Fix reliance on hard coded clock information by Hadi Asyrafi · 5 years ago
- 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
- c81e4f1 Merge changes from topic "jc/shift-overflow" into integration by Soby Mathew · 5 years ago
- 8e5662d Update intel platform to not rely on undefined overflow behaviour by Justin Chadwell · 5 years ago
- 2b9a741 plat/intel: Fix SMPLSEL for MMC by Tien Hock, Loh · 5 years ago
- c0d4d93 intel: Enable watchdog timer on Intel S10 platform by Muhammad Hadi Asyrafi Abdul Halim · 5 years ago
- ab34f74 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform by Tien Hock, Loh · 5 years ago
- 3d1063e plat: intel: Fix faulty DDR calibration value by Loh Tien Hock · 5 years ago
- 59400a4 plat: intel: Add BL2 support for Stratix 10 SoC by Loh Tien Hock · 5 years ago