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git01.mediatek.com / filogic / atf / c704cbcf428cac01cbeae6e3e31ad6912ca73a0b / plat
  1. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100
  2. 1218f11 Rework use of labels in assembly macros. by Soby Mathew · Tue Aug 19 11:26:00 2014 +0100
  3. 8587639 fvp: Rework when platform actions are performed by Achin Gupta · Thu Jul 31 17:45:51 2014 +0100
  4. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  5. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · Mon Aug 04 11:41:20 2014 +0100
  6. 53c843a Simplify interface to TZC-400 driver by Dan Handley · Mon Aug 04 19:53:05 2014 +0100
  7. 7b83c44 Move IO storage source to drivers directory by Dan Handley · Tue Aug 12 14:20:28 2014 +0100
  8. 3aa9216 Remove redundant io_init() function by Dan Handley · Mon Aug 04 18:31:43 2014 +0100
  9. be234f9 Remove platform dependency in CCI-400 driver by Dan Handley · Mon Aug 04 16:11:15 2014 +0100
  10. 71ac11f Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · Thu Aug 14 09:52:22 2014 +0100
  11. 48e84b3 FVP: make usage of Trusted DRAM optional at build time by Juan Castillo · Tue Aug 12 13:51:51 2014 +0100
  12. 0d84657 Merge pull request #183 from danh-arm/dh/print_output2 by danh-arm · Tue Aug 12 16:57:46 2014 +0100
  13. 91b624e Rationalize console log output by Dan Handley · Tue Jul 29 17:14:00 2014 +0100
  14. 0c70c57 FVP: apply new naming conventions to memory regions by Juan Castillo · Tue Aug 12 13:04:43 2014 +0100
  15. 0b6c706 Reduce the runtime stack size in BL stages. by Soby Mathew · Mon Aug 04 16:02:05 2014 +0100
  16. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · Mon Aug 04 10:34:18 2014 +0100
  17. 9d70f0f Rework the TSPD setup code by Vikram Kanigiri · Tue Jul 15 16:46:43 2014 +0100
  18. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · Wed Jul 16 15:53:43 2014 +0100
  19. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · Mon Jul 28 14:33:44 2014 +0100
  20. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · Mon Jul 28 14:28:40 2014 +0100
  21. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · Mon Jul 28 14:24:52 2014 +0100
  22. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · Thu Jun 05 09:45:36 2014 +0100
  23. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · Wed Jul 16 09:23:52 2014 +0100
  24. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · Wed Jun 25 10:07:40 2014 +0100
  25. 066f713 Introduce crash console APIs for crash reporting by Soby Mathew · Mon Jul 14 16:57:23 2014 +0100
  26. 69817f7 Parametrize baudrate and UART clock during console_init() by Soby Mathew · Mon Jul 14 15:43:21 2014 +0100
  27. c389d77 Introduce asm console functions in TF by Soby Mathew · Tue Jun 24 12:28:41 2014 +0100
  28. 9c60d80 Remove the concept of coherent stacks by Achin Gupta · Thu Jun 26 11:12:37 2014 +0100
  29. b4fd939 Merge pull request #167 from jcastillo-arm/jc/tf-issues/217 by Dan Handley · Fri Jul 25 14:57:54 2014 +0100
  30. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  31. 5fe57c1 Define ARM_GIC_ARCH default value for all platforms by Sandrine Bailleux · Thu Jul 17 17:23:14 2014 +0100
  32. 9a5b56e FVP: Ensure system reset wake-up results in cold boot by Juan Castillo · Fri Jul 11 10:23:18 2014 +0100
  33. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · Fri Jul 11 11:19:27 2014 +0100
  34. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · Mon Jun 16 16:12:27 2014 +0100
  35. e8e04ec Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · Thu Jul 10 14:45:19 2014 +0100
  36. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · Fri Jun 20 09:43:15 2014 +0100
  37. 1c54d97 Refactor fvp_config into common platform header by Dan Handley · Fri Jun 20 12:02:01 2014 +0100
  38. e3060e2 fvp: Properly detect the location of BL1 R/W data by Sandrine Bailleux · Fri Jun 13 14:48:18 2014 +0100
  39. 467d057 Remove concept of top/bottom image loading by Sandrine Bailleux · Tue Jun 24 14:02:34 2014 +0100
  40. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · Fri Jun 27 14:10:04 2014 +0100
  41. 960347d Support later revisions of the Foundation FVP by Andrew Thoelke · Thu Jun 26 14:27:26 2014 +0100
  42. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · Thu Jun 26 23:02:28 2014 +0100
  43. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · Tue Jun 24 16:48:31 2014 +0100
  44. 043f846 Merge pull request #150 from sandrine-bailleux/sb/fix-plat-print-gic-regs by danh-arm · Tue Jun 24 16:48:18 2014 +0100
  45. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · Tue Jun 24 16:44:12 2014 +0100
  46. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · Tue Jun 24 14:18:35 2014 +0100
  47. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  48. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · Mon Jun 02 14:59:00 2014 +0100
  49. 21aa520 fvp: Fix register name in 'plat_print_gic_regs' macro by Sandrine Bailleux · Tue Jun 03 09:52:26 2014 +0100
  50. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
  51. fb06094 Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · Mon Jun 23 18:04:29 2014 +0100
  52. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · Fri Jun 20 00:36:14 2014 +0100
  53. f1c7cd7 Merge pull request #143 from athoelke/at/remove-nsram by danh-arm · Mon Jun 23 14:41:34 2014 +0100
  54. 30b04fc Remove NSRAM from FVP memory map by Andrew Thoelke · Fri Jun 20 12:23:20 2014 +0100
  55. 900def0 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · Wed Jun 18 18:34:31 2014 +0100
  56. bb12891 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · Fri Jun 06 10:18:52 2014 +0100
  57. 0572273 Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · Tue Jun 17 15:12:14 2014 +0100
  58. d73898a Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · Fri Jun 13 17:10:00 2014 +0100
  59. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  60. fdad706 Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · Thu Jun 12 09:12:52 2014 +0100
  61. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  62. 1c3e228 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · Thu May 29 13:55:51 2014 +0100
  63. 1359236 Enable mapping higher physical address by Lin Ma · Mon Jun 02 11:45:36 2014 -0700
  64. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · Wed May 28 22:22:55 2014 +0100
  65. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  66. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  67. ea45157 Rename FVP specific files and functions by Dan Handley · Thu May 15 14:53:30 2014 +0100
  68. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  69. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  70. 60b13e3 Remove unused data declarations by Dan Handley · Wed May 14 15:13:16 2014 +0100
  71. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  72. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 12:14:37 2014 +0100
  73. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · Thu May 22 15:28:26 2014 +0100
  74. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · Thu May 22 15:21:35 2014 +0100
  75. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  76. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  77. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  78. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · Thu May 22 13:44:47 2014 +0100
  79. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  80. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · Sun May 04 19:02:52 2014 +0100
  81. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100
  82. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · Tue May 20 17:28:25 2014 +0100
  83. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · Tue May 20 17:22:24 2014 +0100
  84. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · Fri May 16 15:33:15 2014 +0100
  85. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  86. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  87. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  88. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  89. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  90. 6bee0fc Merge pull request #69 from sandrine-bailleux:sb/split-mmu-fcts-per-el by Andrew Thoelke · Fri May 16 12:26:26 2014 +0100
  91. fe3374b Fixes for TZC configuration on FVP by Andrew Thoelke · Fri May 09 15:36:13 2014 +0100
  92. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · Fri May 09 11:35:36 2014 +0100
  93. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · Fri May 09 11:23:11 2014 +0100
  94. df89f9f Merge pull request #65 from vikramkanigiri/vk/console_init by danh-arm · Thu May 08 12:27:15 2014 +0100
  95. 3684abf Ensure a console is initialized before it is used by Vikram Kanigiri · Thu Mar 27 14:33:15 2014 +0000
  96. 86f0665 Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2 by danh-arm · Thu May 08 12:00:10 2014 +0100
  97. 99cb464 Merge pull request #60 from athoelke/disable-mmu-v2 by danh-arm · Thu May 08 11:55:19 2014 +0100
  98. 719e870 Merge pull request #59 from athoelke/review-barriers-v2 by danh-arm · Thu May 08 11:55:13 2014 +0100
  99. aa3266a Remove unused 'PL011_BASE' macro by Sandrine Bailleux · Tue May 06 13:25:37 2014 +0100
  100. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100