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git01.mediatek.com / filogic / atf / c5e1745356670c6e28527991c5d7ec75fbb9587e / include / bl31
  1. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  2. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
  3. e0b757d Fix MISRA defects in BL31 common code by Antonio Nino Diaz · 6 years ago
  4. 4b32e62 libc: Fix all includes in codebase by Antonio Nino Diaz · 6 years ago
  5. 837cc9c EHF: MISRA fixes by Jeenu Viswambharan · 6 years ago
  6. 32ceef5 SDEI: MISRA fixes by Jeenu Viswambharan · 6 years ago
  7. d86cc5b RAS: Allow individual interrupt registration by Jeenu Viswambharan · 7 years ago
  8. 9a7ce2f AArch64: Introduce RAS handling by Jeenu Viswambharan · 7 years ago
  9. 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · 7 years ago
  10. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · 7 years ago
  11. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 7 years ago
  12. 777dd43 Fix MISRA rule 8.3 in common code by Roberto Vargas · 7 years ago
  13. eeb353c EHF: Introduce preempted return code parameter to ehf_allow_ns_preemption() by Jeenu Viswambharan · 7 years ago
  14. f4194ee Deprecate one EL3 interrupt routing model with EL3 exception handling by Jeenu Viswambharan · 7 years ago
  15. 6c6f24d BL31: Program Priority Mask for SMC handling by Jeenu Viswambharan · 7 years ago
  16. 10a6727 BL31: Introduce Exception Handling Framework by Jeenu Viswambharan · 7 years ago
  17. aeb267c GIC: Allow specifying interrupt properties by Jeenu Viswambharan · 7 years ago
  18. dce70b3 GIC: Add API to set interrupt routing by Jeenu Viswambharan · 7 years ago
  19. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  20. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  21. d019487 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  22. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 9 years ago
  23. 24ab34f Fix coding guideline warnings by Soby Mathew · 9 years ago
  24. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  25. 241ec6c Add optional PSCI STAT residency & count functions by Yatharth Kochar · 8 years ago
  26. 6a81641 PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops by Soby Mathew · 9 years ago
  27. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 9 years ago
  28. 7162afa Use designated initialization in DECLARE_RT_SVC macro by Soby Mathew · 9 years ago
  29. f4119ec Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 9 years ago
  30. 6c0566c Move context management code to common location by Yatharth Kochar · 9 years ago
  31. 58e32d1 Enable support for EL3 interrupt in IMF by Soby Mathew · 9 years ago
  32. a31c9f3 Merge pull request #390 from vikramkanigiri/at/unify_bakery_locks_v2 by Achin Gupta · 9 years ago
  33. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  34. 9a0ff9b Pass the target suspend level to SPD suspend hooks by Achin Gupta · 9 years ago
  35. 011ca18 PSCI: Rework generic code to conform to coding guidelines by Soby Mathew · 9 years ago
  36. f1f97a1 PSCI: Fix the return code for invalid entrypoint by Soby Mathew · 9 years ago
  37. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  38. 70716d6 PSCI: Add deprecated API for SPD when compatibility is disabled by Soby Mathew · 9 years ago
  39. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  40. 49473e4 PSCI: Implement platform compatibility layer by Soby Mathew · 9 years ago
  41. 574d685 PSCI: Unify warm reset entry points by Sandrine Bailleux · 9 years ago
  42. 85dbf5a PSCI: Add framework to handle composite power states by Soby Mathew · 10 years ago
  43. 9d754f6 PSCI: Introduce new platform interface to describe topology by Soby Mathew · 10 years ago
  44. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 10 years ago
  45. 3a9e8bf PSCI: Remove references to affinity based power management by Soby Mathew · 10 years ago
  46. 6b8b302 PSCI: Invoke PM hooks only for the highest level by Soby Mathew · 9 years ago
  47. 991d42c PSCI: Create new directory to implement new frameworks by Soby Mathew · 9 years ago
  48. 9616838 PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · 10 years ago
  49. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  50. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  51. 1df077b Increment the PSCI VERSION to 1.0 by Soby Mathew · 10 years ago
  52. 6cdddaf Implement PSCI_FEATURES API by Soby Mathew · 10 years ago
  53. 110fe36 Rework the PSCI migrate APIs by Soby Mathew · 10 years ago
  54. 74e52a7 Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · 10 years ago
  55. f512157 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · 10 years ago
  56. ffb4ab1 Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · 10 years ago
  57. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  58. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  59. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  60. 56bcdc2 Miscellaneous PSCI code cleanups by Achin Gupta · 10 years ago
  61. f6b9e99 Add APIs to preserve highest affinity level in OFF state by Achin Gupta · 10 years ago
  62. f3ccbab Add PSCI service specific per-CPU data by Achin Gupta · 10 years ago
  63. e4b9fa4 Add macro to flush per-CPU data by Achin Gupta · 10 years ago
  64. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  65. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  66. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  67. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  68. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  69. 258e94f Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  70. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  71. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  72. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  73. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  74. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  75. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  76. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  77. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · 10 years ago
  78. 701fea7 Further renames of platform porting functions by Dan Handley · 10 years ago
  79. 7ce42df Move BL porting functions into platform.h by Dan Handley · 10 years ago
  80. 60b13e3 Remove unused data declarations by Dan Handley · 10 years ago
  81. a17fefa Remove extern keyword from function declarations by Dan Handley · 10 years ago
  82. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  83. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  84. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  85. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  86. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 11 years ago
  87. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 11 years ago
  88. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  89. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago
  90. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  91. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 10 years ago
  92. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  93. b058556 Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · 10 years ago
  94. d1b6015 Add build configuration for timer save/restore by Jeenu Viswambharan · 10 years ago
  95. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  96. 42c5280 Fix broken standby state implementation in PSCI by Achin Gupta · 11 years ago
  97. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  98. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  99. e2712bc Always use named structs in header files by Dan Handley · 11 years ago
  100. 27f6e7d Move PSCI global functions out of private header by Dan Handley · 11 years ago