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git01.mediatek.com / filogic / atf / b34deca6b00e4cacc397fdcff7481d85fddac904 / lib
  1. 4efede7 Workaround for Hercules erratum 1688305 by Madhukar Pappireddy · Wed Dec 18 15:56:27 2019 -0600
  2. ce9af96 Merge "debugfs: add SMC channel" into integration by Mark Dykes · Fri Dec 20 20:56:23 2019 +0000
  3. 08864a2 Merge "debugfs: add FIP device" into integration by Mark Dykes · Fri Dec 20 20:53:28 2019 +0000
  4. 40b88bd Merge "debugfs: add 9p device interface" into integration by Mark Dykes · Fri Dec 20 18:10:50 2019 +0000
  5. db4e25a spm: Remove SPM Alpha 1 prototype and support files by Paul Beesley · Mon Oct 14 15:27:12 2019 +0000
  6. 9660dc1 debugfs: add SMC channel by Ambroise Vincent · Fri Jul 12 13:47:03 2019 +0100
  7. fa01598 aarch64: Fix stack pointer maintenance on EA handling path by Jan Dabros · Mon Dec 02 13:30:03 2019 +0100
  8. af650a3 debugfs: add FIP device by Olivier Deprez · Wed Nov 06 14:00:43 2019 +0100
  9. cb4c562 debugfs: add 9p device interface by Olivier Deprez · Thu Sep 19 17:46:46 2019 +0200
  10. eb1e7e4 Merge changes from topic "aa/sel2_support" into integration by Olivier Deprez · Fri Dec 13 16:26:32 2019 +0000
  11. 94606d6 Merge "libc: add memrchr" into integration by Alexei Fedorov · Wed Dec 11 10:14:13 2019 +0000
  12. 35248f2 libc: add memrchr by Ambroise Vincent · Wed Jun 19 17:14:09 2019 +0100
  13. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  14. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  15. 02c3568 adding support to enable different personality of the same soc. by Pankaj Gupta · Tue Oct 15 15:44:45 2019 +0530
  16. e5dce5d Merge "Coding guideline suggest not to use unsigned long" into integration by Sandrine Bailleux · Fri Nov 15 07:40:52 2019 +0000
  17. d091bf6 Merge "Fix white space errors + remove #if defined" into integration by Sandrine Bailleux · Wed Nov 13 16:22:52 2019 +0000
  18. eb2b2b6 Coding guideline suggest not to use unsigned long by Deepika Bhavnani · Tue Sep 03 21:06:17 2019 +0300
  19. 839a966 Merge "Disable stack protection explicitly" into integration by Paul Beesley · Tue Nov 12 13:20:46 2019 +0000
  20. cd9a943 Fix white space errors + remove #if defined by laurenw-arm · Fri Oct 11 15:45:24 2019 -0500
  21. da12924 Disable stack protection explicitly by Simon South · Sun Oct 20 13:54:32 2019 -0400
  22. bce728f xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config by Artsem Artsemenka · Thu Oct 17 13:51:27 2019 +0100
  23. 2fbce24 Merge "Neoverse N1 Errata Workaround 1542419" into integration by Soby Mathew · Mon Oct 07 12:05:26 2019 +0000
  24. a5b401b Merge "Fix the CAS spinlock implementation" into integration by Soby Mathew · Mon Oct 07 11:43:32 2019 +0000
  25. 94accd3 Neoverse N1 Errata Workaround 1542419 by laurenw-arm · Tue Aug 20 15:51:24 2019 -0500
  26. ad04201 Fix the CAS spinlock implementation by Soby Mathew · Wed Sep 25 14:03:41 2019 +0100
  27. efda055 Merge "TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U" into integration by Soby Mathew · Thu Oct 03 16:22:41 2019 +0000
  28. 3dd9f2b TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U by Alexei Fedorov · Tue Oct 01 13:58:23 2019 +0100
  29. 584410e Introducing support for Cortex-A65AE by Imre Kis · Mon Jul 22 14:36:30 2019 +0200
  30. 05e4d22 Introducing support for Cortex-A65 by Imre Kis · Thu Jul 18 14:30:03 2019 +0200
  31. d3dc940 Merge "Cortex_hercules: Add support for Hercules-AE" into integration by Soby Mathew · Tue Oct 01 20:15:23 2019 +0000
  32. fea97f7 Cortex_hercules: Add support for Hercules-AE by Artsem Artsemenka · Mon Sep 16 15:11:21 2019 +0100
  33. 14e508b Merge "AArch32: Disable Secure Cycle Counter" into integration by Soby Mathew · Fri Sep 27 10:55:15 2019 +0000
  34. 4bb606c Merge "Fix MTE support from causing unused variable warnings" into integration by Soby Mathew · Fri Sep 27 09:46:59 2019 +0000
  35. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  36. 33bd514 Adding new optional PSCI hook pwr_domain_on_finish_late by Madhukar Pappireddy · Mon Aug 12 18:31:33 2019 -0500
  37. 05e030e Fix MTE support from causing unused variable warnings by Justin Chadwell · Fri Sep 20 09:13:14 2019 +0100
  38. c3a1836 Merge changes from topic "db/unsigned_long" into integration by Sandrine Bailleux · Wed Sep 18 14:30:09 2019 +0000
  39. b0f2602 SCTLR and ACTLR are 32-bit for AArch32 and 64-bit for AArch64 by Deepika Bhavnani · Tue Sep 03 21:08:51 2019 +0300
  40. 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · Fri Sep 13 15:22:23 2019 +0000
  41. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  42. 4490ad2 Merge "Assert if power level value greater then PSCI_INVALID_PWR_LVL" into integration by Soby Mathew · Fri Sep 13 12:02:11 2019 +0000
  43. fd276b2 Merge "Unify type of "cpu_idx" across PSCI module." into integration by Soby Mathew · Fri Sep 13 11:35:56 2019 +0000
  44. 79ffab5 Unify type of "cpu_idx" across PSCI module. by Deepika Bhavnani · Tue Aug 27 00:32:24 2019 +0300
  45. 9180af2 Merge "libc: fix sparse warning for __assert()" into integration by Soby Mathew · Thu Sep 12 12:34:27 2019 +0000
  46. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · Thu Sep 12 12:31:22 2019 +0000
  47. e412788 Zeus: apply the MSR SSBS instruction by John Tsichritzis · Tue Aug 13 10:28:25 2019 +0100
  48. 77389b2 libc: fix sparse warning for __assert() by Masahiro Yamada · Fri Jul 26 20:21:39 2019 +0900
  49. 523024c Assert if power level value greater then PSCI_INVALID_PWR_LVL by Deepika Bhavnani · Sat Aug 17 01:10:02 2019 +0300
  50. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  51. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · Fri Aug 23 11:26:57 2019 +0000
  52. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  53. 5866c59 Merge "Fix for N1 1043202 Errata Workaround" into integration by Alexei Fedorov · Tue Aug 20 09:31:16 2019 +0000
  54. 9771749 Merge "Coverity fix: Remove GGC ignore -Warray-bounds" into integration by Paul Beesley · Tue Aug 20 09:25:00 2019 +0000
  55. 33e58f3 Fix for N1 1043202 Errata Workaround by laurenw-arm · Mon Aug 19 11:06:18 2019 -0500
  56. 6bd4666 Coverity fix: Remove GGC ignore -Warray-bounds by Deepika Bhavnani · Thu Aug 15 00:56:46 2019 +0300
  57. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · Mon Jul 29 17:22:53 2019 +0100
  58. 1da61af Merge changes from topic "jc/coverity-fixes" into integration by Paul Beesley · Tue Aug 13 11:20:25 2019 +0000
  59. ca536f3 Fix Coverity #261967, Infinite loop by Justin Chadwell · Tue Jul 23 14:56:48 2019 +0100
  60. 0aab960 Fix Coverity #343008, Side affect in assertion by Justin Chadwell · Tue Jul 23 09:48:38 2019 +0100
  61. 72065ec Fix Coverity #342970, Uninitialized scalar variable by Justin Chadwell · Tue Jul 23 09:45:18 2019 +0100
  62. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
  63. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  64. db2ec85 Enable AMU for Cortex-Hercules by Balint Dobszay · Mon Jul 15 11:46:20 2019 +0200
  65. 33bc410 Merge "Romlib makefile refactoring and script rewriting" into integration by Soby Mathew · Thu Jul 25 12:54:59 2019 +0000
  66. 4047728 Merge changes I0d17ba6c,I540741d2,I9e6475ad,Ifd769320,I12c04a85, ... into integration by Soby Mathew · Thu Jul 25 09:04:21 2019 +0000
  67. f0081be Merge "Cortex_hercules: Introduce preliminary cpu support" into integration by Soby Mathew · Tue Jul 23 09:33:15 2019 +0000
  68. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · Tue Jul 23 08:55:10 2019 +0000
  69. 2d137c5 Romlib makefile refactoring and script rewriting by Imre Kis · Tue Jul 09 18:30:58 2019 +0200
  70. dbba2b3 Introduce lightweight BL platform parameter library by Julius Werner · Fri May 24 20:31:15 2019 -0700
  71. f57f108 Cortex_hercules: Introduce preliminary cpu support by Louis Mayencourt · Tue May 14 11:00:45 2019 +0100
  72. c81e4f1 Merge changes from topic "jc/shift-overflow" into integration by Soby Mathew · Tue Jul 16 10:11:27 2019 +0000
  73. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  74. 8294602 Update base code to not rely on undefined overflow behaviour by Justin Chadwell · Wed Jul 03 14:15:22 2019 +0100
  75. cc94264 Rename Cortex-Deimos to Cortex-A77 by Balint Dobszay · Wed Jul 03 13:02:56 2019 +0200
  76. cf12f26 Removing redundant ISB instructions by lauwal01 · Thu Jun 27 11:03:25 2019 -0500
  77. 644b6ed Workaround for Neoverse N1 erratum 1275112 by lauwal01 · Mon Jun 24 11:49:01 2019 -0500
  78. 00396bf Workaround for Neoverse N1 erratum 1262888 by lauwal01 · Mon Jun 24 11:47:30 2019 -0500
  79. 42771af Workaround for Neoverse N1 erratum 1262606 by lauwal01 · Mon Jun 24 11:44:58 2019 -0500
  80. 07c2a23 Workaround for Neoverse N1 erratum 1257314 by lauwal01 · Mon Jun 24 11:42:02 2019 -0500
  81. 197f14c Workaround for Neoverse N1 erratum 1220197 by lauwal01 · Mon Jun 24 11:38:53 2019 -0500
  82. e159044 Workaround for Neoverse N1 erratum 1207823 by lauwal01 · Mon Jun 24 11:35:37 2019 -0500
  83. f2adb13 Workaround for Neoverse N1 erratum 1165347 by lauwal01 · Mon Jun 24 11:32:40 2019 -0500
  84. 363ee3c Workaround for Neoverse N1 erratum 1130799 by lauwal01 · Mon Jun 24 11:28:34 2019 -0500
  85. bd555f4 Workaround for Neoverse N1 erratum 1073348 by lauwal01 · Mon Jun 24 11:23:50 2019 -0500
  86. 782f7e6 libc: fix memchr implementation by Ambroise Vincent · Fri Jun 07 11:19:45 2019 +0100
  87. 714d43a Merge "DSU: Apply erratum 936184 for Neoverse N1/E1" into integration by John Tsichritzis · Mon Jun 17 11:50:52 2019 +0000
  88. 8b8b13b DSU: Apply erratum 936184 for Neoverse N1/E1 by Louis Mayencourt · Mon Jun 10 16:43:39 2019 +0100
  89. 7901252 Merge changes from topic "jts/ti_fix" into integration by Soby Mathew · Mon Jun 10 09:40:25 2019 +0000
  90. 31df678 Merge "PSCI: Lookup list of parent nodes to lock only once" into integration by Soby Mathew · Mon Jun 10 09:39:23 2019 +0000
  91. 401cc1f Merge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integration by John Tsichritzis · Fri Jun 07 15:20:45 2019 +0000
  92. 74e8978 PSCI: Lookup list of parent nodes to lock only once by Andrew F. Davis · Tue Jun 04 10:46:54 2019 -0400
  93. b934740 Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703 by Andre Przywara · Mon May 20 14:57:06 2019 +0100
  94. c23d78c Merge "Introduce BTI support in ROMLIB" into integration by John Tsichritzis · Thu Jun 06 10:26:10 2019 +0000
  95. f4acb92 ti: k3: common: Remove coherency workaround for AM65x by Andrew F. Davis · Thu Apr 25 14:33:30 2019 -0400
  96. 7557c66 Apply compile-time check for AArch64-only cores by John Tsichritzis · Mon Jun 03 13:54:30 2019 +0100
  97. db737bb Merge "Cortex-A55: workarounds for errata 1221012" into integration by Paul Beesley · Wed May 29 11:29:12 2019 +0000
  98. b72fe7a Cortex-A55: workarounds for errata 1221012 by Ambroise Vincent · Tue May 28 09:52:48 2019 +0100
  99. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  100. f6ea99b Introduce BTI support in ROMLIB by John Tsichritzis · Tue May 21 15:47:37 2019 +0100