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git01.mediatek.com / filogic / atf / aef51b7a22038b35c87846e94dcac2618855a8ad / plat / intel / soc / stratix10 / include
  1. 7a22863 Merge changes Id85b2541,I4d253e2f into integration by Sandrine Bailleux · Wed Jan 10 13:54:11 2024 +0100
  2. 6e0e1b5 fix(intel): update system counter back to 400MHz by Sieu Mun Tang · Fri Dec 22 11:30:46 2023 +0800
  3. 60f7fb8 fix(intel): revert back to use L4 clock by Sieu Mun Tang · Fri Dec 22 11:12:17 2023 +0800
  4. 0cd0954 feat(intel): support QSPI ECC Linux for Stratix10 by Jit Loon Lim · Wed Oct 18 16:19:27 2023 +0800
  5. e7ab132 Merge "fix(intel): fix hardcoded mpu frequency ticks" into integration by Sandrine Bailleux · Tue Dec 19 16:12:59 2023 +0100
  6. ffa06e7 fix(intel): fix hardcoded mpu frequency ticks by Jit Loon Lim · Fri Jul 07 17:15:26 2023 +0800
  7. 94f4418 Merge "feat(intel): restructure watchdog" into integration by Manish Pandey · Tue Nov 28 22:45:38 2023 +0100
  8. f6186b2 feat(intel): increase bl2 size limit by Jit Loon Lim · Wed Sep 27 11:02:45 2023 +0800
  9. 6284537 feat(intel): restructure watchdog by Sieu Mun Tang · Fri Jun 09 23:33:36 2023 +0800
  10. 4c249f1 feat(intel): platform enablement for Agilex5 SoC FPGA by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  11. 28c1c78 feat(intel): restructure sys mgr for S10/N5X by Jit Loon Lim · Wed May 17 12:26:11 2023 +0800
  12. f48707a feat(intel): implement timer init divider via CPU frequency for N5X by Sieu Mun Tang · Thu Jun 23 18:05:02 2022 +0800
  13. b56c078 fix(intel): remove redundant NOC header declarations by Sieu Mun Tang · Fri May 13 11:14:08 2022 +0800
  14. 2cebbc6 Merge "feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge" into integration by Madhukar Pappireddy · Tue May 10 20:17:51 2022 +0200
  15. 1a832bf Merge "feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC" into integration by Madhukar Pappireddy · Fri May 06 19:33:59 2022 +0200
  16. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · Wed Apr 06 10:19:16 2022 +0800
  17. e026eea feat(intel): add SMPLSEL and DRVSEL setup for Stratix 10 MMC by Sieu Mun Tang · Thu May 05 23:42:55 2022 +0800
  18. 82cf5df feat(intel): add support for F2S and S2F bridge SMC with mask to enable, disable and reset bridge by Sieu Mun Tang · Thu May 05 17:07:21 2022 +0800
  19. 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · Wed Aug 05 22:12:23 2020 +0800
  20. a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · Mon Feb 28 15:24:59 2022 +0800
  21. 786db4d intel: Change boot source selection by Hadi Asyrafi · Mon Dec 30 16:00:30 2019 +0800
  22. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
  23. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
  24. e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · Mon Oct 21 16:35:08 2019 +0800
  25. 3afb87a intel: Modify non secure access function by Hadi Asyrafi · Mon Oct 21 16:27:29 2019 +0800
  26. 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · Thu Jan 02 16:32:41 2020 -0600
  27. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  28. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
  29. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
  30. 78fee35 intel: stratix10: Fix reliance on hard coded clock information by Hadi Asyrafi · Tue Jul 30 22:18:17 2019 +0800
  31. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
  32. c81e4f1 Merge changes from topic "jc/shift-overflow" into integration by Soby Mathew · Tue Jul 16 10:11:27 2019 +0000
  33. 8e5662d Update intel platform to not rely on undefined overflow behaviour by Justin Chadwell · Wed Jul 03 14:12:25 2019 +0100
  34. 2b9a741 plat/intel: Fix SMPLSEL for MMC by Tien Hock, Loh · Tue Jul 09 13:17:04 2019 +0800
  35. c0d4d93 intel: Enable watchdog timer on Intel S10 platform by Muhammad Hadi Asyrafi Abdul Halim · Tue Mar 19 17:59:06 2019 +0800
  36. ab34f74 plat: intel: Add BL31 support to Intel Stratix10 SoCFPGA platform by Tien Hock, Loh · Tue Feb 26 09:25:14 2019 +0800
  37. 3d1063e plat: intel: Fix faulty DDR calibration value by Loh Tien Hock · Wed Feb 13 14:39:31 2019 +0800
  38. 59400a4 plat: intel: Add BL2 support for Stratix 10 SoC by Loh Tien Hock · Mon Feb 04 16:17:24 2019 +0800