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git01.mediatek.com / filogic / atf / a70e31d8e6e7bc2dc625832e8917cba02a4c5e70 / plat
  1. fbe7dc8 refactor(qemu): change all occurrences of RSS to RSE by Tamas Ban · Thu Feb 22 12:03:19 2024 +0100
  2. 3b76946 refactor(fvp): change all occurrences of RSS to RSE by Tamas Ban · Thu Feb 22 12:01:07 2024 +0100
  3. a2473a9 refactor(fvp): remove leftovers from rss measured boot support by Tamas Ban · Thu Feb 22 11:38:33 2024 +0100
  4. dc15bf4 refactor(tc): change all occurrences of RSS to RSE by Tamas Ban · Thu Feb 22 11:35:28 2024 +0100
  5. 7b9945c refactor(tc): rename all 'rss' files to 'rse' by Tamas Ban · Wed Feb 21 12:23:53 2024 +0100
  6. 658865d fix(spm): add device-regions used in tf-a-tests by Daniel Boulby · Thu Mar 14 16:01:59 2024 +0000
  7. 26cf05d fix: static checks on spmc dts by J-Alves · Tue Apr 16 10:03:05 2024 +0100
  8. b9a363d Merge changes from topic "lto-fixes" into integration by Manish Pandey · Tue Apr 16 15:51:44 2024 +0200
  9. 639c6db Merge changes from topic "hm/handoff" into integration by Manish Pandey · Tue Apr 16 15:51:13 2024 +0200
  10. ed25192 Merge "fix(ff-a): add NS memory node to fvp_spmc_optee_sp manifest" into integration by Madhukar Pappireddy · Mon Apr 15 15:57:02 2024 +0200
  11. babec87 refactor(fvp): reduce max size of HW_CONFIG to 16KB by Harrison Mutai · Fri Dec 01 15:45:05 2023 +0000
  12. 215a170 refactor(arm): replace hard-coded HW_CONFIG DT size by Harrison Mutai · Thu Apr 11 15:43:21 2024 +0000
  13. e2ae162 fix(fvp): don't check MPIDRs with the power controller in BL1 by Chris Kay · Tue Feb 06 17:44:31 2024 +0000
  14. f3c0fe1 fix(arm): only expose `arm_bl2_dyn_cfg_init` to BL2 by Chris Kay · Tue Feb 06 16:03:24 2024 +0000
  15. 5aff01e fix(ff-a): add NS memory node to fvp_spmc_optee_sp manifest by Karl Meakin · Thu Apr 04 17:16:11 2024 +0100
  16. 5c23e4e Merge "refactor(arm): remove unused SP_MIN UART macros" into integration by Bipin Ravi · Wed Apr 03 18:16:00 2024 +0200
  17. b297780 Merge changes I3a4f9a4f,Iedc4e640 into integration by Soby Mathew · Tue Apr 02 19:17:24 2024 +0200
  18. 414043d feat(rme): pass console info via RMM-EL3 ifc by Soby Mathew · Tue Mar 26 17:16:00 2024 +0000
  19. 9490f1f refactor(arm): remove unused SP_MIN UART macros by Leo Yan · Thu Mar 28 15:47:53 2024 +0000
  20. 779d34f Merge "fix(nuvoton): prevent changing clock frequency" into integration by Madhukar Pappireddy · Mon Apr 01 16:07:01 2024 +0200
  21. 7dd449f Merge "feat(imx8mq): detect console base address during runtime" into integration by Madhukar Pappireddy · Mon Apr 01 15:59:48 2024 +0200
  22. 1ae93c3 feat(imx8mq): detect console base address during runtime by Leonard Göhrs · Wed Mar 13 02:08:54 2024 +0100
  23. 2c0fd19 feat(xilinx): send SGI to mailbox driver by Tanmay Shah · Tue Feb 13 17:07:42 2024 -0800
  24. 4199eaa Merge changes from topic "mte_fixes" into integration by Madhukar Pappireddy · Tue Mar 26 23:01:05 2024 +0100
  25. c1be66f refactor(mte): remove mte, mte_perm by Govindraj Raja · Thu Mar 07 14:42:20 2024 -0600
  26. 2ea0584 Merge changes from topic "feature/imx8m-csu" into integration by Madhukar Pappireddy · Tue Mar 26 16:45:33 2024 +0100
  27. 65120d5 fix(nuvoton): prevent changing clock frequency by rutigl@gmail.com · Tue Mar 26 12:17:56 2024 +0200
  28. 9ccce5e feat(imx8ulp): give HIFI4 DSP access to more resources by Laurentiu Mihalcea · Tue Mar 19 14:32:13 2024 +0200
  29. 526cbc5 Merge "fix(cpus): workaround for Cortex-A720 erratum 2926083" into integration by Mark Dykes · Mon Mar 25 22:08:14 2024 +0100
  30. e2954e5 Merge changes Id72a0370,I2bafba38,I2bd48441,I164c579c,Iddf8aea0, ... into integration by André Przywara · Fri Mar 22 23:12:28 2024 +0100
  31. 5e03975 fix(cpus): workaround for Cortex-A720 erratum 2926083 by Bipin Ravi · Thu Mar 14 16:52:21 2024 -0500
  32. 212a3e2 Merge "fix(nuvoton): gfx frame buffer memory corruption during secondary boot" into integration by Madhukar Pappireddy · Fri Mar 22 00:22:49 2024 +0100
  33. bf55f93 Merge changes from topic "st_mckprot_bl32" into integration by Madhukar Pappireddy · Wed Mar 20 18:46:17 2024 +0100
  34. 53aa28c refactor: fix common misspelling of init* by Harrison Mutai · Wed Mar 20 11:38:07 2024 +0000
  35. 81277dc refactor(stm32mp1): move the MCU security to BL32 by Yann Gautier · Tue Feb 01 18:01:17 2022 +0100
  36. 86f32f9 fix(nuvoton): gfx frame buffer memory corruption during secondary boot by rutigl@gmail.com · Mon Feb 19 12:51:22 2024 +0200
  37. 76fa454 Merge "refactor(mbedtls): remove mbedtls 2.x support" into integration by Manish V Badarkhe · Mon Mar 18 10:23:55 2024 +0100
  38. b3b6de7 refactor(mbedtls): remove mbedtls 2.x support by laurenw-arm · Tue Mar 05 14:55:18 2024 -0600
  39. 75b3f47 style(imx8m): add parenthesis to CSU_HP_REG by Stefan Kerkmann · Tue Mar 05 10:00:33 2024 +0100
  40. f90c6c5 feat(imx8mp): restrict peripheral access to secure world by Stefan Kerkmann · Mon Mar 04 11:58:35 2024 +0100
  41. 29d6856 feat(imx8mp): set and lock almost all peripherals as non-secure by Stefan Kerkmann · Mon Mar 04 11:54:37 2024 +0100
  42. 3dc50ca feat(imx8mm): restrict peripheral access to secure world by Stefan Kerkmann · Mon Mar 04 12:00:57 2024 +0100
  43. f676ff3 feat(imx8mm): set and lock almost all peripherals as non-secure by Stefan Kerkmann · Mon Mar 04 12:00:24 2024 +0100
  44. bfcacc8 fix(cpus): workaround for Cortex-A715 erratum 2413290 by Sona Mathew · Tue Feb 20 16:59:45 2024 -0600
  45. c883ce0 feat(rpi): add Raspberry Pi 5 support by Mario Bălănică · Sat Dec 02 03:08:02 2023 +0200
  46. 4065646 fix(rpi): consider MT when calculating core index from MPIDR by Mario Bălănică · Fri Dec 01 05:43:53 2023 +0200
  47. cb759ff refactor(rpi): move register definitions out of rpi_hw.h by Mario Bălănică · Wed Dec 06 21:36:25 2023 +0200
  48. 3bb68ae refactor(rpi): add platform macro for the crash UART base address by Mario Bălănică · Fri Dec 01 05:12:58 2023 +0200
  49. c258e4c refactor(rpi): split out console registration logic by Mario Bălănică · Fri Dec 01 04:59:43 2023 +0200
  50. 3a946f3 refactor(rpi): move more platform-specific code into common by Mario Bălănică · Fri Dec 01 04:30:13 2023 +0200
  51. 468483e Merge "refactor(cm): couple el2 registers with dependent feature flags" into integration by Manish Pandey · Fri Mar 08 17:20:33 2024 +0100
  52. e75df8f Merge "fix(tc): do not use r0 for HW_CONFIG" into integration by Manish V Badarkhe · Fri Mar 08 14:38:46 2024 +0100
  53. 4c178ca Merge "fix(misra): fix MISRA defects" into integration by Manish Pandey · Thu Mar 07 21:56:03 2024 +0100
  54. 4eb28e8 Merge changes from topic "DPE" into integration by Manish V Badarkhe · Thu Mar 07 21:41:23 2024 +0100
  55. 29670e6 fix(misra): fix MISRA defects by Arvind Ram Prakash · Mon Mar 04 16:33:27 2024 -0600
  56. fbbee6b refactor(cm): couple el2 registers with dependent feature flags by Jayanth Dodderi Chidanand · Wed Jan 24 20:05:07 2024 +0000
  57. f56d431 fix(tc): do not use r0 for HW_CONFIG by Jackson Cooper-Driver · Tue Mar 05 13:56:48 2024 +0000
  58. 9421e52 fix(cpus): workaround for Cortex-X4 erratum 2701112 by Sona Mathew · Fri Mar 01 13:36:21 2024 -0600
  59. e4e83a8 Merge "fix(gic600): workaround for Part 1 of GIC600 erratum 2384374" into integration by Bipin Ravi · Wed Mar 06 21:24:20 2024 +0100
  60. 579a23c fix(gic600): workaround for Part 1 of GIC600 erratum 2384374 by Arvind Ram Prakash · Mon Feb 05 16:19:37 2024 -0600
  61. 7273966 fix(arm): move console flush/switch in common function by Manish Pandey · Wed Mar 06 16:52:57 2024 +0000
  62. a5d3ca8 feat(tc): group components into certificates by Tamas Ban · Tue Jan 30 12:56:38 2024 +0100
  63. 2cbc56b feat(tc): add dummy TRNG support to be able to boot pVMs by David Vincze · Thu Jan 04 18:37:12 2024 +0100
  64. ae33fa9 feat(tc): get the parent component provided DPE context_handle by Tamas Ban · Wed Jun 07 14:18:46 2023 +0200
  65. 0fbe862 feat(tc): share DPE context handle with child component by Tamas Ban · Mon Jun 12 11:33:47 2023 +0200
  66. f879bf1 feat(tc): add DPE context handle node to device tree by Tamas Ban · Mon Jun 12 11:26:28 2023 +0200
  67. a426089 feat(tc): add DPE backend to the measured boot framework by Tamas Ban · Wed Jun 07 13:35:04 2023 +0200
  68. 5a63798 refactor(tc): align image identifier string macros by Tamas Ban · Mon Jun 05 11:13:16 2023 +0200
  69. b1cc069 refactor(fvp): align image identifier string macros by Tamas Ban · Mon Jun 05 11:11:28 2023 +0200
  70. cba0561 refactor(imx8m): align image identifier string macros by Tamas Ban · Mon Jun 05 11:10:10 2023 +0200
  71. b979600 refactor(qemu): align image identifier string macros by Tamas Ban · Mon Jun 05 11:08:47 2023 +0200
  72. ff1fd17 Merge changes from topic "sm/framework_optimize" into integration by Lauren Wehrmeister · Tue Mar 05 23:38:17 2024 +0100
  73. f25ad88 Merge "fix(el3-spmc): add datastore linker script markers" into integration by Madhukar Pappireddy · Tue Mar 05 19:41:02 2024 +0100
  74. f3f371c chore: rearrange the fvp_cpu_errata.mk file by Sona Mathew · Thu Feb 29 18:17:41 2024 -0600
  75. d8b91ac fix(cpus): add erratum 2701951 to Cortex-X3's list by Sona Mathew · Wed Feb 21 15:07:30 2024 -0600
  76. 8d1a153 refactor(errata-abi): workaround platforms non-arm interconnect by Sona Mathew · Tue Sep 26 17:49:51 2023 -0500
  77. 595a31d refactor(errata-abi): optimize errata ABI using errata framework by Sona Mathew · Tue Sep 26 09:20:35 2023 -0500
  78. b8c107c feat(imx8m): add defines for csu_sa access security by Stefan Kerkmann · Wed Feb 28 15:23:49 2024 +0100
  79. fe2243b feat(imx8m): add imx csu_sa enum type defines for imx8m by Stefan Kerkmann · Wed Feb 28 16:36:42 2024 +0100
  80. 0a0086f fix(imx8m): fix CSU_SA_REG to work with all sa registers by Stefan Kerkmann · Wed Feb 28 16:38:04 2024 +0100
  81. 6b17eb4 Merge changes from topic "css_refactor_arm" into integration by Manish Pandey · Mon Mar 04 21:53:25 2024 +0100
  82. 8ce67c9 Merge changes from topic "fix-lto-build-all" into integration by Bipin Ravi · Mon Mar 04 20:22:42 2024 +0100
  83. fc12f8d refactor(allwinner): console runtime switch on bl31 exit by Salman Nabi · Mon Feb 19 13:42:56 2024 +0000
  84. 442b075 refactor(arm): console runtime switch on bl31 exit by Salman Nabi · Mon Feb 19 17:03:44 2024 +0000
  85. fed5e29 refactor(console): flush before console_switch_state by Salman Nabi · Wed Feb 28 13:37:06 2024 +0000
  86. 3ace691 Merge "fix(spm): reduce verbosity on passing tf-a-tests" into integration by Madhukar Pappireddy · Mon Mar 04 17:00:48 2024 +0100
  87. 464e155 Merge changes from topic "topics/fwu_metadata_v2_migration" into integration by Manish V Badarkhe · Mon Mar 04 15:53:31 2024 +0100
  88. eb9ac47 Merge changes from topic "sgi_to_nrd" into integration by Manish Pandey · Sat Mar 02 12:28:37 2024 +0100
  89. 07ff6b6 Merge changes from topic "smmuv3_fix" into integration by Manish V Badarkhe · Fri Mar 01 13:28:14 2024 +0100
  90. faa6d8d Merge "refactor(qemu): console runtime switch on bl31 exit" into integration by Manish Pandey · Fri Mar 01 12:57:10 2024 +0100
  91. 7c9a204 Merge changes from topic "imx8ulp_support" into integration by Manish Pandey · Fri Mar 01 12:37:14 2024 +0100
  92. 52794a3 style(fwu): change the metadata fields to align with specification by Sughosh Ganu · Fri Feb 02 15:35:18 2024 +0530
  93. da28e4c feat(st): add logic to boot the platform from an alternate bank by Sughosh Ganu · Tue Feb 20 14:20:41 2024 +0530
  94. ff87785 feat(st): add a function to clear the FWU trial state counter by Sughosh Ganu · Tue Feb 20 14:17:57 2024 +0530
  95. 63576f0 feat(st): get the state of the active bank directly by Sughosh Ganu · Thu Feb 01 16:56:27 2024 +0530
  96. 7ad51de refactor(qemu): console runtime switch on bl31 exit by Jens Wiklander · Fri Mar 01 09:07:19 2024 +0100
  97. a72adec fix(el3-spmc): add datastore linker script markers by Shruti Gupta · Tue Dec 20 18:01:43 2022 +0000
  98. 11a99bf Merge changes I6ac59693,Ib0e4e5cf into integration by Manish V Badarkhe · Wed Feb 28 15:17:59 2024 +0100
  99. 15cdbb4 Merge changes I1415e402,Ia92cc693,I7a42f72e,I6e75659e,I4c6136c5, ... into integration by Manish V Badarkhe · Tue Feb 27 10:59:58 2024 +0100
  100. 6187fdd fix(imx8ulp): increase the mmap region num by Jacky Bai · Wed Aug 02 19:07:00 2023 +0800