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git01.mediatek.com / filogic / atf / 9d36986bc1b43773a1bb301c9afacd2842b45487 / include / arch / aarch64
  1. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · 2 years, 2 months ago
  2. 7d52a8f fix(errata): workaround for Cortex-A710 erratum 2008768 by johpow01 · 2 years, 4 months ago
  3. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · 2 years, 5 months ago
  4. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · 2 years, 3 months ago
  5. 9461a89 refactor(el3-runtime): add arch-features detection mechanism by Jayanth Dodderi Chidanand · 2 years, 6 months ago
  6. 0824b45 feat(bl2): add support to separate no-loadable sections by Jiafei Pan · 2 years, 4 months ago
  7. 48e6b57 fix(gpt_rme): rework delegating/undelegating sequence by Robert Wakim · 2 years, 9 months ago
  8. 60786e7 test(el3-runtime): dit is retained on world switch by Daniel Boulby · 2 years, 8 months ago
  9. 928747f fix(el3-runtime): set unset pstate bits to default by Daniel Boulby · 3 years, 1 month ago
  10. 74b7e44 feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX by johpow01 · 2 years, 7 months ago
  11. 9baade3 feat(sme): enable SME functionality by johpow01 · 3 years ago
  12. 9bcd147 Merge "refactor(fvp_r): remove unused files and clean up makefiles" into integration by Manish Pandey · 2 years, 8 months ago
  13. 0033b25 refactor(fvp_r): remove unused files and clean up makefiles by johpow01 · 2 years, 9 months ago
  14. 03be39d feat(mpmm): add support for MPMM by Chris Kay · 3 years, 2 months ago
  15. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · 3 years, 1 month ago
  16. a5fde28 refactor(amu): factor out register accesses by Chris Kay · 3 years, 1 month ago
  17. b0d69e8 fix(pie): invalidate data cache in the entire image range if PIE is enabled by Zelalem Aweke · 2 years, 9 months ago
  18. 88fb9af Merge "feat(fvp_r): configure system registers to boot rich OS" into integration by Joanna Farley · 2 years, 9 months ago
  19. 5693afe feat(fvp_r): configure system registers to boot rich OS by Manish Pandey · 2 years, 9 months ago
  20. 9d13402 refactor(gpt): productize and refactor GPT library by johpow01 · 3 years, 1 month ago
  21. 13dc8f1 feat(rme): add RMM dispatcher (RMMD) by Zelalem Aweke · 3 years ago
  22. 688fbf7 feat(rme): run BL2 in root world when FEAT_RME is enabled by Zelalem Aweke · 3 years ago
  23. 79e3d29 feat(rme): add register definitions and helper functions for FEAT_RME by Zelalem Aweke · 3 years ago
  24. 56f1e3e fvp_r: load, auth, and transfer from BL1 to BL33 by laurenw-arm · 3 years, 4 months ago
  25. 3d7f654 chore: fvp_r: Initial No-EL3 and MPU Implementation by Gary Morrison · 3 years, 5 months ago
  26. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · 2 years, 11 months ago
  27. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · 3 years ago
  28. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · 3 years ago
  29. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · 3 years ago
  30. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · 3 years ago
  31. dd8af68 Merge "fix(sdei): set SPSR for SDEI based on TakeException" into integration by Manish Pandey · 3 years ago
  32. c79c3e9 Merge "refactor(aarch64): remove `FEAT_BTI` architecture check" into integration by Joanna Farley · 3 years ago
  33. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · 3 years, 7 months ago
  34. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · 3 years, 3 months ago
  35. b4ba2b3 refactor(aarch64): remove `FEAT_BTI` architecture check by Chris Kay · 3 years, 4 months ago
  36. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · 3 years, 2 months ago
  37. 592a479 Merge changes from topic "dcc_console" into integration by Madhukar Pappireddy · 3 years, 3 months ago
  38. f80014d drivers: dcc: Support JTAG DCC console by Venkatesh Yadav Abbarapu · 3 years, 7 months ago
  39. 08fec33 arch: Enable `FEAT_SB` for supported non-Armv8.5-A platforms by Chris Kay · 3 years, 4 months ago
  40. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · 3 years, 9 months ago
  41. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · 3 years, 8 months ago
  42. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · 3 years, 7 months ago
  43. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · 3 years, 7 months ago
  44. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · 3 years, 7 months ago
  45. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · 3 years, 7 months ago
  46. 5c29cba aarch64/arm: Add compiler barrier to barrier instructions by Andre Przywara · 3 years, 9 months ago
  47. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · 4 years ago
  48. bde5c95 Add wrapper for AT instruction by Manish V Badarkhe · 4 years ago
  49. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · 4 years ago
  50. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · 4 years ago
  51. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · 4 years, 1 month ago
  52. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · 4 years, 3 months ago
  53. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · 4 years, 3 months ago
  54. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · 4 years, 1 month ago
  55. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · 4 years, 2 months ago
  56. 5dc9e9c Fix compilation error when ENABLE_PIE=1 by Varun Wadekar · 4 years, 2 months ago
  57. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · 4 years, 2 months ago
  58. 2bae35f SPMD: code/comments cleanup by Olivier Deprez · 4 years, 3 months ago
  59. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · 4 years, 8 months ago
  60. 019b4f8 locks: bakery: use is_dcache_enabled() helper by Masahiro Yamada · 4 years, 3 months ago
  61. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · 4 years, 4 months ago
  62. 8a6e961 Add get_current_el_maybe_constant() by Masahiro Yamada · 4 years, 3 months ago
  63. 442f0df Merge "Use Speculation Barrier instruction for v8.5 cores" into integration by Mark Dykes · 4 years, 4 months ago
  64. bfe7bb6 Use Speculation Barrier instruction for v8.5 cores by Madhukar Pappireddy · 4 years, 4 months ago
  65. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · 4 years, 4 months ago
  66. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 5 months ago
  67. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 4 months ago
  68. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · 6 years ago
  69. b8f26e9 Make PAC demangling more generic by Alexei Fedorov · 4 years, 5 months ago
  70. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · 4 years, 6 months ago
  71. 31a14e1 bl31: Split into two separate memory regions by Samuel Holland · 6 years ago
  72. eb1e7e4 Merge changes from topic "aa/sel2_support" into integration by Olivier Deprez · 4 years, 7 months ago
  73. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · 4 years, 7 months ago
  74. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · 4 years, 7 months ago
  75. 023c155 Add support for enabling S-EL2 by Achin Gupta · 4 years, 9 months ago
  76. add24a4 Explicitly disable the SPME bit in MDCR_EL3 by Petre-Ionut Tudor · 4 years, 9 months ago
  77. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · 5 years ago
  78. 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · 4 years, 10 months ago
  79. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 4 years, 10 months ago
  80. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 4 years, 11 months ago
  81. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · 4 years, 10 months ago
  82. 83e0488 Add UBSAN support and handlers by Justin Chadwell · 4 years, 11 months ago
  83. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
  84. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · 4 years, 11 months ago
  85. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
  86. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · 5 years ago
  87. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
  88. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · 5 years ago
  89. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · 5 years ago
  90. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · 5 years ago
  91. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · 5 years ago
  92. c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · 5 years ago
  93. 007d745 arch: add some defines for generic timer registers by Yann Gautier · 5 years ago
  94. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · 5 years ago
  95. 16d006b Workaround for cortex-A76 errata 1286807 by Soby Mathew · 5 years ago
  96. bc6fdc0 Remove deprecated interfaces by Ambroise Vincent · 5 years ago
  97. 0a0ca8b Console: remove deprecated finish_console_register by Ambroise Vincent · 5 years ago
  98. 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · 5 years ago
  99. 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · 5 years ago
  100. b091eb9 Ensure proper ID register is checked for feature detection by Dimitris Papastamos · 5 years ago